CN217881497U - Semiconductor packaging device - Google Patents

Abstract

The application discloses semiconductor packaging device includes: the upper surface of the substrate is provided with an element region and a shielding region, and the shielding region is arranged on the periphery of the element region; the electronic element is correspondingly arranged in the element area and is electrically connected to the substrate; the two shielding pieces are arranged in one shielding area and are oppositely arranged; and a plurality of shield wires for connecting the two shields and crossing the electronic component. The problem that the electronic element is interfered by external electromagnetic waves can be avoided, and the shielding effect of the electromagnetic interference is improved.

Description

Semiconductor packaging device

Technical Field

The application relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging device.

Background

With the rapid development of the electronic industry, most electronic products are being miniaturized and speeded up, and especially, the development of the communication industry has generally integrated the communication device into various electronic products, such as mobile phone (Cell phone), laptop (laptop) and so on. However, the above-mentioned electronic products need to use a high frequency rf chip, and the rf chip may be disposed adjacent to a Digital integrated circuit (Digital Signal Processor, DSP) or a baseband chip (BB), which causes an Electromagnetic Interference (EMI) problem, so that an Electromagnetic Shielding (Electromagnetic Shielding) process is required.

At present, the PAM4 multimode product generally adopts an EMI metal shielding cover to inhibit electromagnetic interference, or a wave-absorbing material is pasted in a module to inhibit electromagnetic interference, the two modes are still difficult to prevent electromagnetic interference when being used as a shielding layer, and the electromagnetic interference is more challenged particularly when the next generation of single wave 100Gbps is applied.

Therefore, how to overcome the above problems in the prior art has become a problem to be overcome in the industry.

SUMMERY OF THE UTILITY MODEL

An object of the present invention is to provide a semiconductor package device to solve the technical problem that an electronic component is interfered by external electromagnetic waves.

To achieve the above object, the present invention provides a semiconductor package device, which includes: the upper surface of the substrate is provided with an element region and a shielding region, and the shielding region is arranged on the periphery of the element region; the electronic element is correspondingly arranged in the element area and is electrically connected to the substrate; the two shielding pieces are arranged in one shielding area and are oppositely arranged; and a plurality of shield wires for connecting the two shields and crossing the electronic component.

Further, the semiconductor package device further includes: a shield connector disposed on the electronic component between the two shields; the shielding wire comprises a first shielding wire and a second shielding wire, one end of the first shielding wire is connected to one of the two shielding pieces, the other end of the first shielding wire is connected to one side of the shielding connecting piece, one end of the second shielding wire is connected to the other of the two shielding pieces, and the other end of the second shielding wire is connected to the other side of the shielding connecting piece.

Further, the shield and the shield connection each include: an insulating layer; and a metal shielding film layer disposed on the insulating layer.

Furthermore, the insulating layer is made of one of aluminum nitride ceramic, aluminum oxide ceramic, silicon nitride ceramic, zirconium oxide ceramic and silicon carbide ceramic.

Further, the height of the shielding piece is 0.18-0.22mm; the height of the shielding connecting piece is 0.08-0.12mm; the height of the shield is less than or equal to the height of the electronic component.

Further, the semiconductor package device further includes: and the packaging layer is arranged on the substrate and covers the electronic element, the shielding piece and the shielding connecting piece.

Further, the shielding wire is a gold wire and/or an aluminum wire.

Further, a ground terminal is disposed on the upper surface of the substrate, and the ground terminal is electrically connected to the electronic component and the shielding member.

Further, a ground terminal is provided inside the substrate, and the shield is connected to the ground terminal.

Furthermore, a via hole is formed in the substrate, and the shielding piece is connected to the ground terminal through the via hole.

The technical effect of the utility model lies in that, a semiconductor packaging device is provided, through the shielding piece that sets up two relative settings in electronic component's periphery, many shielded wires stride across electronic component and connect the shielding piece of two relative settings in order to form a shielding net, and this shielding net's simple structure, the routing is nimble, can also effectively avoid electronic component to receive outside electromagnetic interference's problem to promote electromagnetic interference's shielding effect.

Furthermore, the shielding connecting piece is correspondingly arranged on the upper surface of the electronic element, the shielding connecting piece is arranged between the two oppositely arranged shielding pieces and is connected to the two shielding pieces through the shielding wire to form a shielding net, the shielding net can be used for connecting the whole electronic element, the problem that the shielding wire is poor in electromagnetic interference shielding effect due to the fact that the length of the shielding wire strides over the electronic element is too long is avoided, and therefore the electromagnetic interference shielding effect is further improved.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a top view of a substrate provided in embodiment 1 of the present application.

Fig. 2 is a top view of a semiconductor package device provided in embodiment 1 of the present application.

Fig. 3 is a cross-sectional view of a semiconductor package device according to embodiment 1 of the present application.

Fig. 4 is a top view of a semiconductor package device according to embodiment 2 of the present application.

Fig. 5 is a cross-sectional view of a semiconductor package device according to embodiment 3 of the present application.

Fig. 6 is a top view of a semiconductor package device provided in embodiment 4 of the present application.

Fig. 7 is a top view of a semiconductor package device according to embodiment 5 of the present application.

Fig. 8 is a cross-sectional view of a semiconductor package device according to embodiment 5 of the present application.

Fig. 9 is a top view of a semiconductor package device according to embodiment 6 of the present application.

Fig. 10 is a cross-sectional view of a semiconductor package device according to embodiment 7 of the present application.

Fig. 11 is a top view of a semiconductor package device according to embodiment 8 of the present application.

The components of the drawings are identified as follows:

1. a substrate; 11. An electronic component;

12. a circuit layer; 121. A signal terminal;

122. a ground terminal; 2. A shielding mesh;

21. a shield; 22. A shield connection;

23. a shielded wire; 201. An insulating layer;

202. a metal shielding film layer; 3. An encapsulation layer;

101. welding wires; 102. Connecting wires;

201a, a via hole; 110. An element region;

120. a shielded region; 23a, a first shield line;

23b, a second shield line; 23c, a third shield wire;

23d, a fourth shield wire.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in the orientations and positional relationships indicated in the drawings, which are based on the orientation or positional relationship shown in the drawings, and are used for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be construed as limiting the application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.

The embodiment of the application provides a semiconductor packaging device, can be applied to the optical module, and this semiconductor packaging device is applicable to the technology module of present most multimode COB (Chip On Board), mainly according to the width of the electronic component who sets up On the base plate to set up the shielding structure with electronic component looks adaptation, this design simple structure, the routing is nimble, can also effectively avoid electronic component to receive the problem of external electromagnetic wave interference, in order to promote electromagnetic interference's shielding effect.

Example 1

As shown in fig. 1-3, the present embodiment provides a semiconductor package device, which includes a substrate 1, a shielding mesh 2 and a package layer 3.

Referring to fig. 1, the upper surface of the substrate 1 is provided with an element region 110 and a shielding region 120, and the shielding region 120 is disposed on the periphery of the element region 110, in this embodiment, two shielding regions 120 are disposed oppositely, and the two shielding regions 120 are disposed on the periphery of two opposite sides of the element region 110. The substrate 1 may be various types of substrates 1, and is not particularly limited herein. The substrate 1 may include an organic material, which may be polyimide, epoxy, polyamide fiber, etc., and/or an inorganic material, which may be silicon, silicon oxide, silicon nitride, glass, ceramic, etc. The substrate 1 may also be a printed circuit board such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer impregnated glass fiber based copper foil laminate or the like.

As shown in fig. 2 to 3, the substrate 1 is provided with at least one electronic component 11, that is, at least one electronic component 11 may be provided on the upper surface or the lower surface of the substrate 1. The electronic component 11 illustrated in fig. 1 of the present embodiment is disposed on the upper surface of the substrate 1 and electrically connected to the substrate 1. The electronic component 11 may be an active component (also referred to as an active component), such as a semiconductor chip, a passive component (also referred to as a passive component), such as a resistor, a capacitor, and an inductor, or a combination thereof. The electronic component 11 is a radio frequency chip or other semiconductor chip, such as a bluetooth chip or a Wireless Fidelity (Wi-Fi) chip, and has a plurality of electrode terminals (not shown), a circuit layer 12 is disposed on the surface of the substrate 1, the circuit layer 12 may have a plurality of signal terminals 121 and a ground terminal 122, and the electrode terminals of the electronic component 11 are connected to the signal terminals 121 and the ground shielding terminal 122 respectively through a plurality of bonding wires 101 by wire bonding.

As shown in fig. 2 to fig. 3, two opposite shielding members 21 are provided, and each shielding member 21 is correspondingly disposed in one shielding region 120 and disposed on the outer periphery of one side of the electronic component 11. The shield 21 may be provided in the same layer as the electronic component 11 or in a different layer from the electronic component 11. In the present embodiment, the shield 21 is provided in the same layer as the electronic component 11. Each shield 21 includes an insulating layer 201 and a metal shielding film layer 202 disposed on an upper surface of the insulating layer 201. The insulating layer 201 is made of one of aluminum nitride ceramic, aluminum oxide ceramic, silicon nitride ceramic, zirconium oxide ceramic, and silicon carbide ceramic, which have excellent thermal conductivity, reliable electrical insulation, and low dielectric constant and dielectric loss. The metal shielding film 202 is a conductive layer, such as copper (Cu), nickel (Ni), iron (Fe), or aluminum (Al), which is formed by electroplating, chemical plating such as sputtering, coating, or other methods.

Referring to fig. 2-3, the shielding lines 23 are used for connecting two oppositely disposed shielding members 21 and crossing over the electronic components 11 to form a shielding net 2, the shielding net is mainly suitable for the electronic components 11 with a width less than or equal to 2mm, the shielding net has a simple structure and flexible routing, can cover the whole electronic components 11, and can effectively avoid the problem that the electronic components 11 are interfered by external electromagnetic waves, so as to improve the shielding effect of electromagnetic interference. In this embodiment, the shielding wire 23 may be a gold wire or an aluminum wire, or a mixture of a gold wire and an aluminum wire, which is not particularly limited herein. The shield wire 23 is connected to the shield layer 21 and the shield connection layer 22 by means of flat Bonding or Wedge Bonding (Wedge Bonding), thereby effectively suppressing electromagnetic interference.

Further, the distance between the shielding member 21 and the electronic component 11 is smaller than 2mm, so that the shielding member 21 is closer to the electronic component 11, the shielding net 2 can provide a better electromagnetic interference preventing effect, and the semiconductor packaging device can be miniaturized.

The semiconductor package device provided in this embodiment further includes a package layer 3, wherein the package layer 3 is formed on the substrate 1 and covers the electronic component 11 and the shielding member 21. The material used for the encapsulating layer 3 may be Epoxy resin (Epoxy resin), filler (Filler), catalyst (Catalyst), pigment (Pigment), release Agent (Release Agent), flame Retardant (Flame Retardant), coupling Agent (Coupling Agent), curing Agent (hardner), low Stress absorbent (Low Stress Absorber), adhesion Promoter (Adhesion Promoter), ion Trapping Agent (Ion Trapping Agent), and the like.

Further, the height of the shield 21 is 0.18-0.22mm, and the height of the shield 21 is less than or equal to the height of the electronic component 11. More specifically, the height of the shielding part 21 may be 0.2mm, the height of the electronic element 11 may be 0.2mm, and the height of the shielding part 21 is equal to the height of the electronic element 11, so that the electronic element 11 and the shielding part 21 are encapsulated by the encapsulating material, and the electronic element 11 and the shielding part 21 may be planarized as much as possible, thereby more effectively improving the water and oxygen blocking performance of the semiconductor encapsulating device. Of course, in other embodiments, the height of the shielding member 21 can be flexibly adjusted according to the actual height of the electronic component 11, so as to facilitate the manufacturing process.

Further, the upper surface of the substrate 1 is provided with a grounding terminal 122, which is electrically connected to the electronic component 11 and the shielding member 21. Specifically, the grounding terminal 122 is connected to the electronic component 11 through the bonding wire 101, and is connected to the shielding member 21 through the connecting wire 102, so that the whole shielding net is grounded, and the shielding net provides a good electromagnetic interference shielding effect for the electronic component 11.

Example 2

The present embodiment provides a semiconductor package device, which includes most of the technical solutions of embodiment 1, and is different in that a ground terminal 122 is disposed on an upper surface of a substrate, the ground terminal 122 is correspondingly disposed in a shielding region 120, and the ground terminal 122 is a shielding member.

Specifically, as shown in fig. 4, a plurality of ground terminals 122 are disposed in the shielding region 120, the ground terminal 122 is used as a shielding member of the electronic component 11, the ground terminal 122 of one shielding region 120 of the two oppositely disposed shielding regions 120 is connected to the ground terminal 122 of the other shielding region 120 of the two oppositely disposed shielding regions 120 through the shielding wire 23, so as to form a ground shielding net 2, the shielding net 2 is mainly suitable for the electronic component 11 with a width less than or equal to 2mm, and the shielding net has a simple structure and flexible wire bonding, and can also effectively avoid the problem that the electronic component 11 is interfered by external electromagnetic waves, so as to improve the shielding effect of electromagnetic interference.

Example 3

The present embodiment provides a conductor encapsulation device, which includes most of the technical solutions of embodiment 1, and is different in that a ground terminal 122 is provided inside a substrate, and a shield 21 is connected to the ground terminal 122.

Specifically, as shown in fig. 5, a via hole 201a is formed in the substrate, the via hole 201a penetrates through the ground terminal 122 in the substrate 1 from the insulating layer 201, and during the process of forming the metal shielding film layer 202, the same material as that of the metal shielding film layer 202 is deposited on the via hole 201a, so that the metal shielding film layer 202 is electrically connected to the ground terminal 122, so as to achieve the electromagnetic wave shielding effect of the electronic component 11.

Example 4

This embodiment provides a semiconductor package device including most of the technical solutions of embodiment 1, except that the number of the shields is 4.

Specifically, as shown in fig. 7, two shields 21 of the 4 shields 21 are disposed on the left and right sides of the electronic component 11, and the other two shields 21 are disposed on the upper and lower sides of the electronic component 11, that is, the 4 shields 21 surround the periphery of the electronic component 11. In the present embodiment, the shield line includes a first shield line 23a extending in the row direction and a second shield line 23b extending in the column direction, the first shield line 23a is used to connect the two shields 21 on the left and right sides, and the second shield line 23b is used to connect the two shields 21 on the upper and lower sides. The orthographic projection of the first shielding line 23a on the substrate 1 and the orthographic projection of the second shielding line 23b on the substrate 1 are mutually staggered, and a grid-shaped shielding net 2 is formed, the shielding net is mainly suitable for the electronic element 11 with the width less than or equal to 2mm, and the shielding net 2 can mostly cover the welding line 101 for connecting the electronic element 11 and the circuit layer 12 so as to effectively shield the problem of electromagnetic interference. Moreover, the semiconductor package device provided in this embodiment can shield four different sides of the electronic component 11, thereby further improving the shielding effect.

Example 5

This embodiment provides a semiconductor package device, which includes most of the technical solutions of embodiment 1, and is different in that a shield connector is disposed on an electronic component between two shields.

Specifically, as shown in fig. 7 to 8, the shielded wire includes a first shielded wire 23a and a second shielded wire 23b. One end of the first shield line is connected to the shield 21 located above the electronic component 11 and the other end is connected to the upper side of the shield connection 22. Preferably, the first shield wire 23a is perpendicularly connected to the shield 21 and the shield connector 22. One end of the second shield wire 23b is connected to the shield 21 located below the electronic component 11, and the other end is connected to the lower side of the shield connector 22. Preferably, the second shield wire 23b is perpendicularly connected to the shield 21 and the shield connection 22. The first shielding wire 23a and the second shielding wire 23b are respectively connected to the shielding connecting part 22 to form a shielding net 2, the shielding net 2 is mainly suitable for the electronic element 11 with a width greater than 2mm and can cover the whole electronic element 11, and the problem that the length of the shielding wire for connecting the two shielding parts 21 is too long to influence the electromagnetic interference shielding effect when the width of the electronic element 11 is too large and the shielding connecting part 22 is not arranged at the top of the electronic element 11 is avoided, so that the electronic element 11 is effectively prevented from being interfered by external electromagnetic waves.

In this embodiment, each of the shielding connection member 22 and the shielding member 21 includes an insulating layer 201 and a metal shielding film layer 202 disposed on an upper surface of the insulating layer 201. The insulating layer 201 is made of one of aluminum nitride ceramic, aluminum oxide ceramic, silicon nitride ceramic, zirconium oxide ceramic, and silicon carbide ceramic, which have excellent thermal conductivity, reliable electrical insulation, and low dielectric constant and dielectric loss. The metal shielding film 202 is a conductive layer, such as copper (Cu), nickel (Ni), iron (Fe), or aluminum (Al), which is formed by electroplating, electroless plating such as sputtering, coating, or other methods.

Further, the height of the shield 21 is 0.18-0.22mm, the height of the shield connector 22 is 0.08-0.12mm, and the height of the shield 21 is less than or equal to the height of the electronic component 11. More specifically, the height of the shield 21 may be 0.2mm, the height of the shield connection 22 may be 0.1mm, and the height of the electronic component 11 may be 0.15mm. Preferably, the height of the shielding part 21 is the sum of the heights of the shielding connecting part 22 and the electronic element 11, the shielding part 21 and the shielding connecting part 22 are packaged by adopting the packaging material, so that the electronic element 11 and the shielding net can be flattened as much as possible, and the performance of blocking water and oxygen of the semiconductor packaging device is improved more effectively. Of course, in other embodiments, the heights of the shielding member 21 and the shielding connecting member 22 can be flexibly adjusted according to the height of the electronic component 11, so as to facilitate the manufacturing process.

In one embodiment, the upper surface of the substrate 1 is provided with a ground terminal 122, and the ground terminal 122 is electrically connected to the electronic component 11 and the shielding connecting member 22. Specifically, the shielding connecting member 22 is disposed at the top of the electronic component 1, the shielding connecting member 22 is connected to the ground terminal 122 through the connecting wire 102, the electronic component 1 can be connected to the ground terminal 122 through the bonding wire 101, and the shielding member 21 can be connected to the shielding connecting member 22 through the first shielding wire 23a and the second shielding wire 23b, so that the whole shielding net 2 is grounded, and a better electromagnetic interference preventing effect is provided for the electronic component 11. Of course, in other embodiments, the shielding element 21 can be connected to the electronic component 11 through the bonding wire 101, and connected to the grounding terminal 122 through the connecting wire 102, and the shielding element 21 can be connected to the shielding connecting element 22 through the first shielding wire 23a and the second shielding wire 23b, so that the whole shielding net 2 is grounded, and a good electromagnetic interference shielding effect is provided for the electronic component 11.

Example 6

The present embodiment provides a semiconductor package device, which includes most of the technical solutions of embodiment 5, and is different in that a ground terminal is disposed on an upper surface of a substrate, the ground terminal is correspondingly disposed in a shielding region, and the ground terminal is a shield.

Specifically, as shown in fig. 9, a plurality of ground terminals 122 are disposed in the shielding region 120, the ground terminals 122 serve as the shielding members 21 of the electronic components 11, the ground terminal 122 of one shielding region 120 of the two oppositely disposed shielding regions 120 is connected to the upper side of the shielding connecting member 22 through the first shielding wire 23a, and the ground terminal 122 of the other shielding region 120 of the two oppositely disposed shielding regions 120 is connected to the lower side of the shielding connecting member 22 through the second shielding wire 23b, so as to form a ground shielding net 2, the ground shielding net 2 is mainly suitable for the electronic components 11 with a width greater than 2mm, and can effectively avoid the problem that the electronic components 11 are interfered by external electromagnetic waves, so as to improve the shielding effect of electromagnetic interference.

Example 7

This embodiment provides a semiconductor package device including most of the technical solutions of embodiment 5, except that a ground terminal is provided inside a substrate, and a shield is connected to the ground terminal.

Specifically, as shown in fig. 10, a via hole 201a is formed in the substrate, the via hole 201a penetrates the ground shielding terminal 122 in the substrate 1 from the insulating layer 201, and during the process of forming the metal shielding film layer 202, the same material as that of the metal shielding film layer 202 is deposited on the via hole 201a, so that the metal shielding film layer 202 is electrically connected to the ground terminal 122, so as to achieve the electromagnetic wave shielding effect of the electronic component 11.

Example 8

This embodiment provides a semiconductor package device including most of the technical solutions of embodiment 5, except that the number of the shields is 4.

Specifically, as shown in fig. 11, two shields 21 of the 4 shields 21 are disposed on the left and right sides of the electronic component 11, and the other two shields 21 are disposed on the upper and lower sides of the electronic component, i.e., the 4 shields 21 surround the periphery of the electronic component. In the present embodiment, the shield line includes the first shield line 23a and the second shield line 23b extending in the row direction and the third shield line 23c and the fourth shield line 23d extending in the column direction.

The first shielding wire 23a is used to connect the left side of the shielding part 21 and the shielding connector 22 on the left side, the second shielding wire 23b is used to connect the right side of the shielding part 21 and the shielding connector 22 on the right side, the third shielding wire 23c is used to connect the top side of the shielding part 21 and the shielding connector 22 on the upper side, and the fourth shielding wire 23d is used to connect the bottom side of the shielding part 21 and the shielding connector 22 on the lower side, so as to form a grounding shielding net 2, the shielding net 2 is mainly suitable for electronic components 11 with a width greater than 2mm, and the shielding net can mostly cover the bonding wire 101 of the electronic components 11 connected with the circuit layer 12, so as to effectively shield the problem of electromagnetic interference. Moreover, the semiconductor package device provided in this embodiment can shield four different sides of the electronic component 11, thereby further improving the shielding effect.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The foregoing detailed description is directed to a semiconductor package device provided in an embodiment of the present application, and specific examples are applied herein to illustrate the principles and implementations of the present application, and the above description of the embodiments is only used to help understand the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims (10)

1. A semiconductor package device, comprising:

the upper surface of the substrate is provided with an element region and a shielding region, and the shielding region is arranged on the periphery of the element region;

the electronic element is correspondingly arranged in the element area and is electrically connected to the substrate;

the two shields are arranged in the shielding area and are oppositely arranged; and

a plurality of shield lines for connecting the two shields and crossing the electronic component.

2. The semiconductor package device of claim 1, further comprising:

a shield connector disposed on the electronic component between the two shields;

the shielding wire comprises a first shielding wire and a second shielding wire, one end of the first shielding wire is connected to one of the two shielding pieces, the other end of the first shielding wire is connected to one side of the shielding connecting piece, one end of the second shielding wire is connected to the other of the two shielding pieces, and the other end of the second shielding wire is connected to the other side of the shielding connecting piece.

3. The semiconductor package device of claim 2, wherein the shield and the shield connection each comprise:

an insulating layer; and

a metal shielding film layer disposed on the insulating layer.

4. The semiconductor package device of claim 3,

the insulating layer is made of one of aluminum nitride ceramic, aluminum oxide ceramic, silicon nitride ceramic, zirconium oxide ceramic and silicon carbide ceramic.

5. The semiconductor package device of claim 2,

the height of the shielding piece is 0.18-0.22mm;

the height of the shielding connecting piece is 0.08-0.12mm;

the height of the shield is less than or equal to the height of the electronic component.

6. The semiconductor package device of claim 2, further comprising:

and the packaging layer is arranged on the substrate and covers the electronic element, the shielding piece and the shielding connecting piece.

7. The semiconductor package device of claim 1,

the shielding wire is a gold wire and/or an aluminum wire.

8. The semiconductor package device of claim 1,

the upper surface of the substrate is provided with a grounding terminal which is electrically connected with the shielding piece.

9. The semiconductor package device of claim 1,

the substrate is provided with a ground terminal inside, and the shield is connected to the ground terminal.

10. The semiconductor package device of claim 9,

a through hole is formed in the substrate, and the shielding piece is connected to the grounding terminal through the through hole.

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