CN217880296U - Data distributed processing device and stage lighting control system - Google Patents

Abstract

The application provides a data distributed processing device, the device includes: the FPGA carrier plate comprises an FPGA chip unit, a standard MXM connector, a DMX512 interface unit and an Ethernet interface module; the Ethernet interface module is connected with a standard MXM connector and is connected to the stage lighting control console through an Ethernet switch; the FPGA chip unit is connected with a standard MXM connector and an interface unit, and the interface unit is connected with light terminal equipment; the modularized mainboard comprises a processor unit and a standard golden finger interface; the processor unit is connected to the standard MXM connector through a standard golden finger interface, receives light control data from the stage lighting control console and outputs light control signals; the FPGA chip unit receives the light control signal, outputs a light control instruction, and transmits the light control instruction to corresponding light terminal equipment through the interface unit.

Description

Data distributed processing device and stage lighting control system

Technical Field

The application relates to the technical field of data processing, in particular to a data distributed processing device and a stage lighting control system.

Background

At present, increasingly gorgeous stage lighting scene effects put higher demands on the data processing capability of a stage lighting control device, especially the capability of core data distributed computation, multi-channel DMX512 communication control and man-machine interaction.

However, the light control device realized based on the conventional technology has the disadvantages that the types and the number of related board cards are complicated, the cable for realizing the communication connection among the board cards often has the problems of serious entanglement, poor stability and the like, and the control device is difficult to expand functions and has high comprehensive maintenance cost because the control device needs the matched board card with poor compatibility.

SUMMERY OF THE UTILITY MODEL

In view of the above, it is necessary to provide a data distributed processing apparatus and a light control system.

In order to achieve the above object, in one aspect, an embodiment of the present application provides a data distributed processing apparatus, including:

the FPGA carrier board comprises an FPGA chip unit, a standard MXM connector, a DMX512 interface unit and an Ethernet interface module; the Ethernet interface module is connected with the standard MXM connector and is used for being connected to a stage lighting console through an Ethernet switch; the FPGA chip unit is respectively connected with the standard MXM connector and the DMX512 interface unit, and the DMX512 interface unit is used for connecting lighting terminal equipment;

the modularized mainboard comprises a processor unit and a standard golden finger interface; the processor unit is connected to the standard MXM connector through the standard golden finger interface and used for receiving light control data from the stage lighting control console and outputting light control signals; the FPGA chip unit is used for receiving the light control signal, outputting a light control instruction and transmitting the light control instruction to the corresponding light terminal equipment through the DMX512 interface unit.

In one embodiment, the modular motherboard further comprises a first ethernet controller unit; the first Ethernet controller unit is respectively connected with the processor unit and the standard golden finger interface; the FPGA carrier plate also comprises a second Ethernet controller unit; and the second Ethernet controller unit is respectively connected with the Ethernet interface module and the standard MXM connector.

In one embodiment, the modular motherboard further comprises a first PCIe interface, a third standard interface, and a first GBE interface; the first Ethernet controller unit is connected to the processor unit through the first PCIe interface and connected to the standard golden finger interface through the first GBE interface; the processor unit is connected to the standard golden finger interface through the third standard interface.

In one embodiment, the ethernet interface module includes a first ethernet interface unit and a second ethernet interface unit; the FPGA carrier plate also comprises a second PCIe interface, a second GBE interface and a third GBE interface; the second ethernet controller unit is connected to the standard MXM connector through a second PCIe interface; the first Ethernet interface unit is connected to the standard MXM connector through the second GBE interface; the second ethernet interface unit is connected to the second ethernet controller unit via the third GBE interface.

In one embodiment, the FPGA carrier further includes a USB interface unit, a SATA interface unit, and a USB high-speed communication unit; the USB interface unit and the SATA interface unit are both connected with the standard MXM connector; one end of the USB high-speed communication unit is connected with the standard MXM connector, and the other end of the USB high-speed communication unit is connected with the FPGA chip unit.

In one embodiment, the FPGA carrier further includes a first USB interface, a SATA interface, a second USB interface, and an ULPI interface; the USB interface unit is connected to the standard MXM connector through the first USB interface; the SATA interface unit is connected to the standard MXM connector through the SATA interface; the USB high-speed communication unit is connected to the standard MXM connector through the second USB interface and connected to the FPGA chip unit through the ULPI interface.

In one embodiment, the modular motherboard further comprises an eMMC memory unit and a DDR memory unit; the eMMC storage unit and the DDR storage unit are both connected with the processor unit; the FPGA carrier plate also comprises a FLASH storage unit and a display terminal unit; the FLASH storage unit and the display terminal unit are both connected with the FPGA chip unit.

In one embodiment, the modular motherboard further comprises a first standard interface and a 64-bit bus; the eMMC storage unit is connected to the processor unit through the first standard interface; the DDR memory unit is connected to the processor unit through the 64-bit bus; the FPGA carrier plate further comprises an SPI (serial peripheral interface), a display interface, a touch interface, a GPIO (general purpose input/output) interface and an LVDS (low voltage differential signaling) interface; the FLASH storage unit is connected to the FPGA chip unit through the SPI interface; the display terminal unit is connected to the FPGA chip unit through the display interface and the touch interface; the DMX512 interface unit is connected to the FPGA chip unit through the GPIO interface; the FPGA chip unit is connected to the standard MXM connector through the LVDS interface.

In one embodiment, the FPGA carrier board further comprises a power supply module for supplying power, wherein the power supply module is connected with the standard MXM connector; the modularized mainboard further comprises a power management unit and a second standard interface; one end of the power management unit is connected with the standard golden finger interface, and the other end of the power management unit is connected with the processor unit through the second standard interface.

On the other hand, the embodiment of the present application further provides a stage lighting control system, including: the system comprises a stage lighting control desk, an Ethernet switch, a plurality of lighting terminal devices and a plurality of data distributed processing devices; wherein:

the stage lighting control console is connected with the Ethernet interface module through the Ethernet switch;

and the light terminal equipment is connected with the FPGA chip unit through the DMX512 interface unit.

One of the above technical solutions has the following advantages and beneficial effects:

the application adopts the modularized mainboard with the standard interface, realizes the data distributed computing core capability of the data distributed processing device, and adopts the FPGA carrier plate based on the FPGA chip, and realizes the protocol conversion capability and the multi-channel DMX512 communication control capability of the data distributed processing device. The light control device based on the traditional technology is effectively solved, the problems that cables used for achieving communication connection among the board cards are tangled seriously and stability is poor due to the fact that the types and the number of the related board cards are complex are often caused, the assembling difficulty and the transportation difficulty of the light control device are reduced, and the compatibility of the light control device with the touch display screen with various video formats is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a diagram illustrating an exemplary architecture of a distributed data processing apparatus;

FIG. 2 is a diagram showing a detailed configuration of a data distributed processing apparatus according to an embodiment;

FIG. 3 is a schematic diagram showing a detailed structure of a data distributed processing apparatus according to another embodiment;

FIG. 4 is a schematic diagram of a specific structure of an FPGA chip unit in one embodiment;

FIG. 5 is a diagram illustrating an application architecture of a data distributed processing apparatus in one embodiment;

FIG. 6 is a block diagram of a stage lighting control system in accordance with one embodiment.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. It will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or be connected to the other element through intervening elements. Further, "connection" in the following embodiments is understood to mean "electrical connection", "communication connection", or the like, if there is a transfer of electrical signals or data between the connected objects.

As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.

Increasingly gorgeous stage lighting scene effects put higher demands on the data processing capability of the stage lighting control device, especially the capability of core data distributed computation, multi-channel DMX512 communication control and man-machine interaction.

At present, a stage lighting control device implemented based on a traditional scheme needs to implement core data distributed computing capability, multi-channel DMX512 communication control capability and human-computer interaction capability through various different types of board cards. Specifically, the stage lighting control device realized based on the traditional scheme has data distributed computing capacity which is mainly realized based on a conventional X86 mainboard; the stage lighting control device realized based on the traditional scheme has the DMX512 communication control capability which is mainly realized based on the combination of a PCIE communication board card and a DMX512 interface board card; the stage lighting control device realized based on the traditional scheme has the human-computer interaction capacity, and is mainly realized based on an external touch display screen and a video drive board card and a touch drive board card which are matched with the external touch display screen.

However, because the stage lighting control device realized based on the conventional scheme has the defects that the related board cards are complex in type and large in quantity, the cable used for realizing the communication connection among the board cards often has the problems of serious entanglement, poor stability and the like, and the problem directly causes the stage lighting control device realized based on the conventional technology to have higher assembly difficulty and transportation difficulty. In addition, because the touch display screen in the stage lighting control device realized based on the traditional technology needs to use a special board card matched with the touch display screen, the compatibility of the board card to different types of human-computer interaction touch display screens is poor, and the quantity and the compatibility of interfaces and output ports of a conventional X86 mainboard are relatively limited, the subsequent system upgrade and function expansion of the stage lighting control device are invisibly limited, and the comprehensive cost for maintaining the stage lighting control device is increased.

The data distributed processing device has the following advantages and beneficial effects:

the modularized mainboard with the standard interface (for example, the standard interface conforming to the Qseven standard) is adopted, so that the data distributed computing core capability of the data distributed processing device is realized, compared with the traditional computer mainboard, the mainboard has smaller size and higher flexibility, the problems that the equipment capacity expansion and function expansion are difficult to carry out on a light control device realized based on the traditional technology are solved, and the comprehensive cost of carrying out subsequent upgrading and maintenance on the mainboard is further reduced;

the FPGA carrier plate based on the FPGA chip is adopted, the protocol conversion and communication control capacity of the data distributed processing device are realized, the touch display screens with various video formats can be compatible with the data distributed processing device by utilizing the characteristics of customizability and rich I/O port resources of the FPGA chip, the communication capacity with equipment with various different interfaces is expanded, and the data distributed processing device can realize communication control on DMX512 data with up to 32 channels;

this application adopts the mode that modularization mainboard and FPGA support plate combined together, not only effectively solved the light controlling means based on traditional technical realization, because the integrated circuit board type and the quantity that relate to are comparatively complicated (for example, the combination mode of PC mainboard + PCIE communication integrated circuit board + DMX512 interface board + dedicated video drive integrated circuit board + dedicated touch drive integrated circuit board), and the cable that is used for realizing communication connection between each integrated circuit board often appears entangles seriously, the relatively poor scheduling problem of stability, still reduced light controlling means's the equipment degree of difficulty and the transportation degree of difficulty, improved light controlling means's the compatibility to the touch display screen of multiple video format.

In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

In one embodiment, as shown in fig. 1, there is provided a data distributed processing apparatus, the apparatus comprising:

the FPGA carrier board 100, the FPGA carrier board 100 includes an FPGA chip unit 110, a standard MXM connector 120, a DMX512 interface unit 130 and an Ethernet interface module 140; the Ethernet interface module 140 is connected with the standard MXM connector 120, and the Ethernet interface module 140 is used for being connected to a stage lighting console through an Ethernet switch; the FPGA chip unit 110 is respectively connected with a standard MXM connector 120 and a DMX512 interface unit 130, and the DMX512 interface unit 130 is used for connecting lighting terminal equipment;

modular motherboard 200, modular motherboard 200 comprising processor unit 210 and standard gold finger interface 220; the processor unit 210 is connected to the standard MXM connector 120 through the standard golden finger interface 220, and is configured to receive the light control data from the stage lighting console and output a light control signal; the FPGA chip unit 110 is configured to receive the light control signal, output a light control instruction, and transmit the light control instruction to a corresponding light terminal device through the DMX512 interface unit 130.

Specifically, the light control data may be each channel program (Cprog [ N ]) or each channel numerical value (CdmxN ]) from the stage lighting console; specific manifestations of each channel program (Cprog [ N ]) including, but not limited to, effect curves, macros; each channel numerical value Cdmx [ N ] can realize DMX512 communication control aiming at the light terminal equipment; the modularized mainboard 200 can perform distributed calculation processing on subset programs (Cprog [ X ]) corresponding to each channel program (Cprog [ N ]) acquired through the Ethernet, and transmits DMX512 numerical values Cdmx [ X ] obtained through calculation back to the network through the Ethernet to enable the DMX512 numerical values Cdmx [ X ] to become subset parts of each channel numerical value Cdmx [ N ]; in practical application, the specific implementation manner of the light control signal transmitted from the modular motherboard 200 to the FPGA chip unit 110 in the FPGA carrier board 100 may be that the modular motherboard 200 transmits the subset channel value Cdmx [ Y ] obtained from each channel value Cdmx [ N ] to the FPGA chip unit 110 in the FPGA carrier board 100; in practical application, the specific implementation manner for transmitting the light control instruction to the corresponding light terminal device by the DMX512 interface unit 130 in the FPGA carrier board 100 may be that the DMX512 interface unit 130 in the FPGA carrier board 100 transmits the subset channel value Cdmx [ Y ] sent by the modular motherboard 200 to the corresponding light terminal device.

It should be noted that, in practical applications, the modular motherboard 200 may adopt an X86 architecture; in practical applications, the processor unit 210 in the modular motherboard 200 may be formed by an intel or AMD processor.

In one embodiment, as shown in FIG. 2, modular motherboard 200 further includes a first Ethernet controller unit 230; the first ethernet controller unit 230 is connected to the processor unit 210 and the standard gold finger interface 220 respectively; FPGA carrier 100 further includes a second ethernet controller unit 150; the second ethernet controller unit 150 is connected to the ethernet interface module 140 and the standard MXM connector 120, respectively.

In one embodiment, modular motherboard 200 further comprises a first PCIe interface, a third standard interface, and a first GBE interface; first ethernet controller unit 230 is connected to processor unit 210 via a first PCIe interface, and is connected to standard gold finger interface 220 via a first GBE interface; the processor unit 210 is connected to the standard gold finger interface 220 through a third standard interface.

It should be noted that, in practical applications, the type of the third standard interface includes, but is not limited to, several PCIE, USB, LVDS, I2C, and other standard interface types.

In one embodiment, the ethernet interface module 140 includes a first ethernet interface unit and a second ethernet interface unit;

the FPGA carrier board 100 further includes a second PCIe interface, a second GBE interface, and a third GBE interface;

the second ethernet controller unit 150 is connected to the standard MXM connector 120 through a second PCIe interface;

the first ethernet interface unit is connected to the standard MXM connector 120 through the second GBE interface;

the second ethernet interface unit is connected to the second ethernet controller unit 150 via a third GBE interface.

It should be noted that, the modular motherboard 200 may obtain core data in network switching through the first ethernet interface unit or the second ethernet interface unit in the FPGA carrier board 100, or send calculated data back to the network; the modular motherboard 200 may implement network bridging through the first ethernet controller unit 230 and the second ethernet controller unit 150 in the FPGA carrier board 100, thereby implementing cascade networking between multiple distributed processing unit devices in the stage lighting control system, so as to reduce and improve the number of cables laid between the devices in the stage lighting control system; in practical application, the operation pressure of the stage lighting control platform can be greatly reduced by the networking distributed computing mode, and the operation efficiency of the whole stage lighting control system is further improved.

In one embodiment, as shown in fig. 3, the FPGA carrier board 100 further includes a USB interface unit 160, a SATA interface unit 170, and a USB high-speed communication unit 180;

the USB interface unit 160 and the SATA interface unit 170 are both connected with the standard MXM connector 120;

one end of the USB high-speed communication unit 180 is connected with the standard MXM connector 120, and the other end of the USB high-speed communication unit 180 is connected with the FPGA chip unit 110.

It should be noted that the USB interface unit 160 may be connected to a plurality of external devices, such as a system encryption disk, a mouse, a keyboard, etc.; the SATA interface unit 170 may be connected to the SATA solid state disk to be used as a system boot storage disk; the USB high-speed communication unit 180 may adopt a high-speed USB physical layer transceiver scheme based on the ULPI protocol.

In one embodiment, the FPGA carrier board 100 further includes a first USB interface, a SATA interface, a second USB interface, and a ULPI interface;

the USB interface unit 160 is connected to the standard MXM connector 120 through a first USB interface;

the SATA interface unit 170 is connected to the standard MXM connector 120 through a SATA interface;

the USB high-speed communication unit 180 is connected to the standard MXM connector 120 through a second USB interface, and is connected to the FPGA chip unit 110 through an ULPI interface.

It should be noted that, after the USB high-speed communication unit 180 is connected to the standard MXM connector 120 through the second USB interface and establishes a connection with the processor unit 210 in the modular motherboard 200 through the standard golden finger interface 220, the processor unit 210 needs to perform the following operations: first, a reset state operation is performed on the USB high-speed communication unit 180; then, the USB high-speed communication unit 180 is configured to the high-speed mode; then, after the USB high-speed communication unit 180 and the processor unit 210 are completely established, data communication between the two units can be started in a high-speed mode, wherein the processor unit 210 can obtain all accessed sub-device types in a USB enumeration manner, find the corresponding sub-device type based on a standard USB communication protocol, and perform high-speed data communication with the corresponding function module, that is, data on the ULPI bus and data available in the corresponding function module in the FPGA chip unit 110 are converted with each other, and the data communication between the data conversion process and each function module is not interfered with each other.

In one embodiment, the modular motherboard 200 further includes an eMMC memory unit and a DDR memory unit; the eMMC memory unit and the DDR memory unit are both connected with the processor unit 210;

the FPGA carrier 100 further includes a FLASH memory unit and a display terminal unit; the FLASH storage unit and the display terminal unit are both connected with the FPGA chip unit 110.

In one embodiment, modular motherboard 200 further comprises a first standard interface and a 64-bit bus; the eMMC storage unit is connected to the processor unit 210 through a first standard interface; the DDR memory unit is connected to the processor unit 210 through a 64-bit bus;

the FPGA carrier 100 further includes an SPI interface, a display interface, a touch interface, a GPIO interface, and an LVDS interface; the FLASH memory unit is connected to the FPGA chip unit 110 through an SPI interface; the display terminal unit is connected to the FPGA chip unit 110 through a display interface and a touch interface; the DMX512 interface unit 130 is connected to the FPGA chip unit 110 through a GPIO interface; the FPGA-chip unit 110 is connected to a standard MXM connector 120 through an LVDS interface.

In one embodiment, the FPGA carrier board 100 further includes a power module for supplying power, and the power module is connected to the standard MXM connector 120; the modular motherboard 200 further comprises a power management unit and a second standard interface; one end of the power management unit is connected to the standard golden finger interface 220, and the other end of the power management unit is connected to the processor unit 210 through the second standard interface.

It should be noted that, in practical applications, the power module in the FPGA carrier 100 may provide a 5V power supply voltage for the FPGA carrier 100, and supply power to the modular motherboard 200 from the FPGA carrier 100 by providing a 5V standby voltage and a 5V power supply operating voltage to the power management unit in the modular motherboard 200.

In one embodiment, as shown in fig. 4, the FPGA chip unit 110 in the FPGA carrier board 100 includes a clock module, a video decoding module, a device controller module, a DMX512 communication control module, and a touch module. The clock module is used for distributing a global clock network; the video decoding module comprises a video input module, a zooming module and a video output module and is used for realizing the conversion and decoding of a video interface aiming at the modularized mainboard 200; the device controller module is used for identifying, managing and realizing communication control among a plurality of logic device classes, wherein the plurality of logic devices are a set of the plurality of device classes, and the logic devices comprise DMX512 communication device classes, touch device classes, unibus supported by encoding and decoding, LTC time code device classes, MIDI device classes and the like; the DMX512 communication control module is used for multi-channel DMX512 signal transceiving communication control; and the touch module is used for acquiring and processing the touch signal acquired by the touch display screen.

It should be noted that, since the USB high-speed communication unit 180 may adopt a high-speed USB physical layer transceiver scheme based on the ULPI protocol, the FPGA chip unit 110 may design a plurality of internal functional modules (for example, a touch module, a DMX512 communication control module, and the like) as sub-device types (for example, corresponding touch device types, DMX512 communication device types, and the like) corresponding to the same USB port by using the standard ULPI protocol.

In one embodiment, the data distributed processing apparatus may be configured in a manner as shown in fig. 5.

In one embodiment, as shown in fig. 6, there is provided a stage lighting control system, comprising: the system comprises a stage lighting control desk 400, an Ethernet switch 300, a plurality of lighting terminal devices 500 and a plurality of data distributed processing devices 600; wherein:

the stage lighting control console 400 is connected with the Ethernet interface module 140 through the Ethernet switch 300;

the light terminal equipment 500 is connected with the FPGA chip unit 110 through the DMX512 interface unit 130.

It should be noted that the stage lighting console 400 may be connected to the ethernet switch 300 through an ethernet cable; an ethernet switch 300 connectable to a plurality of data distributed processing apparatuses 600 through ethernet cables; the data distributed processing devices 600 can be connected with the light terminal equipment 500 through DMX512 cables; in practical applications, a plurality of data distributed processing apparatuses 600 may be connected by ethernet cables; the stage lighting control console 400, the ethernet switch 300, the plurality of lighting terminal devices 500, and the plurality of data distributed processing apparatuses 600 may be networked for communication and data transmission in an ethernet manner.

The various modules in the data distributed processing apparatus described above may be implemented in whole or in part by software, hardware, and combinations thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.

In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic depictions of the above terms do not necessarily refer to the same embodiment or example.

The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the utility model. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, and these are all within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A data distributed processing apparatus, comprising:

the FPGA carrier board comprises an FPGA chip unit, a standard MXM connector, a DMX512 interface unit and an Ethernet interface module; the Ethernet interface module is connected with the standard MXM connector and is used for being connected to a stage lighting control console through an Ethernet switch; the FPGA chip unit is respectively connected with the standard MXM connector and the DMX512 interface unit, and the DMX512 interface unit is used for connecting lighting terminal equipment;

the modularized mainboard comprises a processor unit and a standard golden finger interface; the processor unit is connected to the standard MXM connector through the standard golden finger interface and used for receiving light control data from the stage lighting control console and outputting light control signals; the FPGA chip unit is used for receiving the light control signal, outputting a light control instruction and transmitting the light control instruction to the corresponding light terminal equipment through the DMX512 interface unit.

2. The data distributed processing apparatus of claim 1, wherein said modular motherboard further comprises a first ethernet controller unit; the first Ethernet controller unit is respectively connected with the processor unit and the standard golden finger interface;

the FPGA carrier plate also comprises a second Ethernet controller unit; and the second Ethernet controller unit is respectively connected with the Ethernet interface module and the standard MXM connector.

3. The data distributed processing apparatus of claim 2, wherein the modular motherboard further comprises a first PCIe interface, a third standard interface, and a first GBE interface; the first Ethernet controller unit is connected to the processor unit through the first PCIe interface and connected to the standard golden finger interface through the first GBE interface; the processor unit is connected to the standard golden finger interface through the third standard interface.

4. The distributed data processing apparatus according to claim 2, wherein the ethernet interface module includes a first ethernet interface unit and a second ethernet interface unit;

the FPGA carrier plate also comprises a second PCIe interface, a second GBE interface and a third GBE interface;

the second ethernet controller unit is connected to the standard MXM connector through a second PCIe interface;

the first Ethernet interface unit is connected to the standard MXM connector through the second GBE interface;

the second ethernet interface unit is connected to the second ethernet controller unit through the third GBE interface.

5. The distributed data processing device according to any one of claims 1 to 4, wherein the FPGA carrier board further comprises a USB interface unit, a SATA interface unit and a USB high-speed communication unit;

the USB interface unit and the SATA interface unit are both connected with the standard MXM connector;

one end of the USB high-speed communication unit is connected with the standard MXM connector, and the other end of the USB high-speed communication unit is connected with the FPGA chip unit.

6. The distributed data processing apparatus according to claim 5, wherein the FPGA carrier further comprises a first USB interface, a SATA interface, a second USB interface, and a ULPI interface;

the USB interface unit is connected to the standard MXM connector through the first USB interface;

the SATA interface unit is connected to the standard MXM connector through the SATA interface;

the USB high-speed communication unit is connected to the standard MXM connector through the second USB interface and is connected to the FPGA chip unit through the ULPI interface.

7. The data distributed processing apparatus as claimed in claim 6, wherein the modular motherboard further comprises an eMMC memory unit and a DDR memory unit; the eMMC storage unit and the DDR storage unit are both connected with the processor unit;

the FPGA carrier plate also comprises a FLASH storage unit and a display terminal unit; the FLASH storage unit and the display terminal unit are both connected with the FPGA chip unit.

8. The distributed data processing apparatus as claimed in claim 7, wherein said modular motherboard further comprises a first standard interface and a 64-bit bus; the eMMC memory unit is connected to the processor unit through the first standard interface; the DDR memory unit is connected to the processor unit through the 64-bit bus;

the FPGA carrier plate also comprises an SPI interface, a display interface, a touch interface, a GPIO interface and an LVDS interface; the FLASH storage unit is connected to the FPGA chip unit through the SPI interface; the display terminal unit is connected to the FPGA chip unit through the display interface and the touch interface; the DMX512 interface unit is connected to the FPGA chip unit through the GPIO interface; the FPGA chip unit is connected to the standard MXM connector through the LVDS interface.

9. The distributed data processing apparatus according to claim 8, wherein the FPGA carrier board further comprises a power module for supplying power, the power module being connected to the standard MXM connector; the modularized mainboard further comprises a power management unit and a second standard interface; one end of the power management unit is connected with the standard golden finger interface, and the other end of the power management unit is connected with the processor unit through the second standard interface.

10. A stage lighting control system, comprising: a stage lighting control console, an Ethernet switch, a plurality of lighting terminal devices, and a plurality of data distributed processing apparatuses according to any one of claims 1 to 9; wherein:

the stage lighting control console is connected with the Ethernet interface module through the Ethernet switch;

and the light terminal equipment is connected with the FPGA chip unit through the DMX512 interface unit.

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