CN217846653U - SiPM time signal reader - Google Patents
SiPM time signal reader Download PDFInfo
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- CN217846653U CN217846653U CN202221441796.0U CN202221441796U CN217846653U CN 217846653 U CN217846653 U CN 217846653U CN 202221441796 U CN202221441796 U CN 202221441796U CN 217846653 U CN217846653 U CN 217846653U
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Abstract
An object of the utility model is to provide a SiPM time signal reader, include: the device comprises a signal leading-out module, a signal buffering module and a signal summing module; the signal leading-out module comprises an array formed by a plurality of SiPMs, each SiPM comprises two output ends, and a first output end is connected with a detection resistor in series; the signal directly led out from the first output end is used as a time signal output by the SiPM; a signal led out after the first output end is connected with the detection resistor in series serves as a first output signal, and a signal led out from a second output end of the SiPM serves as a second output signal; the signal buffer module comprises a plurality of radio frequency amplifiers; the time signal output by each SiPM is introduced into one radio frequency amplifier; the signal summation module comprises an addition amplifying circuit, the output signal of each radio frequency amplifier is connected into the addition amplifying circuit for combination, and the combined signal is used as the time signal of the SiPM array.
Description
Technical Field
The patent of the utility model relates to in medical imaging equipment technical field, concretely relates to SiPM time signal merges reading circuit based on radio frequency amplifier.
Background
Positron Emission Tomography (PET) has been the first diagnostic imaging technique for diseases such as tumors, and the principle thereof is to perform image reconstruction by measuring information such as energy and time of gamma photon events.
Currently, a Silicon Photomultiplier (SiPM) PET system based on a Silicon semiconductor has gradually become the mainstream. Sipms are composed of hundreds or thousands of self-quenched single-photon avalanche photodiodes (SPADs) operating in geiger mode, whose logical structure is schematically shown in fig. 1.
One of the bottlenecks of the existing SiPM technology is its timing signal reading circuit. Since the number of sipms in a PET system can reach as many as ten thousand, if output signals of ten thousand sipms are read one-to-one, hardware resources used by an electronics part of the PET system are quite huge, and the PET system is low in feasibility. The solution of many current systems is to short-circuit and combine signals of multiple sipms into fewer channels for measurement by a subsequent electronic system, and although this method can reduce the number of required measurement channels, combining direct signals of sipms will cause attenuation of time signals of sipms and mix more noise into the signals, thereby causing time performance degradation. Therefore, the time signal merging and reading circuit capable of reducing attenuation of the merged SiPM time signal and not introducing excessive noise is significant to exerting the advantages of the SiPM and realizing higher time resolution
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned shortcomings of the prior art, it is an object of the present invention to provide a SiPM time signal reader, comprising: the device comprises a signal leading-out module, a signal buffering module and a signal summing module; the signal leading-out module comprises an array formed by a plurality of SiPMs, each SiPM comprises two output ends, and a first output end is connected with a detection resistor in series; the signal directly led out from the first output end is used as a time signal output by the SiPM; a signal led out after the first output end is connected with the detection resistor in series is used as a first output signal, and a signal led out from a second output end of the SiPM is used as a second output signal; the signal buffer module comprises a plurality of radio frequency amplifiers; the time signal output by each SiPM is introduced into one radio frequency amplifier; the signal summation module comprises an addition amplifying circuit, the output signal of each radio frequency amplifier is connected to the addition amplifying circuit for combination, and the combined signal is used as the time signal of the SiPM array.
The utility model also provides a SiPM time signal reader, include: the device comprises a signal leading-out module, a signal buffering module and a signal summing module; the signal extraction module comprises a plurality of SiPMs, each SiPM comprises a plurality of SPADs, each SPAD is provided with a cathode output end and an anode output end, the anode output ends of the SPADs are connected with a quick output capacitor in series, and the cathode input ends of the SPADs are connected in parallel to be used as the cathode output end of the SiPM; the anode output ends of the SPADs are connected in parallel to be used as the anode output end of the SiPM, the output ends of the quick output capacitors are connected in parallel to be used as the quick output end of the SiPM, and the time signal is led out from the quick output end of the SiPM; the signal buffer module comprises a plurality of radio frequency amplifiers; each of said time signals is introduced into one of said radio frequency amplifiers; the signal summation module comprises an addition amplifying circuit, the output signal of each radio frequency amplifier is connected to the addition amplifying circuit for combination, and the combined signal is used as the SiPM time signal.
Preferably, in the SiPM time signal reader, the output of the SiPM includes a cathode or an anode of the SiPM.
Preferably, in the SiPM time signal reader, the first and/or second output signal is connected to a bias power supply, or connected to an energy readout circuit, or used for locating a signal source.
Preferably, in the SiPM time signal reader, the first output terminal is a cathode, and the second output terminal is an anode.
Preferably, in the SiPM time signal reader, the second output terminal is a cathode, and the first output terminal is an anode.
Preferably, in the SiPM time signal reader, a first capacitor is disposed at an input end of the radio frequency amplifier.
Preferably, in the SiPM time signal reader, the output end of the radio frequency amplifier is provided with a second capacitor.
Preferably, in the SiPM time signal reader, the summing and amplifying circuit includes an operational amplifier, a plurality of independent input resistors, and a feedback resistor; the output signal of each radio frequency amplifier is connected to the operational amplifier through one input resistor; the feedback resistor Rf is connected across the inverting input and the output of the operational amplifier.
Preferably, in the SiPM time signal reader, an output signal of each of the radio frequency amplifiers is connected to an inverting input terminal of the operational amplifier through one of the input resistors.
Preferably, in the SiPM time signal reader, a non-inverting input terminal of the operational amplifier is connected to a reference voltage signal.
Preferably, in the SiPM time signal reader, the cathode output terminal and/or the anode output terminal is connected with a bias power supply, or connected with an energy reading circuit, or used for positioning a signal source.
Drawings
FIG. 1 is a schematic diagram of a prior art SiPM logic structure;
fig. 2 is a circuit diagram of a first embodiment of the present invention;
fig. 3 is a circuit diagram of a second embodiment of the present invention;
FIG. 4 is a schematic diagram of the SPAD structure adopted in the third embodiment of the present invention;
fig. 5 is a circuit diagram of a third embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
Fig. 2 is a schematic circuit diagram of an embodiment of the present invention. The utility model discloses a SiPM signal reader includes signal extraction module 1, signal buffer module 2 and signal summation module 3. The signal extraction module 1 comprises several sipms. Each SiPM includes a cathode terminal and an anode terminal connected in series with a sense resistor Rs. The signal directly drawn from the anode terminal is used as the time signal output by the SiPM, the signal drawn from the anode terminal after being connected in series with the detection resistor Rs is used as the anode signal of the SiPM, and the signal drawn from the cathode terminal is used as the cathode signal of the SiPM. The time signal output by each SiPM is connected to the signal buffering module 2. The cathode signal or anode signal of each SiPM can be connected with a bias power supply to supply power for the SiPM, or connected to an energy readout circuit to measure the energy of the SiPM signal. The cathodic signal or the anodic signal can also be used to determine from which SiPM in the array the signal came.
The signal buffer module 2 comprises a plurality of radio frequency amplifiers 21, and the time signal output by each SiPM is independently introduced into one radio frequency amplifier 21, so that the signal is buffered and amplified in the shortest distance, and meanwhile, the interference among the output signals of the SiPMs can be isolated by utilizing the good reverse cut-off characteristic of the radio frequency amplifier, and the signal quality is improved. In order to isolate the direct current and low frequency components in the signal and reduce the introduction of noise, capacitors C1 and C2 are respectively arranged at the input end and the output end of the radio frequency amplifier 21.
The SiPM signals buffered by the signal buffering module 2 are sent to the signal summing module 3. The signal summing module 3 includes an addition amplifying circuit including an operational amplifier, a plurality of independent input resistors Rin, and a feedback resistor Rf. The time signal output from the capacitor C2 is connected to the inverting input terminal of the operational amplifier through the independent input resistor Rin. The non-inverting input of the operational amplifier may be grounded, and a reference voltage signal Vref may be input when a dc bias is required to be provided for the signal. The feedback resistor Rf is connected across the inverting input terminal and the output terminal of the operational amplifier. The time signals output by the SiPMs are sent to an addition amplifying circuit to be combined. Different amplification can be achieved by parameter setting of Rin and Rf, and the combined signal is used as the time signal of the SiPM array. It should be noted that the time signal output from the capacitor C2 can also be connected to the non-inverting input terminal of the operational amplifier through the independent input resistor Rin for in-phase addition and combination, but in contrast, it is more preferable to connect the inverting input terminal.
Fig. 3 is a circuit diagram of a second embodiment of the present invention. The difference from the embodiment of fig. 1 is that the cathode terminal of each SiPM is connected in series with a detection resistor Rs, a signal directly extracted from the cathode terminal is used as a time signal output by the SiPM, a signal extracted after the cathode terminal is connected in series with the detection resistor Rs is used as an anode signal of the SiPM, and a signal extracted from the anode terminal is used as a cathode signal of the SiPM. The time signal output by each SiPM is also buffered by adopting a signal buffering module 2, and then each path of buffered SiPM signals are merged and amplified by a signal summing module 3; the cathode signal or anode signal of each SiPM can be connected with a bias power supply to supply power for the SiPM, or connected to an energy reading circuit to measure the energy of the SiPM signal. The same can be used to determine which SiPM in the array the signal came from. The implementation manners of the signal buffering module 2 and the signal obtaining modules 3 in the second embodiment are the same as those in the first embodiment, and are not described again.
The difference between the third embodiment of the present invention and the first two embodiments is that the SPAD unit structure in SiPM is different, as shown in fig. 4. Each SPAD anode has an integrated fast output capacitor whose outputs are connected in parallel as the fast output of the SiPM from which the time signal is read. In this embodiment, the detection resistor Rs may be omitted, and the anode signal and the cathode signal of each SiPM function as in example one. The circuit schematic of the third embodiment is shown in fig. 5. The fast output mode may improve the timing and photon counting applications compared to the standard output mode. The signal buffering module 2 and the signal obtaining module 3 of the third embodiment are the same as those of the previous two embodiments, and are not repeated.
To sum up, the utility model discloses a SiPM time signal merges readout circuit compares with prior art, when guaranteeing the time signal quality after the mergence, reduces the figure of required time signal measurement passageway by a wide margin, realizes the high performance time signal measurement of super large-scale SiPM array, the cost and the complexity of lowering system.
The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention.
Claims (12)
1. An SiPM time signal reader, comprising:
the device comprises a signal leading-out module, a signal buffering module and a signal summing module;
the signal leading-out module comprises an array formed by a plurality of SiPMs, each SiPM comprises two output ends, and a first output end is connected with a detection resistor in series; the signal directly led out from the first output end is used as a time signal output by the SiPM; a signal led out after the first output end is connected with the detection resistor in series is used as a first output signal, and a signal led out from a second output end of the SiPM is used as a second output signal;
the signal buffer module comprises a plurality of radio frequency amplifiers; the time signal output by each SiPM is introduced into one radio frequency amplifier;
the signal summation module comprises an addition amplifying circuit, the output signal of each radio frequency amplifier is connected to the addition amplifying circuit for combination, and the combined signal is used as the time signal of the SiPM array.
2. The SiPM time signal reader of claim 1, wherein an output of the SiPM comprises a cathode or an anode of the SiPM.
3. The SiPM time signal reader of claim 1, wherein the first and/or second output signal is coupled to a bias power supply, or to an energy sensing circuit, or for locating a signal source.
4. The SiPM time signal reader of claim 1, wherein the first output is a cathode and the second output is an anode.
5. The SiPM time signal reader of claim 1, wherein the second output is a cathode and the first output is an anode.
6. An SiPM time signal reader, comprising:
the device comprises a signal leading-out module, a signal buffering module and a signal summing module;
the signal extraction module comprises a plurality of SiPMs, each SiPM comprises a plurality of SPADs, each SPAD is provided with a cathode output end and an anode output end, the anode output ends of the SPADs are connected with a quick output capacitor in series, and the cathode input ends of the SPADs are connected in parallel to be used as the cathode output end of the SiPM; the anode output ends of the SPADs are connected in parallel to serve as the anode output end of the SiPM, the output ends of the rapid output capacitors are connected in parallel to serve as the rapid output end of the SiPM, and the time signal is led out from the rapid output end of the SiPM;
the signal buffer module comprises a plurality of radio frequency amplifiers; each of said time signals is introduced into one of said radio frequency amplifiers; the signal summation module comprises an addition amplifying circuit, the output signal of each radio frequency amplifier is connected into the addition amplifying circuit for combination, and the combined signal is used as the SiPM time signal.
7. SiPM time signal reader according to claim 1 or 6, characterized in that the input of the radio frequency amplifier is provided with a first capacitance.
8. SiPM time signal reader according to claim 1 or 6, characterized in that the output of the radio frequency amplifier is provided with a second capacitor.
9. The SiPM time signal reader of claim 1 or 6, wherein the summing amplification circuit comprises an operational amplifier, a number of independent input resistors, and a feedback resistor; the output signal of each radio frequency amplifier is connected into the operational amplifier through one input resistor; the feedback resistor Rf is connected across the inverting input terminal and the output terminal of the operational amplifier.
10. The SiPM time signal reader of claim 9, wherein the output signal of each of the radio frequency amplifiers is coupled to the inverting input of the operational amplifier through one of the input resistors.
11. The SiPM time signal reader of claim 10, wherein a reference voltage signal is coupled to a non-inverting input of the operational amplifier.
12. The SiPM time signal reader of claim 6, wherein said cathode output and/or anode output is signally connected to a bias supply, or to an energy sensing circuit, or for locating a signal source.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202221441796.0U CN217846653U (en) | 2022-06-10 | 2022-06-10 | SiPM time signal reader |
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| CN202221441796.0U CN217846653U (en) | 2022-06-10 | 2022-06-10 | SiPM time signal reader |
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| CN217846653U true CN217846653U (en) | 2022-11-18 |
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