CN217846552U - Time difference measuring device and system - Google Patents
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Abstract
The utility model provides a time difference measuring device and system, among this time difference measuring device, when measuring the time difference of the Pin of many Pin chips, need not to reuse the relay and switches to the same measurement passageway of same time difference measurement integrated circuit board, but can carry out the free distribution of the passageway of awaiting measuring, the efficiency of software testing has been improved, and the measurement start time of awaiting measuring between the passageway is unanimous, the time difference result of record is accurate, when having alleviated the current time difference to the Pin of many Pin chips and having measured, the technical problem that efficiency of software testing is low.
Description
Technical Field
The utility model belongs to the technical field of the technique of time difference measurement and specifically relates to a time difference measuring device and system are related to.
Background
Automatic Test Equipment (ATE) is a semiconductor packageThe key equipment for testing, time parameter measurement, is the key functional technology of ATE equipment. In the field of analog chip testing, the testing equipment is mainly an analog testing machine or a digital-analog hybrid testing machine, and the Time measuring Unit of the automatic testing equipment is called as TMU (Time measurement Unit) in the industry. The time difference is also called the delay time (T) PD ) The phase difference is represented by the time difference of signal edges between A → B, and has several time difference parameter types such as rising edge to rising edge, rising edge to falling edge, falling edge to rising edge, falling edge to falling edge and the like. The time difference parameter test is an important parameter to be measured by the chip, such as the delay time of a transmission gate. Each measurement channel of the TMU board card supports time difference parameter testing, and the time difference parameters only support testing in the A branch and the B branch.
For a multi-Pin chip, when the time difference of each Pin is tested, a relay needs to be switched to two input ports of the same measurement channel of the same TMU board card, the time difference measurement mode reduces the test efficiency, and meanwhile, the design complexity of a product test adapter board (DUT) is increased, and the test board is overstocked.
In summary, how to measure the time difference of the pins of multiple Pin chips efficiently becomes a technical problem that needs to be solved urgently at present.
SUMMERY OF THE UTILITY MODEL
In view of this, the present invention provides a time difference measuring device and system to alleviate the technical problem of low testing efficiency when measuring the time difference of the pins of multiple Pin chips.
In a first aspect, an embodiment of the present invention provides a time difference measuring device, including: the system comprises a communication bus board card and a plurality of time difference measurement board cards connected with the communication bus board card; a plurality of measuring channels are arranged in each time difference measuring board card, wherein the measuring channel connected with a signal to be measured provided by a chip to be measured is a channel to be measured;
the communication bus board card is used for generating a plurality of paths of homologous clock signals and a plurality of paths of synchronous trigger signals according to a time difference measuring instruction provided by an upper computer;
each time difference measuring board card is used for receiving the multiple paths of homologous clock signals and multiple paths of synchronous trigger signals and measuring the edge time of the signal to be measured according to the multiple paths of synchronous trigger signals;
the communication bus board card is further used for calculating the time difference of the edge moment measurement result and generating the time difference of the signal to be measured.
Further, the communication bus board card includes:
a clock source;
the first control unit is connected with the upper computer and used for generating a trigger signal according to the time difference measuring instruction;
the signal distributor is respectively connected with the clock source and the first control unit and used for generating a plurality of paths of homologous clock signals according to the clock signals provided by the clock source; the signal distributor is also used for generating the multi-path synchronous trigger signal according to the trigger signal.
Further, the signal distributor includes:
the clock distributor is connected with the clock source and used for receiving the clock signals sent by the clock source and generating the multiple paths of homologous clock signals according to the clock signals so as to send the multiple paths of homologous clock signals to each time difference measuring board card;
and the synchronous signal distributor is connected with the first control unit and each time difference measuring board card respectively and is used for receiving the trigger signal sent by the first control unit and generating the multi-path synchronous trigger signal according to the trigger signal.
Further, each time difference measurement board card includes:
the second control unit is respectively connected with the first control unit, the synchronous signal distributor, the clock distributor and the measurement channel, and is used for receiving the multiple paths of homologous clock signals and the multiple paths of synchronous trigger signals and controlling the measurement channel which is correspondingly connected to the second control unit to measure according to the multiple paths of synchronous trigger signals;
the second control unit is further configured to measure an edge time of the signal to be measured, so as to generate the edge time measurement result.
Further, the time difference measurement instruction includes: at least one of a rising edge to rising edge time difference command, a rising edge to falling edge time difference command, a falling edge to rising edge time difference command, and a falling edge to falling edge time difference command.
Further, when the number of the time difference measurement board cards is multiple, the number of the measurement channels in the multiple time difference measurement board cards is the same; each measuring channel is provided with two input ports, and the input ports are connected with the chip to be measured.
Furthermore, the lengths of the traces between each time difference measurement board card and the communication bus board card are equal.
Furthermore, lines occupied by the multiple paths of homologous clock signals and the multiple paths of synchronous trigger signals are mutually independent.
Further, the channels to be measured are located in the same time difference measurement board card; or the like, or a combination thereof,
the channels to be measured are located in different time difference measurement board cards.
In a second aspect, the embodiment of the present invention further provides a time difference measuring system, including:
an upper computer;
the time difference measuring device according to any one of the first to third aspects, wherein the time difference measuring device is connected to the upper computer.
In an embodiment of the present invention, a time difference measuring device is provided, including: the system comprises a communication bus board card and a plurality of time difference measurement board cards connected with the communication bus board card; a plurality of measuring channels are arranged in each time difference measuring board card, wherein the measuring channel connected with a signal to be measured provided by the chip to be measured is a channel to be measured; the communication bus board card is used for generating a plurality of paths of homologous clock signals and a plurality of paths of synchronous trigger signals according to a time difference measuring instruction provided by an upper computer; each time difference measuring board card is used for receiving a plurality of paths of homologous clock signals and a plurality of paths of synchronous trigger signals and carrying out edge time measurement on the signal to be measured according to the plurality of paths of synchronous trigger signals; the communication bus board card is also used for calculating the time difference of the edge moment measurement result to generate the time difference of the signal to be measured. According to the above description, the utility model discloses an among the time difference measuring device, when measuring the time difference of the Pin of many Pin chips, need not to reuse the relay and switch over to the same measurement passageway of same TMU integrated circuit board (being time difference measurement integrated circuit board), but can carry out the free distribution of the volume of measuring passageway, the efficiency of software testing has been improved, and the volume of measuring between the passageway of measuring is unanimous for the measuring start time, the time difference result that records is accurate, when having alleviated the current time difference to the Pin of many Pin chips and measuring, the technical problem that efficiency of software testing is low.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the technical solutions in the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is an architecture diagram of a time difference measurement system of a single measurement channel of a TMU board card provided in the prior art;
fig. 2 is an architecture diagram of a time difference measuring apparatus according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a two-channel arbitrary pin configuration time difference measuring apparatus according to an embodiment of the present invention;
fig. 4 is a flowchart of a method for measuring a time difference according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a time difference measuring system according to an embodiment of the present invention.
Reference numerals: 11-communication bus board card; 12-time difference measurement board card; 111-a clock source; 112-a signal distributor; 113-a first control unit; 121-a measurement channel; 122-second control unit.
Detailed Description
The technical solution of the present invention will be described clearly and completely with reference to the following embodiments, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts all belong to the protection scope of the present invention.
When the time difference of each Pin of a multi-Pin chip is measured, a relay needs to be switched to the same measurement channel of the same TMU board card, so that the test efficiency is low, the design complexity of a DUT is increased, and a test board is bloated, as shown in FIG. 1.
Based on this, the utility model discloses an among the time difference measuring device, when measuring the time difference of the Pin of many Pin chips, need not to reuse the relay and switch over to the same measuring channel of same TMU integrated circuit board (being time difference measuring integrated circuit board), but can carry out the free distribution of measuring the passageway, improved efficiency of software testing, and the measuring start time of measuring between the passageway of measuring is unanimous, and the time difference result that records is accurate.
To facilitate understanding of the present embodiment, a time difference measuring device disclosed in the embodiments of the present invention is first described in detail.
Fig. 2 is an architecture diagram of a time difference measuring device according to an embodiment of the present invention, and fig. 3 is a schematic diagram of a time difference measuring device with a dual-channel arbitrary pin configuration, and as shown in fig. 2 and 3, the time difference measuring device includes: the system comprises a communication bus board card 11 and a plurality of time difference measurement board cards 12 connected with the communication bus board card 11; each time difference measurement board card 12 is provided with a plurality of measurement channels 121, and the measurement channel 121 connected to a signal to be measured provided by a chip to be measured is a channel to be measured.
Specifically, the communication bus board 11 is configured to generate a plurality of paths of homologous clock signals and a plurality of paths of synchronous trigger signals according to a time difference measurement instruction provided by an upper computer; each time difference measurement board card 12 is used for receiving a plurality of paths of homologous clock signals and a plurality of paths of synchronous trigger signals, and measuring edge time of a signal to be measured according to the plurality of paths of synchronous trigger signals; the communication bus board 11 is further configured to perform time difference calculation on the edge time measurement result, and generate a time difference of the signal to be measured.
Specifically, fig. 2 shows (M + 1) time difference measurement boards 12, each time difference measurement board is provided with (N + 1) measurement channels 121, and each time difference measurement board 12 is connected to the communication bus board 11.
The multiple paths of homologous clock signals enable the communication bus board 11 to be homologous with the multiple time difference measurement boards 12, which means absolute clock synchronization.
When the time difference measuring circuit board 12 works, pins of a chip to be measured, which provide signals to be measured, are connected with the measuring channels 121 in the time difference measuring board 12, then the communication bus board 11 receives a time difference measuring instruction sent by an upper computer, generates multiple paths of homologous clock signals and multiple paths of synchronous trigger signals according to the time difference measuring instruction, further sends the multiple paths of homologous clock signals and the multiple paths of synchronous trigger signals to each time difference measuring board 12, after each time difference measuring board 12 receives the multiple paths of homologous clock signals and the multiple paths of synchronous trigger signals, carries out edge time measurement on the signals to be measured according to the multiple paths of synchronous trigger signals, sends the measured edge time measurement results to the communication bus board 11, and finally, the communication bus board 11 carries out time difference calculation on the edge time measurement results and sends the calculated time difference of the signals to be measured to the upper computer.
According to the above description, the utility model discloses an among the time difference measuring device, when measuring the time difference of the Pin of many Pin chips, need not to reuse the relay and switches to same measurement passageway 121 of same TMU integrated circuit board (being time difference measurement integrated circuit board 12), but can carry out the free allocation of the passageway 121 of awaiting measuring, and improved efficiency of software testing, and the measurement start time that awaits measuring between the passageway 121 is unanimous, the time difference result that records is accurate, when having alleviated the current time difference to the Pin of many Pin chips and measuring, the technical problem that efficiency of software testing is low.
The following describes the structure of the time difference measuring apparatus:
in an optional embodiment of the present invention, referring to fig. 2, the communication bus board 11 includes a clock source 111, a first control unit 113 and a signal distributor 112, the first control unit 113 is connected to the upper computer, and is configured to generate a trigger signal according to the time difference measurement instruction; the first control unit 113 is further configured to perform time difference calculation on the edge time measurement result, and generate a time difference of the signal to be measured; the signal distributor 112 is respectively connected to the clock source 111 and the first control unit 113, and configured to generate multiple paths of homologous clock signals according to the clock signal provided by the clock source 111; the signal distributor 112 is further configured to generate a plurality of synchronous trigger signals according to the trigger signal.
Specifically, the signal distributor 112 includes a clock distributor and a synchronization signal distributor. The clock distributor is connected with the clock source 111 and is used for receiving the clock signals sent by the clock source 111 and generating multiple paths of homologous clock signals according to the clock signals so as to send the multiple paths of homologous clock signals to each time difference measuring board card; the signal distributor 112 further includes: and the synchronizing signal distributor is respectively connected with the first control unit 113 and each time difference measuring board 12, and is configured to receive the trigger signal sent by the first control unit 113 and generate a plurality of paths of synchronizing trigger signals according to the trigger signal.
The phase of the clock signal is the same as that of the multiple homologous clock signals, and the phase of the trigger signal is the same as that of the multiple synchronous trigger signals.
By way of example, the clock distributor and the synchronization signal distributor each include, but are not limited to, a clock fan-out buffer.
In an optional embodiment of the present invention, the time difference measuring instruction includes: at least one of a rising edge to rising edge time difference command, a rising edge to falling edge time difference command, a falling edge to rising edge time difference command, and a falling edge to falling edge time difference command.
Specifically, the time difference of the signals to be measured is the time difference between the rising edge and the rising edge, the time difference between the rising edge and the falling edge, the time difference between the falling edge and the rising edge, or the time difference between the falling edge and the falling edge of the two signals to be measured.
In an optional embodiment of the present invention, referring to fig. 2, when the number of the time difference measurement board cards 12 is multiple, the number of the measurement channels 121 in the multiple time difference measurement board cards 12 is the same; each measurement channel 121 has two input ports, and the input ports are connected to a chip to be measured.
It should be noted that the number M of the time difference measurement boards 12 may be the same as or different from the number N of the measurement channels 121 in each time difference measurement board.
In the utility model discloses an optional embodiment, refer to fig. 2, the line length of walking between each time difference measurement integrated circuit board 12 and the communication bus integrated circuit board 11 equals to can guarantee the synchronous transmission of signal, the time difference measuring result that finally obtains is accurate.
In an optional embodiment of the present invention, the channels to be measured are located in the same time difference measurement board 12; or the channels to be measured are in different time difference measurement board cards 12.
In an alternative embodiment of the present invention, referring to fig. 2, the time difference measurement board 12 includes a second control unit 122. The second control unit 122 is connected to the first control unit 113, the synchronization signal distributor, the clock distributor, and the measurement channel 121, and is configured to receive multiple channels of homologous clock signals and multiple channels of synchronization trigger signals, and control the measurement channel correspondingly connected to the second control unit to measure according to the multiple channels of synchronization trigger signals; the second control unit 122 is further configured to measure an edge time of the signal to be measured, so as to generate an edge time measurement result.
Specifically, the second control unit 122 starts to prepare for measurement when the rising edge of the received multipath synchronous trigger signal occurs, and starts to count the reference time, so as to measure the edge time of the signal to be measured of the channel to be measured.
It should be noted that, in fig. 2 and fig. 3, the multiple paths of the same-source clock signals and the multiple paths of the synchronous trigger signals are represented by one line between the synchronous signal distributor and the second control unit 122, but in an actual transmission process, the same-source clock signals and the synchronous trigger signals are different lines, that is, the lines occupied by the multiple paths of the same-source clock signals and the multiple paths of the synchronous trigger signals are independent from each other, so that mutual interference between the signals can be avoided, and thus accuracy of measurement is affected.
Specifically, as shown in fig. 2, each measurement channel 121 has two input ports a and B, a second control unit 122 connected to (N + 1) measurement channels 121 is disposed in each time difference measurement board 12, the second control unit 122 completes distribution of a synchronous trigger signal with each measurement channel 121, meanwhile, the second control unit 122 measures an edge time of a signal to be measured to obtain an edge time measurement result, and in addition, the second control unit 122 completes communication with the communication bus board in fig. 2.
The communication bus board card completes the communication relay function between the upper computer and the plurality of time difference measurement board cards 12, and has the functions of data processing, homologous clock signal distribution and synchronous trigger signal distribution. The communication bus board is provided with a clock source 111, a signal distributor 112 and a first control unit 113, and the first control unit 113 completes data communication with each second control unit 122 in the plurality of time difference measurement boards 12.
For the convenience is right the utility model discloses a time difference measuring device's further understanding, the following time difference measuring device who uses the arbitrary pin configuration of binary channels is explained as an example:
fig. 3 shows a schematic diagram of a time difference measuring apparatus configured by two-channel arbitrary pins, and fig. 3 shows a chip to be measured, where a first path of signal to be measured sent by a first signal pin to be measured of the chip to be measured is a, a second path of signal to be measured sent by a second signal pin to be measured of the chip to be measured is B, the first path of signal to be measured a is input to a B1 input port of a CH1 channel (i.e., the channel to be measured 121) of the TMU0 time difference measuring board, the second path of signal to be measured B is input to an a (NM + 1) input port of a CH1 channel (i.e., the channel to be measured 121) of the TMUM time difference measuring board 12, and a time difference between a falling edge of the first path of signal to be measured a and a falling edge of the second path of signal to be measured B is measured.
After the upper computer sends the time difference measurement instruction, the first control unit 113 sends a trigger signal to the synchronous signal distributor, a plurality of synchronous trigger signals are generated after passing through the synchronous signal distributor, the synchronous trigger signals simultaneously reach the TMU0 time difference measurement board 12 and the second control unit 122 of the TMUM time difference measurement board 12, and then reach the CH1 measurement channel 121 of the TMU0 time difference measurement board 12 and the CH1 measurement channel 121 of the TMUM time difference measurement board 12, the two measurement channels 121 simultaneously start to perform measurement, timing is performed by starting with a reference time, the first path of signal to be measured a and the second path of signal to be measured B are input, the second control unit 122 of the TMU0 time difference measurement board 12 measures the falling edge time of the first path of signal to be measured a, and the second control unit 122 of the TMUM time difference measurement board 12 measures the falling edge time of the second path of signal to be measured B.
After the test is finished, the second control unit 122 sends the edge time measurement result to the first control unit 113, and the first control unit 113 performs time difference calculation according to the edge time measurement result and sends the time difference of the to-be-tested signal obtained through calculation to the upper computer.
Referring to fig. 4, a specific flow of measurement is described:
s0: the upper computer sends a power-on instruction to the communication bus board card, and the automatic test equipment is powered on;
s1: starting a clock source of the communication bus board card, generating multiple paths of homologous clock signals through a clock distributor, and enabling the multiple paths of homologous clock signals to reach each second control unit of the multiple time difference measurement board cards after equal-length wiring;
s2: starting power-on configuration of the time difference measurement board cards and completing starting;
s3: the upper computer sends a time difference measuring instruction to the first control unit, the first control unit sends a trigger signal to the synchronous signal distributor according to the time difference measuring instruction, the synchronous signal distributor generates a plurality of synchronous trigger signals according to the trigger signal, and the plurality of synchronous trigger signals reach each second control unit of the plurality of time difference measuring board cards after being routed with equal length;
s4: after the second control unit carries out synchronous calibration processing on the multiple channels, the second control unit starts to measure the test channels based on the rising edges of the multiple synchronous trigger signals and starts to time reference time at the same time;
s5: the chip to be measured outputs signals A and B to be measured to reach the channels to be measured corresponding to the time difference measuring board cards;
s6: the second control unit of the time difference measurement board card measures the edge moments of the signals A and B to be measured;
s7: the second control unit returns the edge time measurement result to the first control unit;
s8: the first control unit calculates time difference according to the edge moment measurement result and sends the calculated time difference to an upper computer;
s9: if the measurement is not finished, repeating the S3-S8 measurement process.
The embodiment of the utility model provides a time difference measurement system is still provided, refer to fig. 5, include: the host computer, like the time difference measuring device in the above embodiment, wherein, the time difference measuring device is connected with the host computer.
For the specific working process of the time difference measuring system, reference is made to the related description of the time difference measuring device, and details are not repeated here.
In addition, in the description of the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood as a specific case by those skilled in the art.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.
Claims (10)
1. A time difference measuring apparatus, characterized by comprising: the system comprises a communication bus board card and a plurality of time difference measurement board cards connected with the communication bus board card; a plurality of measuring channels are arranged in each time difference measuring board card, wherein the measuring channel connected with a signal to be measured provided by a chip to be measured is a channel to be measured;
the communication bus board card is used for generating a plurality of paths of homologous clock signals and a plurality of paths of synchronous trigger signals according to a time difference measuring instruction provided by an upper computer;
each time difference measuring board card is used for receiving the multiple paths of homologous clock signals and multiple paths of synchronous trigger signals and measuring the edge time of the signal to be measured according to the multiple paths of synchronous trigger signals;
the communication bus board card is further used for calculating the time difference of the edge moment measurement result and generating the time difference of the signal to be measured.
2. The time difference measuring device according to claim 1, wherein the communication bus board includes:
a clock source;
the first control unit is connected with the upper computer and used for generating a trigger signal according to the time difference measuring instruction;
the signal distributor is respectively connected with the clock source and the first control unit and used for generating a plurality of paths of homologous clock signals according to the clock signals provided by the clock source; the signal distributor is also used for generating the multi-path synchronous trigger signal according to the trigger signal.
3. The time difference measuring device according to claim 2, wherein the signal distributor comprises:
the clock distributor is connected with the clock source and used for receiving the clock signals sent by the clock source and generating the multiple paths of homologous clock signals according to the clock signals so as to send the multiple paths of homologous clock signals to each time difference measuring board card;
and the synchronous signal distributor is connected with the first control unit and each time difference measuring board card respectively and is used for receiving the trigger signal sent by the first control unit and generating the multi-path synchronous trigger signal according to the trigger signal.
4. A time difference measuring apparatus according to claim 3, wherein each of said time difference measuring boards comprises:
the second control unit is respectively connected with the first control unit, the synchronous signal distributor, the clock distributor and the measurement channel, and is used for receiving the multiple paths of homologous clock signals and the multiple paths of synchronous trigger signals and controlling the measurement channel which is correspondingly connected to measure according to the multiple paths of synchronous trigger signals;
the second control unit is further configured to measure an edge time of the signal to be measured, so as to generate the edge time measurement result.
5. The time difference measurement device according to any one of claims 1 to 4, wherein the time difference measurement instruction includes: at least one of a rising edge to rising edge time difference command, a rising edge to falling edge time difference command, a falling edge to rising edge time difference command, and a falling edge to falling edge time difference command.
6. The apparatus according to any one of claims 1 to 4, wherein when there are a plurality of time difference measurement boards, the number of measurement channels in the plurality of time difference measurement boards is the same; each measuring channel is provided with two input ports, and the input ports are connected with the chip to be measured.
7. A time difference measuring device according to any one of claims 1-4, wherein the length of the trace between each time difference measuring board and the communication bus board is equal.
8. The time difference measuring device according to any one of claims 1-4, wherein the plurality of homologous clock signals and the plurality of synchronized trigger signals occupy lines that are independent of each other.
9. The time difference measuring device according to any one of claims 1 to 4, wherein the channels to be measured are located in the same time difference measuring board card; or the like, or, alternatively,
the channels to be measured are located in different time difference measurement board cards.
10. A time difference measurement system, comprising:
an upper computer;
a time difference measuring device according to any one of claims 1 to 9, said time difference measuring device being connected to said upper computer.
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