CN217719639U - Deep ultraviolet LED chip - Google Patents
Deep ultraviolet LED chip Download PDFInfo
- Publication number
- CN217719639U CN217719639U CN202220476598.1U CN202220476598U CN217719639U CN 217719639 U CN217719639 U CN 217719639U CN 202220476598 U CN202220476598 U CN 202220476598U CN 217719639 U CN217719639 U CN 217719639U
- Authority
- CN
- China
- Prior art keywords
- layer
- pad metal
- metal layer
- deep ultraviolet
- ultraviolet led
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Led Devices (AREA)
Abstract
The utility model relates to a deep ultraviolet LED chip, it is including setting up n-electrode ohmic contact layer (105) on n-semiconductor layer (102) of deep ultraviolet LED epitaxial wafer and setting up p-electrode ohmic contact layer (106) on p-semiconductor layer (104) of deep ultraviolet LED epitaxial wafer, be equipped with on n-electrode ohmic contact layer (105) n-PAD metal level (108) and be equipped with p-PAD metal level (109) on p-electrode ohmic contact layer (106), the surface of n-PAD metal level (108) and p-PAD metal level (109) has unevenness's structure, and have gold tin eutectic layer (110) on n-PAD metal level (108) and p-PAD metal level (109) respectively. The surface of the n-PAD metal layer and the surface of the p-PAD metal layer are provided with uneven structures to improve the adhesion between the n-PAD metal layer and the gold-tin eutectic layer and the heat dissipation, so that the reliability of the deep ultraviolet LED chip is improved.
Description
Technical Field
The utility model belongs to the technical field of semiconductor chip, a dark ultraviolet LED chip is related to.
Background
In the prior art, a structure of a flip deep ultraviolet LED chip is shown in fig. 1. The flip-chip deep ultraviolet LED chip comprises a substrate 101, an n-semiconductor layer 102 arranged on the substrate 101, a quantum well layer 103 arranged on the n-semiconductor layer 102, and a p-semiconductor layer 104 arranged on the quantum well layer 103. An n-electrode ohmic contact layer 105 is arranged on the n-semiconductor layer 102, and a p-ohmic contact layer 106 is arranged on the p-semiconductor layer 104. An n-PAD metal layer 108 is arranged on the n-electrode ohmic contact layer 105, and a p-PAD metal layer 109 is arranged on the p-electrode ohmic contact layer 106. The n-PAD metal layer 108 and the p-PAD metal layer 109 are both provided with a gold-tin eutectic layer 110. And a passivation layer 107 is arranged between the n-electrode ohmic contact layer 105 and the n-PAD metal layer 108 and the p-electrode ohmic contact layer 106 and the p-PAD metal layer 109.
However, the existing flip-chip deep ultraviolet LED chip has poor adhesion between the n-PAD metal layer 108 and the p-PAD metal layer 109 and the gold-tin eutectic layer 110, and poor heat dissipation, so that the heating efficiency of the deep ultraviolet LED chip is much higher than the light emitting efficiency, and the reliability is poor.
In view of the above technical defects in the prior art, the development of a novel deep ultraviolet LED chip is urgently needed.
SUMMERY OF THE UTILITY MODEL
In order to overcome prior art's defect, the utility model provides a deep ultraviolet LED chip, it promotes the adhesion and the heat dissipation between PAD metal level and the gold tin eutectic layer through making metal surface have unevenness's structure to improve deep ultraviolet LED chip's reliability.
In order to achieve the above object, the present invention provides the following technical solutions:
the deep ultraviolet LED chip comprises an n-electrode ohmic contact layer arranged on an n-semiconductor layer of a deep ultraviolet LED epitaxial wafer and a p-electrode ohmic contact layer arranged on a p-semiconductor layer of the deep ultraviolet LED epitaxial wafer, wherein an n-PAD metal layer is arranged on the n-electrode ohmic contact layer, and a p-PAD metal layer is arranged on the p-electrode ohmic contact layer.
Preferably, the rugged structure means that the surfaces of the n-PAD metal layer and the p-PAD metal layer have spaced apart conical or pyramid-shaped pillars, and the height of the conical or pyramid-shaped pillars is less than 1/4 of the thickness of the n-PAD metal layer and the p-PAD metal layer.
Preferably, the n-PAD metal layer and the p-PAD metal layer are formed by stacking Cr, ni, ti, pt, au and Sn.
Preferably, the uppermost layer of the n-PAD metal layer and the p-PAD metal layer is a Sn layer, and an Au layer is arranged below the Sn layer.
Preferably, the n-electrode ohmic contact layer and the p-electrode ohmic contact layer are made of one or more of Cr, ni, al, ag, au, ti, sn, rh and Pt.
Preferably, the deep ultraviolet LED epitaxial wafer includes a substrate, the n-semiconductor layer disposed on the substrate, a quantum well layer disposed on the n-semiconductor layer, and the p-semiconductor layer disposed on the quantum well layer.
Preferably, the substrate is a sapphire substrate.
Compared with the prior art, the utility model discloses a deep ultraviolet LED chip has one or more in following beneficial technological effect:
1. the surface area of the n-PAD metal layer and the surface of the p-PAD metal layer are uneven, so that the adhesion and heat dissipation between the n-PAD metal layer and the gold-tin eutectic layer can be improved, and the reliability of the deep ultraviolet LED chip can be improved.
2. The packaging thrust test effect of the deep ultraviolet LED chip can be improved, and the light attenuation of the deep ultraviolet LED chip can be optimized.
3. Which makes it easier for a gold-tin eutectic layer to be formed on the n-PAD metal layer and the p-PAD metal layer.
Drawings
Fig. 1 is a schematic structural diagram of a conventional deep ultraviolet LED chip.
Fig. 2 is a schematic structural diagram of the deep ultraviolet LED chip of the present invention.
Fig. 3 is a flow chart of a method of making a deep ultraviolet LED chip of the present invention.
FIG. 4 is a schematic diagram of the structure of a deep ultraviolet LED epitaxial wafer with an n-PAD metal layer and a p-PAD metal layer.
FIG. 5 is a schematic structural diagram of the n-PAD metal layer and the p-PAD metal layer after roughening treatment.
Detailed Description
The present invention is further described with reference to the following drawings and examples, which should not be construed as limiting the scope of the present invention.
The utility model relates to a deep ultraviolet LED chip, it promotes the adhesion and the heat dissipation between PAD metal level and the gold tin eutectic layer through making n-PAD metal level and p-PAD metal level surface have unevenness's structure to improve deep ultraviolet LED chip's reliability.
Fig. 2 shows a schematic structural diagram of the deep ultraviolet LED chip of the present invention. As shown in fig. 2, the deep ultraviolet LED chip of the present invention includes a deep ultraviolet LED epitaxial wafer. The deep ultraviolet LED epitaxial wafer comprises a substrate 101, an n-semiconductor layer 102 arranged on the substrate 101, a quantum well layer 103 arranged on the n-semiconductor layer 102, and a p-semiconductor layer 104 arranged on the quantum well layer 103.
Preferably, the substrate 101 is a sapphire substrate.
The deep ultraviolet LED chip further comprises an n-electrode ohmic contact layer 105 arranged on the n-semiconductor layer 102 of the deep ultraviolet LED epitaxial wafer and a p-electrode ohmic contact layer 106 arranged on the p-semiconductor layer 104 of the deep ultraviolet LED epitaxial wafer.
Wherein, an n-PAD metal layer 108 is arranged on the n-electrode ohmic contact layer 105, and a p-PAD metal layer 109 is arranged on the p-electrode ohmic contact layer 106.
Unlike the prior art, in the present invention, the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 have an uneven structure. The rugged structure means that the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 have spaced apart conical or pyramid-shaped pillars, and the height of the conical or pyramid-shaped pillars is less than 1/4 of the thickness of the n-PAD metal layer 108 and the p-PAD metal layer 109.
Preferably, the n-PAD metal layer 108 and the p-PAD metal layer 109 are formed by stacking Cr, ni, ti, pt, au and Sn, and the uppermost layer of the n-PAD metal layer 108 and the p-PAD metal layer 109 is a Sn layer, and an Au layer is below the Sn layer.
The surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 have a gold-tin eutectic layer 110, respectively.
More preferably, the n-electrode ohmic contact layer 105 and the p-electrode ohmic contact layer 106 are made of one or more of Cr, ni, al, ag, au, ti, sn, rh, and Pt.
Fig. 3 shows a flow chart of a method of manufacturing a deep ultraviolet LED chip of the present invention. As shown in fig. 3, the method for preparing the deep ultraviolet LED chip of the present invention comprises the following steps:
1. an n-electrode ohmic contact layer 105 is prepared on the n-semiconductor layer 102 of the deep ultraviolet LED epitaxial wafer and a p-electrode ohmic contact layer 106 is prepared on the p-semiconductor layer 104 of the deep ultraviolet LED epitaxial wafer.
In the present invention, the structure of the deep ultraviolet LED epitaxial wafer is the same as that of the deep ultraviolet LED epitaxial wafer of the prior art, and includes a substrate 101, an n-semiconductor layer 102 disposed on the substrate 101, a quantum well layer 103 disposed on the n-semiconductor layer 102, and a p-semiconductor layer 104 disposed on the quantum well layer 103.
The substrate 101 is preferably a sapphire substrate.
Preferably, the n-electrode ohmic contact layer 105 and the p-electrode ohmic contact layer 106 are made of one or more metals selected from Cr, ni, al, ag, au, ti, sn, rh, pt, and the like. The metals have high reflectivity in a deep ultraviolet band, so that the n-electrode ohmic contact layer 105 and the p-electrode ohmic contact layer 106 made of the metals can reduce absorption of deep ultraviolet light, and thus the luminous efficiency of the deep ultraviolet LED chip can be improved.
Also, in the present invention, the n-electrode ohmic contact layer 105 and the p-electrode ohmic contact layer 106 may be formed by a conventional manufacturing process, for example, photolithography and metal evaporation.
Wherein the lithography technology comprises a common lithography technology, an electron beam lithography technology, a nanoimprint technology or a holographic lithography technology. The metal evaporation can be electron beam evaporation, thermal resistance evaporation, sputtering evaporation and the like. This is not the focus of the present invention and therefore, for the sake of simplicity, it will not be described in detail herein.
2. An n-PAD metal layer 108 is formed on the n-electrode ohmic contact layer 105 and a p-PAD metal layer 109 is formed on the p-electrode ohmic contact layer 106.
The n-PAD metal layer 108 and the p-PAD metal layer 109 can also be prepared by a conventional preparation process, for example, by photolithography and metal evaporation.
In the present invention, preferably, the n-PAD metal layer 108 and the p-PAD metal layer 109 are stacked by using metals such as Cr, ni, ti, pt, au, and Sn. That is, the n-PAD metal layer 108 and the p-PAD metal layer 109 are formed by stacking metal layers such as a Cr layer, a Ni layer, a Ti layer, a Pt layer, an Au layer, and a Sn layer.
More preferably, the uppermost layer of the n-PAD metal layer 108 and the p-PAD metal layer 109 is a Sn layer and an Au layer is below the Sn layer. Thus, the n-PAD metal layer 108 and the p-PAD metal layer 109 are easily fused and shared with a gold-tin eutectic layer described later.
Of course, after the n-PAD metal layer 108 and the p-PAD metal layer 109 are prepared, a passivation layer 107 may be integrally deposited to achieve isolation between the n-electrode ohmic contact layer 105 and the n-PAD metal layer 108 and the p-electrode ohmic contact layer 106 and the p-PAD metal layer 109.
The material used for the passivation layer 107 may be one of silicon oxide, silicon nitride, or aluminum oxide.
After the passivation layer 107 is formed, the passivation layer 107 over the n-PAD metal layer 108 and the p-PAD metal layer 109 may be etched using a dry etching process or the like to expose the surface of the n-PAD metal layer 108p-PAD metal layer 109.
Thereby, a structure as shown in fig. 4 is formed.
3. The surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 are roughened.
In the present invention, the roughening treatment is to form an uneven structure on the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 by using a wet metal etching process.
As shown in fig. 5, the uneven structure formed on the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 means that the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 have spaced apart conical or pyramid-shaped pillars.
Preferably, the height of the conical or pyramidal solid pillar is less than 1/4 of the thickness of the n-PAD metal layer 108 and the p-PAD metal layer 109. Of course, the height of the cone or pyramid-shaped solid column cannot be too small, otherwise, the coarsening effect cannot be achieved. Typically, the height of the cone or pyramid shaped pillars ranges from 10-100nm.
And simultaneously, in the utility model discloses in, do not limit to adjacent the interval between circular cone or the three-dimensional post of pyramid form. Of course, if the distance between adjacent conical or pyramidal pillars is too large, the roughening effect will be affected. Typically, the distance between adjacent ones of said cone or pyramid shaped pillars is 10-60nm.
In addition, in the present invention, the wet metal etching process is to etch the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 for 20 to 90 seconds by using a metal etching solution. The rugged structure can be manufactured on the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109 by the corrosion of the metal etching solution.
The utility model discloses in right the kind of metal etching solution etc. do not do the restriction, as long as metal etching solution can be right n-PAD metal level 108 and p-PAD metal level 109's surface corrodes and etches out unevenness's structure can.
By roughening the surfaces of the n-PAD metal layer 108 and the p-PAD metal layer 109, the surface area can be increased, and the contact surface area with a gold-tin eutectic layer described later can be increased, so that the adhesion strength can be increased, and the heat dissipation performance can be optimized.
4. And respectively manufacturing a gold-tin eutectic layer 110 on the n-PAD metal layer 108 and the p-PAD metal layer 109 after the roughening treatment.
In the present invention, the au-sn eutectic layer 110 can also be prepared by a conventional preparation process, for example, by photolithography and metal vapor deposition.
The utility model discloses a deep ultraviolet LED chip can increase its surface area through making the surface of n-PAD metal level and p-PAD metal level have unevenness's structure to can promote adhesion and heat dissipation between n-PAD metal level and p-PAD metal level and the gold tin eutectic layer, and then can promote the reliability of deep ultraviolet LED chip, and can promote the encapsulation thrust test effect of deep ultraviolet LED chip, optimize the light decay of deep ultraviolet LED chip. At the same time, it makes the gold-tin eutectic layer easier to form on the n-PAD metal layer and the p-PAD metal layer.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention, and do not limit the protection scope of the present invention. Those skilled in the art can modify or substitute the technical solutions of the present invention according to the idea of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims (6)
1. The deep ultraviolet LED chip comprises an n-electrode ohmic contact layer (105) arranged on an n-semiconductor layer (102) of a deep ultraviolet LED epitaxial wafer and a p-electrode ohmic contact layer (106) arranged on a p-semiconductor layer (104) of the deep ultraviolet LED epitaxial wafer, wherein an n-PAD metal layer (108) is arranged on the n-electrode ohmic contact layer (105) and a p-PAD metal layer (109) is arranged on the p-electrode ohmic contact layer (106), and is characterized in that the surfaces of the n-PAD metal layer (108) and the p-PAD metal layer (109) have rugged structures, and the n-PAD metal layer (108) and the p-PAD metal layer (109) are respectively provided with a gold-tin eutectic layer (110).
2. Deep ultraviolet LED chip according to claim 1, characterized in that the rugged structure means that the surfaces of the n-PAD metal layer (108) and p-PAD metal layer (109) have spaced apart conical or pyramid like pillars and the height of the conical or pyramid like pillars is less than 1/4 of the thickness of the n-PAD metal layer (108) and p-PAD metal layer (109).
3. The deep ultraviolet LED chip of claim 1, wherein the n-PAD metal layer (108) and the p-PAD metal layer (109) are stacked with Cr, ni, ti, pt, au, and Sn.
4. The deep ultraviolet LED chip of claim 3, wherein the uppermost layer of the n-PAD metal layer (108) and the p-PAD metal layer (109) is a Sn layer, and an Au layer is below the Sn layer.
5. The deep ultraviolet LED chip of claim 1, wherein said deep ultraviolet LED epitaxial wafer comprises a substrate (101), said n-semiconductor layer (102) disposed on said substrate (101), a quantum well layer (103) disposed on said n-semiconductor layer (102), and said p-semiconductor layer (104) disposed on said quantum well layer (103).
6. The deep ultraviolet LED chip of claim 5, wherein the substrate (101) is a sapphire substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220476598.1U CN217719639U (en) | 2022-03-04 | 2022-03-04 | Deep ultraviolet LED chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220476598.1U CN217719639U (en) | 2022-03-04 | 2022-03-04 | Deep ultraviolet LED chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217719639U true CN217719639U (en) | 2022-11-01 |
Family
ID=83785886
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220476598.1U Active CN217719639U (en) | 2022-03-04 | 2022-03-04 | Deep ultraviolet LED chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217719639U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118398737A (en) * | 2024-07-01 | 2024-07-26 | 山西中科潞安紫外光电科技有限公司 | Deep ultraviolet flip LED chip and preparation method thereof |
-
2022
- 2022-03-04 CN CN202220476598.1U patent/CN217719639U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118398737A (en) * | 2024-07-01 | 2024-07-26 | 山西中科潞安紫外光电科技有限公司 | Deep ultraviolet flip LED chip and preparation method thereof |
| CN118398737B (en) * | 2024-07-01 | 2024-09-10 | 山西中科潞安紫外光电科技有限公司 | Deep ultraviolet flip LED chip and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6530442B2 (en) | Semiconductor light emitting diode having reflective structure and method of manufacturing the same | |
| JP5676396B2 (en) | Substrate removal method for high light extraction LED | |
| CN103682004B (en) | A kind of light emitting diode flip-chip for improving light emission rate and preparation method thereof | |
| JP5911856B2 (en) | Nanowire LED structure and method of fabricating the same | |
| US7067340B1 (en) | Flip-chip light emitting diode and fabricating method thereof | |
| JP5030398B2 (en) | Gallium nitride compound semiconductor light emitting device | |
| US7785910B2 (en) | Light emitting device having protrusion and recess structure and method of manufacturing the same | |
| CN112018223B (en) | Thin film flip structure Micro-LED chip with transfer printing of bonding layer and preparation method thereof | |
| CN100546060C (en) | Inverted trapezoidal microstructure high-brightness light-emitting diode and manufacturing method thereof | |
| KR101134810B1 (en) | Light emitting device and method for fabricating the same | |
| CN102034913A (en) | Metal medium nano structure light-emitting diode and preparation method thereof | |
| JP2009260316A (en) | Semiconductor light-emitting element and illuminating apparatus using the same | |
| CN101188265A (en) | Semiconductor light emitting element and method of manufacturing the same | |
| JP2006294907A (en) | Nitride gallium based compound semiconductor luminous element | |
| US8624279B2 (en) | Light emitting diode substrate and light emitting diode | |
| JP2007281037A (en) | Semiconductor light emitting element, and its manufacturing method | |
| WO2013017040A1 (en) | Method for preparing light-emitting diode with vertical structure by stripping gan base epitaxial layer and sapphire substrate by wet process | |
| CN102332521A (en) | GaN (gallium nitride)-based LED (light-emitting diode) with N-type electrodes in dotted distribution and manufacturing method thereof | |
| WO2017198054A1 (en) | Flip light-emitting diode chip and manufacturing method therefor | |
| CN206834196U (en) | A kind of micron-scale flip LED chips | |
| CN109273573B (en) | LED chip with vertical structure, reflecting electrode and preparation method thereof | |
| CN217719639U (en) | Deep ultraviolet LED chip | |
| CN111200045A (en) | AlGaInP LED chip with mutually independent reflector and P electrode and preparation method thereof | |
| CN109768137B (en) | LED chip with vertical structure and preparation method thereof | |
| JP2015061010A (en) | Group iii nitride semiconductor light emitting element, manufacturing method of the same and packaged body manufacturing method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |