CN217692727U - Novel digital adjustable constant-current charging circuit - Google Patents

Novel digital adjustable constant-current charging circuit Download PDF

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Publication number
CN217692727U
CN217692727U CN202221212540.2U CN202221212540U CN217692727U CN 217692727 U CN217692727 U CN 217692727U CN 202221212540 U CN202221212540 U CN 202221212540U CN 217692727 U CN217692727 U CN 217692727U
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circuit
current
mcu
sampling
voltage sampling
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吴重重
毛鹏
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Luoyang Longsheng Technology Co Ltd
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Luoyang Longsheng Technology Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

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Abstract

The utility model provides a novel adjustable constant current charging circuit of digit, including MCU, voltage sampling circuit, energy memory circuit, drive regulating circuit and current sampling circuit, energy memory circuit, both ends after drive regulating circuit and current sampling circuit establish ties in proper order are for being used for connecting in parallel at DC power supply's port, voltage sampling circuit's output links to each other with MCU's voltage sampling pin, energy memory circuit's output links to each other with voltage sampling circuit's input, current sampling circuit's output links to each other with MCU's current sampling pin, MCU's PWM end links to each other with drive regulating circuit's input. The charging system can effectively reduce the impact current in the charging process, realize the digital regulation of the charging current and improve the stability of the charging system.

Description

Novel digital adjustable constant-current charging circuit
Technical Field
The utility model relates to a charging circuit technical field, what specifically say is a novel adjustable constant current charging circuit of digit.
Background
In a power supply equipment system, in order to ensure that the equipment is not damaged when the system is powered down, a power down maintaining protection circuit is often used and needs to be maintained for a certain time. The conventional power-down maintaining protection circuit uses an energy storage capacitor as a main element, so that a large current overshoot exists when the capacitor is charged. If the protection circuit is not designed perfectly, the electronic components are easily damaged. For different charging time requirements, the current limiting resistor needs to be replaced for adaptation, and the applicability is low.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem, the utility model provides a novel adjustable constant current charging circuit of digit can reduce the impulse current in the charging process effectively, realizes improving charging system's stability to charging current's digital control.
In order to realize the technical purpose, the adopted technical scheme is as follows: the utility model provides a novel adjustable constant current charging circuit of digit, including MCU, voltage sampling circuit, energy memory circuit, drive regulating circuit and current sampling circuit, energy memory circuit, both ends after drive regulating circuit and current sampling circuit establish ties in proper order are for being used for connecting in parallel at DC power supply's port, voltage sampling circuit's output links to each other with MCU's voltage sampling pin, energy memory circuit's output links to each other with voltage sampling circuit's input, current sampling circuit's output links to each other with MCU's current sampling pin, MCU's PWM end links to each other with drive regulating circuit's input.
Further, the voltage sampling circuit comprises two divider resistors, wherein the input end of one divider resistor is connected with the output end of the energy storage circuit, the output end of the one divider resistor is connected with a voltage sampling pin of the MCU, the input end of the other divider resistor is connected with the voltage sampling pin of the MCU, and the output end of the other divider resistor is connected with the negative end of the direct-current power supply.
Further, the energy storage circuit is composed of a capacitor.
Further, the driving regulation circuit comprises at least one MOS transistor connected in parallel, the drain electrode of the MOS transistor is connected with the negative end of the energy storage circuit, the grid electrode of the MOS transistor is connected with the PWM end of the MCU, and the source electrode of the MOS transistor is connected with the current sampling circuit.
Further, the MCU is a DSP chip.
Furthermore, the current sampling circuit is a sampling resistor, one end of the sampling resistor is connected with the current sampling pin of the driving adjusting circuit and the MCU respectively, and the other end of the sampling resistor is connected with the negative end of the direct current power supply.
The utility model has the beneficial effects that: this circuit structure is simple, and reasonable in design is reliable, and accessible MCU sets up charging current, adjusts drive regulating circuit on-time through the pulse width modulation signal of control output, can effectively reduce the electric current when charging to energy storage circuit and overshoot, and simultaneously, the regulation charging time that can be digital through the impulse current when effectively reducing charging to energy storage circuit realizes the constant current effect, has extensive application prospect in the power application field.
The used circuit can be formed by adopting smaller devices, the structure is simpler, the driving adjusting circuit adopts an MOS transistor, the output current is flexibly adjusted by changing the conduction frequency and the duty ratio of the MOS transistor, and the applicability is wider.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
fig. 2 is a circuit diagram of the present invention.
Detailed Description
The technical solution of the present invention will be further described in detail with reference to the accompanying drawings and embodiments.
As shown in fig. 1, a novel digital adjustable constant current charging circuit is connected in parallel to a dc power supply, a dc load is connected in parallel to the dc power supply to supply power to the dc load, the charging circuit comprises an MCU, a voltage sampling circuit, an energy storage circuit, a driving adjustment circuit and a current sampling circuit, and two ends of the energy storage circuit, the driving adjustment circuit and the current sampling circuit which are sequentially connected in series are connected in parallel to an input port of the dc power supply to provide power-down energy for the system. The output end of the voltage sampling circuit is connected with a voltage sampling pin of the MCU, the output end of the energy storage circuit is connected with the input end of the voltage sampling circuit, the output end of the current sampling circuit is connected with a current sampling pin of the MCU, and the PWM end of the MCU is connected with the input end of the driving regulation circuit. The MCU acquires voltage and current parameters of the energy storage circuit during charging, changes the current conduction state in the charging loop by driving the adjusting circuit, realizes adjustment control on the charging current, and realizes charging time control by setting numerical values in the MCU.
The input end of the voltage sampling circuit is connected with the output end of the energy storage circuit, the output end of the voltage sampling circuit is connected with a voltage sampling pin of the MCU, the voltage sampling circuit can be adjusted according to conditions, the measured voltage is reduced, and the voltage is reduced to a voltage range suitable for the MCU to obtain.
The voltage sampling circuit is composed of divider resistors, two resistors can be adopted, the input end of one of the divider resistors is connected with the output end of the energy storage circuit, the output end of the one of the divider resistors is connected with a voltage sampling pin of the MCU, the input end of the other divider resistor is connected with the voltage sampling pin of the MCU, and the output end of the other divider resistor is connected with the negative end of the direct-current power supply.
The energy storage circuit is composed of a capacitor, a single capacitor can be adopted, the positive end of the capacitor is connected with the positive electrode of the direct-current power supply, and the negative end of the capacitor is connected with the driving adjusting circuit.
The driving and adjusting circuit is at least one MOS transistor connected in parallel, the drain electrode of the MOS transistor is connected with the negative end of the energy storage circuit, the grid electrode of the MOS transistor is connected with the PWM end of the MCU, and the source electrode of the MOS transistor is connected with the current sampling circuit.
The MCU is a DSP chip.
The current sampling circuit is a sampling resistor, one end of the sampling resistor is connected with the current sampling pin of the driving adjusting circuit and the MCU respectively, and the other end of the sampling resistor is connected with the negative end of the direct-current power supply.
The utility model discloses a "VIN" and "LOAD" are direct current input port and the direct current LOAD of this circuit respectively. "GND" is the DC input reference ground.
As shown in fig. 2, the utility model provides a novel adjustable constant current charging circuit of digit, it includes N channel MOS pipe Q1, energy storage electric capacity C1, sampling resistance R1, divider resistance R2, divider resistance R3 and digital control chip MCU. The drain (D end) of an N-channel MOS tube Q1 is connected with the negative end pin of an energy storage capacitor C1, the source (S end) is connected with the upper end of a sampling resistor R1, and the grid end (G end) is connected with the pulse width modulation signal PWM end of a digital control chip MCU to control the current in the charging loop. The positive end of the energy storage capacitor C1 is connected with the positive end of the input voltage VIN, the negative end of the energy storage capacitor C1 is connected with the drain electrode (D end) of the N-channel MOS tube Q1, and enough energy is stored for use when the system is powered off. The input end of the divider resistor R2 is connected with the output end of the energy storage circuit, the output end of the divider resistor R2 is connected with a voltage sampling pin of the MCU, the input end of the divider resistor R3 is connected with a voltage sampling signal ADC _ V pin of the MCU, and the output end of the divider resistor R is connected with an input voltage VIN (GND end), so that the detection of the charging voltage is realized. The upper end of the sampling resistor R1 is connected with a source electrode (S end) of the N-channel MOS tube Q1, the lower end of the sampling resistor R1 is connected with a negative end (GND end) of an input voltage VIN, and the left end of the sampling resistor R1 is connected with a pin of a current acquisition signal ADC _ I of the MCU, so that the charging current is sampled.
The model parameters of the N-channel MOS tube Q1 are selected according to design requirements.
The type parameters of the energy storage capacitor C1 are selected according to design requirements.
The model parameters of the digital control chip MCU are selected according to design requirements.
The utility model relates to a novel digital adjustable constant current charging circuit, its theory of operation is: when the circuit starts to work, the digital control chip MCU collects the voltage of the positive end of the energy storage capacitor through the voltage sampling circuit or directly obtains a voltage collection signal ADC _ V, and when the input voltage VIN rises and reaches a preset value, the digital control chip MCU starts a pulse width modulation signal PWM to control the grid end (G end) of the N-channel MOS tube Q1. Meanwhile, a current sampling circuit is used for obtaining a current acquisition signal ADC _ I, the magnitude of charging current in the power supply circuit is calculated, the charging current is compared with a set charging current value, and a PWM (pulse width modulation) signal with variable frequency and dynamic duty ratio is output to a grid terminal (G terminal) of an MOS (metal oxide semiconductor) tube Q1, so that the conduction time of the MOS tube is controlled. The impact current in the charging process can be effectively reduced, and constant-current charging is realized.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (6)

1. The utility model provides a novel adjustable constant current charging circuit of digit which characterized in that: including MCU, voltage sampling circuit, energy memory, drive regulating circuit and current sampling circuit, energy memory, both ends after drive regulating circuit and current sampling circuit establish ties in proper order are for being used for connecting in parallel at DC power supply's port, voltage sampling circuit's output links to each other with MCU's voltage sampling pin, energy memory's output links to each other with voltage sampling circuit's input, current sampling circuit's output links to each other with MCU's current sampling pin, MCU's PWM end links to each other with drive regulating circuit's input.
2. The novel digital adjustable constant-current charging circuit as claimed in claim 1, wherein: the voltage sampling circuit comprises two divider resistors, wherein the input end of one divider resistor is connected with the output end of the energy storage circuit, the output end of the one divider resistor is connected with a voltage sampling pin of the MCU, the input end of the other divider resistor is connected with the voltage sampling pin of the MCU, and the output end of the other divider resistor is connected with the negative end of the direct-current power supply.
3. The novel digital adjustable constant-current charging circuit as claimed in claim 1, wherein: the energy storage circuit is composed of a capacitor.
4. The novel digital adjustable constant-current charging circuit according to claim 1, characterized in that: the driving regulation circuit comprises at least one MOS transistor which is connected in parallel, the drain electrode of the MOS transistor is connected with the negative end of the energy storage circuit, the grid electrode of the MOS transistor is connected with the PWM end of the MCU, and the source electrode of the MOS transistor is connected with the current sampling circuit.
5. The novel digital adjustable constant-current charging circuit as claimed in claim 1, wherein: the MCU is a DSP chip.
6. The novel digital adjustable constant-current charging circuit as claimed in claim 1, wherein: the current sampling circuit is a sampling resistor, one end of the sampling resistor is connected with the current sampling pin of the driving adjusting circuit and the MCU respectively, and the other end of the sampling resistor is connected with the negative end of the direct-current power supply.
CN202221212540.2U 2022-05-20 2022-05-20 Novel digital adjustable constant-current charging circuit Active CN217692727U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221212540.2U CN217692727U (en) 2022-05-20 2022-05-20 Novel digital adjustable constant-current charging circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221212540.2U CN217692727U (en) 2022-05-20 2022-05-20 Novel digital adjustable constant-current charging circuit

Publications (1)

Publication Number Publication Date
CN217692727U true CN217692727U (en) 2022-10-28

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202221212540.2U Active CN217692727U (en) 2022-05-20 2022-05-20 Novel digital adjustable constant-current charging circuit

Country Status (1)

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CN (1) CN217692727U (en)

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