CN217691157U - Package substrate - Google Patents

Package substrate Download PDF

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Publication number
CN217691157U
CN217691157U CN202220611545.6U CN202220611545U CN217691157U CN 217691157 U CN217691157 U CN 217691157U CN 202220611545 U CN202220611545 U CN 202220611545U CN 217691157 U CN217691157 U CN 217691157U
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CN
China
Prior art keywords
layer
region
component
copper
package substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202220611545.6U
Other languages
Chinese (zh)
Inventor
陈先明
冯磊
黄本霞
高峻
洪业杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhuhai Yueya Semiconductor Co ltd
Original Assignee
Zhuhai Yueya Semiconductor Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhuhai Yueya Semiconductor Co ltd filed Critical Zhuhai Yueya Semiconductor Co ltd
Priority to CN202220611545.6U priority Critical patent/CN217691157U/en
Application granted granted Critical
Publication of CN217691157U publication Critical patent/CN217691157U/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83007Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15158Shape the die mounting substrate being other than a cuboid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The utility model discloses a packaging substrate, including the packaging substrate body, be provided with installing zone, joining region and isolation groove on the packaging substrate body, the isolation groove is located the outside of installing zone, and the joining region is located between isolation groove and the installing zone. The mounting area is used for mounting components; the connecting area is used for arranging filling materials; the isolation groove is used for containing the extended filling material and inhibiting the filling material from extending outwards. The utility model discloses a packaging substrate, through the setting of isolation tank, at the in-process that utilizes filling material installation components and parts, can avoid the filling material to outwards extend to the filling material who avoids the components and parts side is not enough and leads to the condition that components and parts drop, and can also avoid the filling material to outwards extend and influence the condition of adjacent components and parts, in addition, can also reduce filling material's loss, be favorable to reduce cost.

Description

Package substrate
Technical Field
The utility model relates to a semiconductor package technical field, in particular to packaging substrate.
Background
In the related art, a filling material is disposed between a component and a package carrier, so that the component is mounted on the package carrier to obtain a package substrate. However, the filling material has certain fluidity and can extend outwards before being heated and cured, so that the connection strength between the components and the package carrier is poor, and the components are easy to fall off.
SUMMERY OF THE UTILITY MODEL
The utility model discloses aim at solving one of the technical problem that exists among the prior art at least. Therefore, the utility model provides an encapsulation base plate can avoid the filler material outwards to spread.
According to the embodiment of the utility model, the packaging substrate comprises a substrate inner layer, an insulating medium layer, a first copper column, a second copper column and a copper column enclosing wall; the insulating medium layer is arranged on the inner layer of the substrate, and an isolation groove is formed in the insulating medium layer; the first copper column is arranged on the inner layer of the substrate and embedded in the insulating medium layer, and the area where the first copper column is located is a first area; the second copper column is arranged on the inner layer of the substrate and embedded in the insulating medium layer, and the area where the second copper column is located is a second area; the copper column enclosing wall is arranged on the substrate inner layer and embedded in the insulating medium layer, the copper column enclosing wall is located between the first area and the second area, and the isolation groove is located at the top of the copper column enclosing wall.
According to the utility model discloses packaging substrate has following beneficial effect at least: the first area is used for setting up the components and parts of being connected with first copper post, and the second area is used for setting up the adjacent components and parts of being connected with second copper post, and the isolation groove is used for preventing the outside diffusion of the filler material who adopts when installing components and parts. Based on the arrangement of the isolation grooves, in the installation process of the components, the filling materials can be extended into the isolation grooves and stop extending outwards under the prevention of the isolation grooves, so that the situation that the components fall off due to the fact that the filling materials on the side faces of the components are insufficient is avoided, the situation that the electric performance of the adjacent components is influenced due to the fact that the filling materials extend outwards can be avoided, in addition, the filling materials are prevented from extending outwards through the isolation grooves, the loss of the filling materials can be reduced, and the cost is reduced.
According to some embodiments of the present invention, the isolation groove is in the shape of a loop, and the isolation groove is wound around the first region, so as to avoid the filling material provided on either side of the first region from spreading outwards.
According to the utility model discloses a some embodiments, the first section of isolation groove the second section of isolation groove with the third section of isolation groove connects gradually, just the second section of isolation groove is located first region with between the second region, the first section of isolation groove is located the first side of first region, the third section of isolation groove is located the second side of first region, the first side of first region with the second side of first region is relative mutually to be convenient for prevent the outside diffusion of filler material from the adjacent one side of the second section place position of isolation groove.
According to the utility model discloses a some embodiments still include components and parts and fill the glue film, components and parts are installed on the insulating medium layer, and be located in the first region, and with first copper columnar connection, the first end setting of packing the glue film is in on the insulating medium layer, and be located in the first region, and with components and parts are connected, the second end setting of packing the glue film is in the isolation tank to make packaging substrate possess corresponding function.
According to some embodiments of the utility model, be provided with the metal pad on the insulating medium layer, the metal pad is located in the first region, and with first copper columnar connection, components and parts pass through the metal pad is installed on the insulating medium layer, and pass through the metal pad with first copper columnar connection to make components and parts can establish the electric connection relation with the base plate inlayer.
According to the utility model discloses a some embodiments, be provided with the interconnection layer on the metal pad, components and parts loop through the interconnection layer the metal pad with first copper columnar connection is favorable to improving the stability that components and parts and metal pad are connected.
According to the utility model discloses a some embodiments, be provided with on the insulating medium layer with the circuit layer of first copper columnar connection, components and parts pass through the circuit layer is installed on the insulating medium layer, and pass through the circuit layer with first copper columnar connection to make components and parts can establish the electric connection relation with the base plate inlayer.
According to the utility model discloses a some embodiments, still be provided with the encapsulated layer on the insulating medium layer, the encapsulated layer covers components and parts to the use of encapsulation base plate of still being convenient for simultaneously is protected components and parts.
According to the utility model discloses a some embodiments, insulating medium layer is sensitization insulating medium layer to the mode processing through exposure development obtains the isolation tank.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic cross-sectional view of a package substrate according to an embodiment of the present invention (a part of the structure is omitted);
fig. 2 is a plan view (with a portion of the structure omitted) of the package substrate shown in fig. 1;
fig. 3 is a top view (with a portion of the structure omitted) of a package substrate according to some embodiments of the present invention;
fig. 4 is a top view (with a portion of the structure omitted) of a package substrate according to another embodiment of the present invention;
FIG. 5 is a cross-sectional view of the package substrate shown in FIG. 1;
fig. 6 is a schematic cross-sectional view (with part of the structure omitted) of a package substrate according to some embodiments of the present invention;
fig. 7 is a plan view (with a portion of the structure omitted) of the package substrate shown in fig. 6;
FIG. 8 is a cross-sectional view of the package substrate shown in FIG. 6;
fig. 9 is a schematic cross-sectional view (with a part of the structure omitted) of a package substrate according to another embodiment of the present invention.
The reference numbers are as follows:
the structure comprises a substrate inner layer 100, an insulating dielectric layer 200, a first area 300, a first copper column 310, a component 320, a metal pad 330, an interconnection layer 331, a second area 400, a second copper column 410, a copper column fence 500, an isolation groove 510, a first section 511, a second section 512, a third section 513, a filling adhesive layer 600, a circuit layer 700 and an encapsulation layer 800.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are exemplary only for explaining the present invention, and should not be construed as limiting the present invention.
In the description of the present invention, it should be understood that the directional descriptions, such as the directions or positional relationships indicated by upper, lower, front, rear, left, right, etc., are based on the directions or positional relationships shown in the drawings, and are only for convenience of description and simplification of the description, but not for indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and thus should not be construed as limiting the present invention.
In the description of the present invention, a plurality of means are one or more, a plurality of means are two or more, and the terms greater than, less than, exceeding, etc. are understood as not including the present number, and the terms greater than, less than, within, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless there is an explicit limitation, the words such as setting, installation, connection, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in combination with the specific contents of the technical solution.
The package substrate can provide functions of electrical connection, protection, support, heat dissipation, assembly and the like for the component 320, so as to achieve the purposes of multi-pin, reduction of the volume of a packaged product, improvement of electrical performance and heat dissipation, and multi-chip modularization.
The package carrier is used for carrying the component 320, and after the component 320 is mounted on the package carrier, a package substrate is obtained, and the package substrate may have corresponding functions.
In the related art, the connection strength between the component 320 and the package carrier is improved by disposing the filling material, however, the filling material has certain fluidity during use and is easily extended outwards, that is, in the package substrate with many and dense components 320, the disposed filling material is easily extended to the adjacent component 320, so as to affect the electrical performance of the adjacent component 320, and the outward extension of the filling material may cause the connection strength between the component 320 and the package carrier to be reduced.
Referring to fig. 1, the present embodiment provides a package substrate, including a substrate inner layer 100, an insulating dielectric layer 200, a first copper pillar 310, a second copper pillar 410, and a copper pillar fence 500; the insulating medium layer 200 is arranged on the substrate inner layer 100, and the insulating medium layer 200 is provided with an isolation groove 510; the first copper pillar 310 is disposed on the substrate inner layer 100 and embedded in the insulating dielectric layer 200, and the region where the first copper pillar 310 is located is the first region 300; the second copper pillar 410 is disposed on the substrate inner layer 100 and embedded in the insulating dielectric layer 200, and the region where the second copper pillar 410 is located is the second region 400; the copper pillar fence 500 is disposed on the substrate inner layer 100 and embedded in the insulating dielectric layer 200, the copper pillar fence 500 is located between the first region 300 and the second region 400, and the isolation trench 510 is located at the top of the copper pillar fence 500.
The first region 300 is used for arranging the component 320 connected with the first copper pillar 310, the second region 400 is used for arranging the component 320 connected with the second copper pillar 410, and the isolation groove 510 is used for preventing the filling material adopted when the component 320 is installed from spreading outwards. Based on the arrangement of the isolation groove 510, in the installation process of the component 320, the filling material may diffuse into the isolation groove 510, and stop diffusing outward under the prevention of the isolation groove 510, so as to avoid the situation that the component 320 falls off due to insufficient filling material on the side surface of the component 320, and further avoid the situation that the electrical performance of the adjacent component 320 is affected due to the outward diffusion of the filling material, and in addition, the outward diffusion of the filling material is prevented by the isolation groove 510, so that the loss of the filling material can be reduced, and the cost reduction is facilitated.
Note that, in the package substrates shown in fig. 1 to 9, the second copper pillar 410 in a part of the second region 400 is not shown.
It should be noted that the number of the second regions 400 may be several, that is, a region adjacent to the first region 300 may be the second region 400.
It should be noted that the shape of the isolation groove 510 may be set according to actual requirements. For example, referring to fig. 2, the isolation trench 510 is in a loop shape, and the isolation trench 510 is disposed around the first region 300, so that when the component 320 is fixed on the first region 300 by the filling material, the filling material on either side of the first region 300 is prevented from being extended outward by the isolation trench 510; alternatively, referring to fig. 4, the isolation trench 510 has a rectangular shape and is located between the first area 300 and the second area 400 so as to prevent the filling material from extending from the first area 300 to the second area 400; alternatively, referring to fig. 3, the first section 511 of the isolation trench 510, the second section 512 of the isolation trench 510, and the third section 513 of the isolation trench 510 are sequentially connected, and the second section 512 of the isolation trench 510 is located between the first region 300 and the second region 400, the first section 511 of the isolation trench 510 is located on the first side of the first region 300, the third section 513 of the isolation trench 510 is located on the second side of the first region 300, and the first side of the first region 300 and the second side of the first region 300 are opposite to each other, in fig. 4, the second section 512 of the isolation trench 510 is located on the right side of the first region 300, the first section 511 of the isolation trench 510 is located on the front side of the first region 300, and the first section 511 of the isolation trench 510 is located on the rear side of the first region 300, so as to prevent the filling material from extending outward from the side adjacent to the second section 512 of the isolation trench 510, that is to prevent the filling material from extending outward from the front side or the rear side of the first region 300, and to reduce the loss of the filling material.
It should be noted that the insulating dielectric layer 200 is used for insulation, in the above embodiment, the insulating dielectric layer 200 may not have photosensitive property, and the isolation trenches 510 on the insulating dielectric layer 200 may be processed by a laser process or a copper pillar process.
In addition, in some embodiments, the insulating medium layer 200 is a photosensitive insulating medium layer, and in this embodiment, the photosensitive insulating medium layer may be subjected to an exposure and development process, so as to obtain the isolation trench 510.
Referring to fig. 5, the package substrate further includes a component 320 and a filling adhesive layer 600, the component 320 is mounted on the insulating dielectric layer 200, and is located in the first region 300 and connected to the first copper pillar 310, a first end of the filling adhesive layer 600 is disposed on the insulating dielectric layer 200, and is located in the first region 300 and connected to the component 320, and a second end of the filling adhesive layer 600 is disposed in the isolation groove 510. The filling adhesive layer 600 is made of a filling material and is used for fixing the component 320. In the processing process, the filling material is a viscous material with fluidity, after the processing is completed, the filling material is cured to form the filling adhesive layer 600, the isolation groove 510 can accommodate the filling material to prevent the filling material from extending outwards, so that the filling adhesive layer 600 formed by curing the filling material has a larger area for connecting with the component 320, the connection strength between the component 320 and the insulating medium layer 200 is higher, the component 320 is prevented from falling off from the first region 300, the connection between the component 320 and the first copper pillar 310 is more stable, the packaging substrate has corresponding and stable functions, and the packaging substrate is used favorably.
It should be noted that the component 320 may be an active device, such as an integrated chip, and the component 320 may also be a passive device, such as a chip resistor, a chip capacitor, and the like.
The filling material may be an adhesive such as an epoxy resin adhesive or a heat-dissipating silica gel. In this embodiment, the filling material is an epoxy resin adhesive, which is obtained by processing epoxy resin mainly, the epoxy resin is a high molecular polymer, and due to the chemical activity of an epoxy group, a plurality of compounds containing active hydrogen can be used to open a ring, and a network structure is formed by curing and crosslinking, so that the epoxy resin is also a thermosetting resin, and the epoxy resin has good heat resistance and electrical insulation property, and has strong adhesion to metal.
Referring to fig. 5, 6 and 8, a metal pad 330 is disposed on the insulating medium layer 200, the metal pad 330 is located in the first region 300 and connected to the first copper pillar 310, and the component 320 is mounted on the insulating medium layer 200 through the metal pad 330 and connected to the first copper pillar 310 through the metal pad 330. The area where the first copper pillar 310 is located is the first area 300, the first copper pillar 310 is located in the insulating dielectric layer 200, the metal pad 330 is disposed on the insulating dielectric layer 200 and connected to the first copper pillar 310, and the metal pad 330 is also located in the first area 300; the component 320 is connected to the metal pad 330, and thus is mounted on the first region 300 and connected to the first copper pillar 310, so as to establish an electrical connection relationship with the substrate inner layer 100, and thus the package substrate has a corresponding function.
It should be noted that the number and the shape of the metal pads 330 may be set according to actual requirements, for example, referring to fig. 2, fig. 3 or fig. 4, the number of the metal pads 330 is one, and the shape of the metal pads 330 may be a rectangle; alternatively, referring to fig. 6, 7 or 8, the number of the metal pads 330 is plural, and the shape of the metal pads 330 may be a circle.
Referring to fig. 8, in some embodiments, an interconnect layer 331 is disposed on the metal pad 330, and the component 320 is connected to the first copper pillar 310 sequentially through the interconnect layer 331 and the metal pad 330. The component 320 is connected to the interconnection layer 331 to improve the reliability of the connection between the component 320 and the metal pad 330, so as to improve the stability of the electrical connection relationship established between the component 320 and the substrate inner layer 100. It should be noted that the interconnection layer 331 may be made of a metal material such as tin.
Referring to fig. 9, in some embodiments, a wiring layer 700 connected to the first copper pillar 310 is disposed on the insulating dielectric layer 200, and the component 320 is mounted on the insulating dielectric layer 200 through the wiring layer 700 and connected to the first copper pillar 310 through the wiring layer 700. The circuit layer 700 is disposed on the insulating dielectric layer 200, a portion of the circuit layer 700 is located in the first region 300, and another portion of the circuit layer 700 may be located in the second region 400 or in the isolation trench 510 according to actual requirements. The first end of the filling adhesive layer 600 is connected to the component 320, the first end of the filling adhesive layer 600 is also located in the first region 300, and the second end of the filling adhesive layer 600 is located in the isolation groove 510, so that the filling adhesive layer 600 may cover the circuit layer 700.
Referring to fig. 4 or 8, an encapsulation layer 800 is further disposed on the insulating dielectric layer 200, and the encapsulation layer 800 covers the component 320. The encapsulation layer 800 is used for protecting the component 320, so as to be beneficial to preventing the component 320 from directly falling off or being damaged under the action of external force, facilitate the use of the encapsulation substrate, prevent a human body from directly contacting the component 320 in the encapsulation substrate, and further avoid influencing the electrical property of the component 320.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge of those skilled in the art.

Claims (9)

1. A package substrate, comprising:
a substrate inner layer;
the insulating medium layer is arranged on the inner layer of the substrate and is provided with an isolation groove;
the first copper column is arranged on the inner layer of the substrate and embedded in the insulating medium layer, and the area where the first copper column is located is a first area;
the second copper column is arranged on the inner layer of the substrate and embedded in the insulating medium layer, and the area where the second copper column is located is a second area;
copper post enclosure sets up on the base plate inlayer, and inlay and be in the insulating medium layer, copper post enclosure is located first region with between the second region, the isolation tank is located the top of copper post enclosure.
2. The package substrate of claim 1, wherein the isolation trench is shaped as a loop, and the isolation trench is disposed around the first region.
3. The package substrate of claim 1, wherein the first section of the isolation trench, the second section of the isolation trench, and the third section of the isolation trench are sequentially connected, the second section of the isolation trench is located between the first region and the second region, the first section of the isolation trench is located on a first side of the first region, the third section of the isolation trench is located on a second side of the first region, and the first side of the first region and the second side of the first region are opposite to each other.
4. The package substrate of claim 1, further comprising a component and a filling adhesive layer, wherein the component is mounted on the insulating dielectric layer and located in the first region and connected to the first copper pillar, a first end of the filling adhesive layer is disposed on the insulating dielectric layer and located in the first region and connected to the component, and a second end of the filling adhesive layer is disposed in the isolation groove.
5. The package substrate according to claim 4, wherein a metal pad is disposed on the insulating medium layer, the metal pad is located in the first region and connected to the first copper pillar, and the component is mounted on the insulating medium layer through the metal pad and connected to the first copper pillar through the metal pad.
6. The package substrate according to claim 5, wherein an interconnection layer is disposed on the metal pad, and the component is connected to the first copper pillar sequentially through the interconnection layer and the metal pad.
7. The package substrate according to claim 4, wherein a circuit layer connected to the first copper pillar is disposed on the insulating dielectric layer, and the component is mounted on the insulating dielectric layer through the circuit layer and connected to the first copper pillar through the circuit layer.
8. The package substrate of claim 4, wherein an encapsulation layer is further disposed on the insulating dielectric layer, and the encapsulation layer covers the component.
9. The package substrate of claim 1, wherein the insulating dielectric layer is a photosensitive insulating dielectric layer.
CN202220611545.6U 2022-03-18 2022-03-18 Package substrate Active CN217691157U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220611545.6U CN217691157U (en) 2022-03-18 2022-03-18 Package substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220611545.6U CN217691157U (en) 2022-03-18 2022-03-18 Package substrate

Publications (1)

Publication Number Publication Date
CN217691157U true CN217691157U (en) 2022-10-28

Family

ID=83730400

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202220611545.6U Active CN217691157U (en) 2022-03-18 2022-03-18 Package substrate

Country Status (1)

Country Link
CN (1) CN217691157U (en)

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GR01 Patent grant