CN217656422U - Anti-lock digital knob circuit - Google Patents
Anti-lock digital knob circuit Download PDFInfo
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- CN217656422U CN217656422U CN202221562173.9U CN202221562173U CN217656422U CN 217656422 U CN217656422 U CN 217656422U CN 202221562173 U CN202221562173 U CN 202221562173U CN 217656422 U CN217656422 U CN 217656422U
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- 239000003990 capacitor Substances 0.000 claims abstract description 40
- 241001589086 Bellapiscis medius Species 0.000 claims 1
- 238000007599 discharging Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
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Abstract
The utility model discloses an anti-lock digital turn-knob circuit relates to electron technical field, include: the input ends of the first anti-locking circuit and the second anti-locking circuit are connected with the digital knob, and the output ends of the first anti-locking circuit and the second anti-locking circuit are connected with the input and output interface of the microprocessor; the first anti-deadlock circuit includes: the first end of the first resistor is connected with a power supply, the second end of the first resistor is connected with the negative end of the first capacitor, the positive end of the first capacitor is connected with the negative end of the first diode, and the positive end of the first diode is connected with the first input/output interface of the microprocessor; the cathode of the first diode is grounded through a third resistor, the cathode of the first capacitor is grounded through a second resistor, and the cathode of the first capacitor is connected with the first output end of the digital knob; the utility model discloses an electric capacity and diode are kept apart and are played the dead function of anti-lock.
Description
Technical Field
The utility model relates to the field of electronic technology, concretely relates to digital turn-knob circuit of locking prevention.
Background
The digital programming knob (hereinafter referred to as digital knob) has the advantages of high grade, durability and the like, is widely applied to electronic equipment and instruments and meters, and is generally connected with an input/output interface (hereinafter referred to as IO) of a single chip or microcontroller (hereinafter referred to as MCU). If the digital code is directly connected with the IO of the MCU, sometimes the program is locked due to the fact that an internal mechanism of the digital knob is blocked (hereinafter, the digital knob is locked), so that an output signal of the digital knob is in a low level or a high level for a long time, and the MCU program is locked, so that the program operation is suspended on a certain node, the normal work of a circuit is seriously influenced, and even disastrous results can be caused.
SUMMERY OF THE UTILITY MODEL
In order to solve the deficiencies existing in the prior art, the utility model provides an anti-lock digital turn-knob circuit.
The utility model provides a technical scheme does:
the anti-lock digital knob circuit comprises:
the input ends of the first anti-locking circuit and the second anti-locking circuit are connected with the digital knob, and the output ends of the first anti-locking circuit and the second anti-locking circuit are connected with the input/output interface of the microprocessor;
the first anti-lock circuit includes: the first end of the first resistor is connected with a power supply, the second end of the first resistor is connected with the negative end of the first capacitor, the positive end of the first capacitor is connected with the negative electrode of the first diode, and the positive electrode of the first diode is connected with the first input/output interface of the microprocessor; the cathode of the first diode is grounded through a third resistor, the cathode of the first capacitor is grounded through a second resistor, and the cathode of the first capacitor is connected with the first output end of the digital knob;
the second anti-deadlock circuit includes: the first end of the fourth resistor is connected with a power supply, the second end of the fourth resistor is connected with the negative end of the second capacitor, the positive end of the second capacitor is connected with the negative end of the second diode, and the positive end of the second diode is connected with the second input/output interface of the microprocessor; the cathode of the second diode is grounded through a sixth resistor, the cathode of the second capacitor is grounded through a fifth resistor, and the cathode of the second capacitor is connected with the second output end of the digital knob;
as a further technical scheme of the utility model, the first capacitor and the second capacitor adopt polar electrolytic capacitors.
The utility model has the advantages that:
the utility model discloses a set up first anti-lock dead circuit and second anti-lock dead circuit and control digital knob, when digital knob lock died to cause the output foot to be low level or high level for a long time, owing to have electric capacity and diode to play the isolation, can not make microcontroller's IO foot long time draw down or draw high, can not make the program lock dead promptly, play the anti-lock function of dying.
Drawings
Fig. 1 is a structure diagram of the anti-lock digital knob circuit provided by the present invention.
Detailed Description
The conception, the specific structure, and the technical effects produced by the present invention will be clearly and completely described below in conjunction with the embodiments and the accompanying drawings to fully understand the objects, the features, and the effects of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and other embodiments obtained by those skilled in the art without inventive labor based on the embodiments of the present invention belong to the protection scope of the present invention.
Referring to fig. 1, the anti-lock digital knob circuit includes:
the input ends of the first anti-locking circuit and the second anti-locking circuit are connected with a digital knob K1, and the output ends of the first anti-locking circuit and the second anti-locking circuit are connected with an input/output interface of the microprocessor;
the first anti-lock circuit includes: the first resistor R1, the second resistor R2, the first capacitor C1, the third resistor R3 and the first diode D1, wherein the first end of the first resistor R1 is connected with a power supply, the second end of the first resistor R1 is connected with the negative end of the first capacitor C1, the positive end of the first capacitor C1 is connected with the negative end of the first diode D1, and the positive end of the first diode D1 is connected with a first input/output interface of the microprocessor MCU; the cathode of the first diode D1 is grounded through a third resistor R3, the cathode of the first capacitor C1 is grounded through a second resistor R2, and the cathode of the first capacitor C1 is connected with the first output end of the digital knob K1;
the second anti-deadlock circuit includes: the first end of the fourth resistor R4 is connected with the power supply, the second end of the fourth resistor R4 is connected with the negative electrode end of the second capacitor C2, the positive electrode end of the second capacitor C2 is connected with the negative electrode of the second diode D2, and the positive electrode of the second diode D2 is connected with the second input/output interface of the microprocessor MCU; the cathode of the second diode D2 is grounded through a sixth resistor R6, the cathode of the second capacitor C2 is grounded through a fifth resistor R5, and the cathode of the second capacitor C2 is connected with the second output end of the digital knob K1;
in the embodiment of the present invention, the first capacitor and the second capacitor are polar electrolytic capacitors. The embodiment of the utility model provides an add an anti-lock digital turn-knob circuit of dying between digital turn-knob and MCU's IO, it dies to the MCU lock to prevent that digital knob output signal from being in low level or high point tie for a long time, guarantee the normal work of circuit, digital turn-knob normal during operation, high low level sequence signal is sent out to 1 foot of digital knob, through first electric capacity C1, with the IO foot P1.1 of first diode D1 conveying to MCU, high low level sequence signal is sent out to 2 feet of digital knob, IO foot P1.2 through the MCU that second electric capacity C2 and second diode D2 conveyed. The values of the first resistor R1, the second resistor R2, the third resistor R3 and the first capacitor C1 determine the charging and discharging time of the first anti-lock circuit, and τ = RC, i.e., the response speed of the digital knob; similarly, the values of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the second capacitor C2 determine the charging and discharging time of the second anti-lock circuit:
when the digital knob is locked to cause that 1 or 2 pins are low level (GND) or high level for a long time, the P1.1 or P1.2 is not pulled down or pulled up for a long time due to the isolation effect of the capacitor and the diode, namely, the program is not locked to play a role of anti-locking.
The present invention has been described in detail, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the knowledge range of those skilled in the art. Many other changes and modifications can be made without departing from the spirit and scope of the invention. It is to be understood that the invention is not limited to the specific embodiments, but is intended to be limited only by the scope of the appended claims.
Claims (2)
1. An anti-lock digital turn-knob circuit, comprising:
the input ends of the first anti-locking circuit and the second anti-locking circuit are connected with the digital knob, and the output ends of the first anti-locking circuit and the second anti-locking circuit are connected with the input and output interface of the microprocessor;
the first anti-deadlock circuit includes: the first end of the first resistor is connected with a power supply, the second end of the first resistor is connected with the negative end of the first capacitor, the positive end of the first capacitor is connected with the negative electrode of the first diode, and the positive electrode of the first diode is connected with the first input/output interface of the microprocessor; the cathode of the first diode is grounded through a third resistor, the cathode of the first capacitor is grounded through a second resistor, and the cathode of the first capacitor is connected with the first output end of the digital knob;
the second anti-deadlock circuit includes: the first end of the fourth resistor is connected with the power supply, the second end of the fourth resistor is connected with the negative end of the second capacitor, the positive end of the second capacitor is connected with the negative electrode of the second diode, and the positive electrode of the second diode is connected with the second input/output interface of the microprocessor; the negative electrode of the second diode is grounded through a sixth resistor, the negative electrode of the second capacitor is grounded through a fifth resistor, and the negative electrode of the second capacitor is connected with the second output end of the digital knob.
2. The anti-lock digital twister circuit of claim 1, wherein said first and second capacitors are polar electrolytic capacitors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221562173.9U CN217656422U (en) | 2022-06-21 | 2022-06-21 | Anti-lock digital knob circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221562173.9U CN217656422U (en) | 2022-06-21 | 2022-06-21 | Anti-lock digital knob circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217656422U true CN217656422U (en) | 2022-10-25 |
Family
ID=83684528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221562173.9U Active CN217656422U (en) | 2022-06-21 | 2022-06-21 | Anti-lock digital knob circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217656422U (en) |
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2022
- 2022-06-21 CN CN202221562173.9U patent/CN217656422U/en active Active
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: Room 301, No. 15 Dawobu Street, Xinya Street, Huadu District, Guangzhou City, Guangdong Province, 510000 (Airport Huadu) Patentee after: Guangdong Tengxiang Technology Co.,Ltd. Address before: 510000 one of the third floor of building a, No.5 Dongsheng Road, Huaxing Industrial Zone, Xinya street, Huadu District, Guangzhou City, Guangdong Province Patentee before: Guangdong Zhongrunzhi Medical Equipment Co.,Ltd. |