CN217640047U

CN217640047U - Protection circuit, chip and electronic equipment

Info

Publication number: CN217640047U
Application number: CN202221669297.7U
Authority: CN
Inventors: 姜艳
Original assignee: Shanghai Awinic Technology Co Ltd
Current assignee: Shanghai Awinic Technology Co Ltd
Priority date: 2022-06-29
Filing date: 2022-06-29
Publication date: 2022-10-21
Anticipated expiration: 2032-06-29

Abstract

The application discloses a protection circuit, a chip and electronic equipment, wherein the protection circuit comprises a power supply control unit, a logic circuit unit and an overvoltage protection unit; the overvoltage protection unit is used for detecting the voltage of the detection end of the power supply control unit and outputting a marking signal; the overvoltage protection unit is respectively connected with the detected end of the logic circuit unit and the detection end of the power control unit, and the overvoltage protection unit is used for disconnecting the power control unit from the logic circuit unit when detecting that the detection end of the power control unit is in overvoltage, and outputting a marking signal to the detection end of the power control unit so that the power control unit maintains a normal power supply state according to the marking signal. This application can make the power of the USB interface of Type-C Type still normally supply power when taking place the excessive pressure abnormal phenomenon.

Description

Protection circuit, chip and electronic equipment

Technical Field

The present application relates to the field of electronic circuit technologies, and in particular, to a protection circuit, a chip, and an electronic device.

Background

Currently, the Type-C USB interface has been widely applied to existing electronic devices. Be equipped with a plurality of pins on the female seat of the USB interface of Type-C Type, wherein, pin CC is the key pin of the USB interface of Type-C Type. The pin CC has important functions of confirming the transmission direction and confirming the forward and reverse insertion, but the overvoltage abnormal phenomenon is easy to occur at the pin CC. When the pin CC is over-voltage, the pin CC is disconnected from the low voltage logic circuit in order to protect the low voltage logic circuit. However, the processor for controlling the connection state of the Type-C USB interface makes a misjudgment of stopping the power supply because the flag signal from the low voltage logic circuit is not detected during the time when the pin CC is disconnected from the low voltage logic circuit. After the processor judges that the power supply is stopped, the power supply of the Type-C USB interface stops supplying power, so that the Type-C USB interface is in a disconnected state. Because the unusual phenomenon of excessive pressure can often take place, the USB interface of Type-C Type can frequent disconnection, and this is unfavorable for the USB interface normal use of Type-C Type.

Disclosure of Invention

To above-mentioned technical problem, this application provides a protection circuit, chip and electronic equipment, can make the power of the USB interface of Type-C Type still normally supply power when taking place the excessive pressure abnormal phenomenon.

The embodiment of the application provides a protection circuit, which comprises a power supply control unit, a logic circuit unit and an overvoltage protection unit;

the overvoltage protection unit is used for detecting the voltage of the detection end of the power supply control unit and outputting a marking signal; the overvoltage protection unit is respectively connected with the detected end of the logic circuit unit and the detection end of the power control unit, and the overvoltage protection unit is used for disconnecting the connection between the power control unit and the logic circuit unit when detecting that the detection end of the power control unit is in overvoltage, and outputting a marking signal to the detection end of the power control unit so that the power control unit maintains a normal power supply state according to the marking signal.

Optionally, the overvoltage protection unit includes a signal module, a switch control module, and a switch module;

the output end of the signal module is connected with the detection end of the power control unit, and the signal module is used for outputting a marking signal to the detection end of the power control unit through the output end of the signal module;

the first end of the switch module is connected with the detected end of the logic circuit unit, and the second end of the switch module is connected with the detected end of the power supply control unit;

the first end of the switch control module is respectively connected with the third end of the switch module and the control end of the signal module, and the second end of the switch control module is connected with the detection end of the power supply control unit;

and the switch control module is used for controlling the switch module to disconnect the connection between the power supply control unit and the logic circuit unit and controlling the output end of the signal module to be connected with the detection end of the power supply control unit when the second end of the switch control module detects that the detection end of the power supply control unit generates overvoltage.

Optionally, the switch module comprises a first switch submodule and a second switch submodule;

the first end of the first switch submodule is connected with the first end of the second switch submodule and serves as the first end of the switch module;

the second end of the first switch submodule is the second end of the switch module;

the second end of the second switch submodule is connected with the third end of the first switch submodule;

and the third end of the second switch submodule is the third end of the switch module.

Optionally, the first switching submodule comprises a switching tube and a diode;

one end of the diode is connected with the first end of the switch tube and is used as the first end of the first switch submodule;

the other end of the diode is connected with the second end of the switch tube and serves as the second end of the first switch submodule;

and the control end of the switching tube is the third end of the first switch submodule.

Optionally, the switch tube is a high voltage field effect tube.

Optionally, the second switch submodule includes a first switch, a second switch, and a voltage source for driving the switching tube;

the first end of the second switch and the first end of the voltage source are both the first ends of the second switch submodule;

the second end of the voltage source is connected with the first end of the first switch;

the second end of the first switch is connected with the second end of the second switch and serves as the second end of the second switch submodule;

and the control end of the first switch and the control end of the second switch are both the third ends of the second switch submodule.

Optionally, the switch control module comprises a sampling submodule and an overvoltage comparator;

the output end of the overvoltage comparator is the first end of the switch control module, the first input end of the overvoltage comparator is connected with the first end of the sampling submodule, and the second input end of the overvoltage comparator is used for inputting reference voltage;

and the second end of the sampling submodule is the second end of the switch control module.

Optionally, the sampling submodule comprises a first resistor and a second resistor;

one end of the first resistor is connected with one end of the second resistor and serves as a first end of the sampling submodule;

the other end of the first resistor is grounded;

the other end of the second resistor is a second end of the sampling submodule.

Optionally, the signal module comprises a third resistor and a third switch;

one end of the third resistor is an output end of the signal module, and the other end of the third resistor is connected with the first end of the third switch;

the second end of the third switch is grounded, and the control end of the third switch is the control end of the signal module.

Optionally, the protection circuit comprises a battery;

the battery, the input of battery with the power output of power control unit is connected, the output of battery with the power input of logic circuit unit is connected for receive and save follow the electric energy of power control unit's power output input, and pass through the power input of logic circuit unit to logic circuit unit output electric energy.

The embodiment of the application provides a chip, which comprises the protection circuit.

An embodiment of the present application provides an electronic device, including the protection circuit described in any one of the above, or the chip described above.

Compared with the prior art, the embodiment of the application has the following beneficial effects:

the application provides a protection circuit, a chip and electronic equipment, wherein the protection circuit comprises a power supply control unit, a logic circuit unit and an overvoltage protection unit; the overvoltage protection unit is respectively connected with the detected end of the logic circuit unit and the detection end of the logic circuit unit, and the overvoltage protection unit is used for disconnecting the power supply control unit from the logic circuit unit when detecting that the detection end of the power supply control unit is in overvoltage, and outputting a marking signal to the detection end of the power supply control unit so that the power supply control unit maintains a normal power supply state according to the marking signal. Therefore, when the pin CC of the Type-C USB interface is in overvoltage, namely the detection end of the power control unit is in overvoltage, on one hand, the overvoltage protection unit disconnects the power control unit from the logic circuit unit, so that the logic circuit unit with low voltage is protected, and the overvoltage protection function is realized; on the other hand, the overvoltage protection unit outputs a marking signal to the detection end of the power control unit, so that the detection end of the power control unit, namely the pin CC of the Type-C USB interface, can still receive the marking signal even under the condition of overvoltage abnormal phenomenon, and replaces the marking signal obtained from the logic circuit unit, so that the power control unit is in a normal power supply state, thereby ensuring the normal power supply of the Type-C USB interface, further ensuring the Type-C USB interface to be still in a normal connection state when the overvoltage abnormal phenomenon occurs, and further ensuring the Type-C USB interface to be normally used without causing frequent disconnection of the Type-C USB interface even if the detection end of the power control unit is frequently subjected to overvoltage. In addition, even meet dead battery condition, promptly under the circuit of this application scheme temporarily lost the power supply's the condition, pin CC of the USB interface of Type-C Type (the sense terminal of power control unit) still receives the mark signal of overvoltage protection unit output makes power control unit keeps being connected with the power all the time, enables the circuit of this application scheme and is in normal operating condition immediately when being favorable to the power to resume the power supply.

Drawings

Fig. 1 is a schematic diagram of a first structure of a protection circuit provided in an embodiment of the present application;

fig. 2 is a schematic diagram of a second structure of a protection circuit provided in an embodiment of the present application;

fig. 3 is a schematic diagram of a third structure of a protection circuit provided in an embodiment of the present application;

fig. 4 is a schematic structural diagram of a switch module provided in an embodiment of the present application;

fig. 5 is a schematic structural diagram of a signal module provided in an embodiment of the present application;

fig. 6 is a schematic structural diagram of a switch control module according to an embodiment of the present application;

fig. 7 is a schematic diagram of a fourth structure of a protection circuit provided in the embodiment of the present application;

FIG. 8 is a schematic structural diagram of a chip provided in an embodiment of the present application;

fig. 9 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

0001, a chip; 0002. an electronic device; 1000. a power supply control unit; 2000. a logic circuit unit; 3000. an overvoltage protection unit; 4000. a battery;

3100. a signal module; 3200. a switch control module; 3300. a switch module;

3210. a sampling submodule; 3220. an overvoltage comparator; 3310. a first switch submodule; 3320. a second switch submodule;

3101. a third resistor; 3102. a third switch; 3211. a first resistor; 3212. a second resistor; 3311. a switching tube; 3312. a diode; 3321. a first switch; 3322. a second switch; 3323. a voltage source.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Fig. 1 shows a first structural schematic diagram of a protection circuit according to an embodiment of the present disclosure.

The protection circuit includes a power control unit 1000, a logic circuit unit 2000, and an overvoltage protection unit 3000.

An overvoltage protection unit 3000 for detecting a voltage of a detection end of the power control unit 1000 and outputting a flag signal; the overvoltage protection unit 3000 is connected to the detected end of the logic circuit unit 2000 and the detection end of the power control unit 1000, respectively, and when the overvoltage protection unit 3000 detects that the detection end of the power control unit 1000 is overvoltage, the overvoltage protection unit 3000 is configured to disconnect the connection between the power control unit 1000 and the logic circuit unit 2000, and output a flag signal to the detection end of the power control unit 1000, so that the power control unit 1000 maintains a normal power supply state according to the flag signal.

In this embodiment, the power control unit 1000 includes at least one detection terminal, and the detection terminal of the power control unit 1000 may be a pin RXx, a pin TXx, a pin D +, a pin D-, and a pin CC, where the pin RXx and the pin TXx are pins for transmitting USB3.0 data, and the pin D + and the pin D-are pins for transmitting USB2.0 data. Since the pin CC is very susceptible to overvoltage, the overvoltage protection unit 3000 of this embodiment is required to detect the pin CC. When detecting that the pin CC is over-voltage, the over-voltage protection unit 3000 disconnects the power control unit 1000 from the logic circuit unit 2000, and outputs a flag signal to the pin CC, so that the power control unit 1000 maintains a normal power supply state according to the flag signal. When the power control unit 1000 is in a normal power supply state, the power control unit 1000 may output power to the outside through a power output terminal, for example, a pin VBUS.

In this embodiment, the logic circuit unit 2000 includes at least one detected terminal for outputting a mark signal, which may be a voltage value, a current value, or a resistance value. In the present embodiment, the flag signal is a resistance value of the pull-down resistor RD _ LV, and the flag signal is provided by the pull-down resistor RD _ LV inside the logic circuit unit 2000. When the power control unit 1000 and the logic circuit unit 2000 are connected to each other through a path inside the overvoltage protection unit 3000, the pull-down resistor RD _ LV inside the logic circuit unit 2000 is connected to the detection terminal of the power control unit 1000 through the detected terminal of the logic circuit unit 2000, and the pull-down resistor RD _ LV inside the logic circuit unit 2000 outputs a flag signal to the detection terminal of the power control unit 1000 through the detected terminal of the logic circuit unit 2000.

In the present embodiment, the protection circuit includes a power control unit 1000, a low voltage logic circuit unit 2000, and an overvoltage protection unit 3000. In normal operation, the power control unit 1000 and the logic circuit unit 2000 are connected to each other through a path inside the overvoltage protection unit 3000. The marking signal generated by the logic circuit unit 2000 is transmitted from the detected end of the logic circuit unit 2000 to the detecting end of the power control unit 1000, and the detecting end of the power control unit 1000 is the pin CC. When the pin CC is over-voltage, the over-voltage protection unit 3000 blocks a path between the power control unit 1000 and the logic circuit unit 2000, thereby isolating the high-voltage pin CC from the low-voltage logic circuit unit 2000 and protecting the logic circuit unit 2000. Since the power control unit 1000 and the logic circuit unit 2000 are disconnected, the pin CC is disconnected from the pull-down resistor RD _ LV inside the logic circuit unit 2000, so that the pin CC cannot detect the flag signal. In this embodiment, the flag signal is a resistance value of the pull-down resistor RD _ LV, and the flag signal is obtained by detecting the pull-down resistor RD _ LV inside the logic circuit unit 2000 through the pin CC. When the power control unit 1000 and the logic circuit unit 2000 are disconnected, the overvoltage protection unit 3000 outputs a flag signal to the detection end of the power control unit 1000, and the flag signal provided by the overvoltage protection unit 3000 can replace the resistance value of the pull-down resistor RD _ LV, so that the pin CC can still detect the flag signal, and the power control unit 1000 maintains a normal power supply state according to the flag signal provided by the overvoltage protection unit 3000.

When the pin CC is restored to the normal state from the high voltage state, the internal path of the overvoltage protection unit 3000 is re-formed to reconnect the power control unit 1000 and the logic circuit unit 2000, the pin CC can be connected to the pull-down resistor RD _ LV inside the logic circuit unit 2000, and when the pin CC detects the resistance value of the pull-down resistor RD _ LV again, the overvoltage protection unit 3000 stops outputting the flag signal to the pin CC.

It can be understood that, when the pin CC of the Type-C USB interface is over-voltage, that is, the detection end of the power control unit 1000 is over-voltage, on one hand, the over-voltage protection unit 3000 disconnects the connection between the power control unit 1000 and the logic circuit unit 2000, so as to protect the logic circuit unit 2000 with low voltage and implement an over-voltage protection function; on the other hand, the overvoltage protection unit 3000 outputs a flag signal to the detection end of the power control unit 1000, so that the detection end of the power control unit 1000, that is, the pin CC of the Type-C USB interface, can still receive the flag signal even under the condition of the overvoltage abnormality, and replaces the flag signal obtained from the logic circuit unit 2000, so that the power control unit 1000 is in a normal power supply state, thereby ensuring that the power supply of the Type-C USB interface is normally powered, and further ensuring that the Type-C USB interface is still in a normal connection state when the overvoltage abnormality occurs, therefore, even if the detection end of the power control unit is often overvoltage, frequent disconnection of the Type-C USB interface cannot be caused, and normal use of the Type-C USB interface is ensured. In addition, even meet dead battery condition, promptly under the circuit of this application scheme temporarily lost the power supply's the condition, pin CC of the USB interface of Type-C Type (the sense terminal of power control unit) still receives the mark signal of overvoltage protection unit output makes power control unit keeps being connected with the power all the time, enables the circuit of this application scheme and is in normal operating condition immediately when being favorable to the power to resume the power supply.

Referring to fig. 2, fig. 2 is a schematic diagram of a second structure of the protection circuit according to the embodiment of the present application.

In one embodiment, the overvoltage protection unit 3000 includes a signal module 3100, a switch control module 3200, and a switch module 3300.

The output end of the signal module 3100 is connected to the detection end of the power control unit 1000, and the signal module 3100 is configured to output a mark signal to the detection end of the power control unit 1000 through the output end of the signal module 3100.

The first terminal of the switch module 3300 is connected to the detected terminal of the logic circuit unit 2000, and the second terminal of the switch module 3300 is connected to the detected terminal of the power control unit 1000.

The first end of the switch control module 3200 is connected to the third end of the switch module 3300 and the control end of the signal module 3100, and the second end of the switch control module 3200 is connected to the detection end of the power control unit 1000.

The switch control module 3200 is used for controlling the switch module 3300 to disconnect the power control unit 1000 from the logic circuit unit 2000 when the second end of the switch control module 3200 detects that the detection end of the power control unit 1000 generates overvoltage, and controlling the output end of the signal module 3100 to be connected with the detection end of the power control unit 1000.

In the present embodiment, the switch module 3300 and the signal module 3100 are controlled by the switch control module 3200. The switching control module 3200 may detect whether the detection terminal of the power control unit 1000 is in a normal state or an overvoltage state. In normal operation, the switch control module 3200 controls the switch module 3300 to close so that the power control unit 1000 and the logic circuit unit 2000 are connected through the switch module 3300, and accordingly, the switch control module 3200 controls the output terminal of the signal module 3100 to be disconnected from the detection terminal of the power control unit 1000.

When the pin CC is over-voltage, the switch control module 3200 controls the switch module 3300 to open the circuit to disconnect the power control unit 1000 from the logic circuit unit 2000, and accordingly, the switch control module 3200 controls the output terminal of the signal module 3100 to be connected to the detection terminal of the power control unit 1000, so that the signal module 3100 transmits the flag signal to the power control unit 1000.

It can be understood that, in this embodiment, the switch control module 3200 executes different control modes on the switch module 3300 and the signal module 3100 respectively in different states, the switch module 3300 is controlled to be closed and the connection between the output terminal of the signal module 3100 and the detection terminal of the power control unit 1000 is disconnected, and the switch module 3300 is controlled to be open and the connection between the output terminal of the signal module 3100 and the detection terminal of the power control unit 1000 is connected, which is beneficial to preventing the detection terminal of the power control unit 1000 from detecting the flag signal from the logic circuit unit 2000 through the switch module 3300 and receiving the flag signal transmitted by the signal module 3100 in an accidental time.

Referring to fig. 3, fig. 3 is a schematic diagram of a third structure of a protection circuit according to an embodiment of the present disclosure.

In one embodiment, the switch module 3300 includes a first switch submodule 3310 and a second switch submodule 3320;

a first end of the first switch submodule 3310 is connected to a first end of the second switch submodule 3320 and serves as a first end of the switch module 3300;

the second end of the first switch sub-module 3310 is the second end of the switch module 3300;

a second terminal of the second switch submodule 3320 is connected to a third terminal of the first switch submodule 3310;

the third terminal of the second switch submodule 3320 is the third terminal of the switch module 3300.

In this embodiment, the switch control module 3200 may control the switching of the first switch submodule 3310 via the second switch submodule 3320. When the first switch submodule 3310 is closed, the power control unit 1000 is connected to the logic circuit unit 2000, whereas when the first switch submodule 3310 is open, the power control unit 1000 is not connected to the logic circuit unit 2000.

During normal operation, the switch control module 3200 controls the second switch submodule 3320 to be turned on through the third terminal of the second switch submodule 3320, and then controls the first switch submodule 3310 to be turned on through the second switch submodule 3320, so that the power control unit 1000 is connected to the logic circuit unit 2000; when the pin CC is over-voltage, the switch control module 3200 controls the second switch submodule 3320 to be disconnected through the third terminal of the second switch submodule 3320, and then controls the first switch submodule 3310 to be disconnected through the second switch submodule 3320, so that the power control unit 1000 is disconnected from the logic circuit unit 2000.

It can be understood that, when the pin CC is over-voltage, the first switch submodule 3310 is connected to the pin CC, so that the first switch submodule 3310 is also in a high voltage state, if the switch control module 3200 directly controls the switch of the first switch submodule 3310, on one hand, the high voltage state of the first switch submodule 3310 may affect the control signal, and on the other hand, the switch control module 3200 is also in a high voltage state, so that the switch control module 3200 is also abnormal. In this embodiment, the switch control module 3200 indirectly controls the first switch submodule 3310 through the second switch submodule 3320, so that the switch control module 3200 is protected, and the switch control module 3200 is prevented from being over-voltage.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a switch module 3300 according to an embodiment of the present disclosure.

Optionally, the first switch submodule 3310 includes a switch tube 3311 and a diode 3312;

one end of the diode 3312 is connected to the first end of the switch tube 3311 and serves as the first end of the first switch submodule 3310;

the other end of the diode 3312 is connected to the second end of the switch tube 3311 and serves as the second end of the first switch submodule 3310;

the control terminal of the switch tube 3311 is the third terminal of the first switch submodule 3310.

Preferably, the switch 3311 is a high voltage fet NMOS.

In this embodiment, the high voltage fet is used as the switch tube 3311, which is beneficial to preventing the high voltage fet from being affected by the high voltage when the pin CC is over-voltage, and reducing the error probability.

Optionally, the second switch submodule 3320 includes a first switch 3321, a second switch 3322, and a voltage source 3323 for driving the switch tube 3311;

a first terminal of a second switch 3322 and a first terminal of a voltage source 3323 are both first terminals of a second switch submodule 3320;

a second terminal of the voltage source 3323 is connected to a first terminal of a first switch 3321;

a second terminal of the first switch 3321 is connected to a second terminal of the second switch 3322 and serves as a second terminal of the second switch submodule 3320;

the control terminal of the first switch 3321 and the control terminal of the second switch 3322 are the third terminals of the second switch submodule 3320.

In this embodiment, the source of the high voltage fet NMOS is connected to the detected terminal of the logic circuit unit 2000, and the drain of the high voltage fet NMOS is connected to the detection terminal of the power control unit 1000, i.e., the drain connection pin CC of the high voltage fet NMOS. The first end of the second switch 3322 and the negative electrode of the voltage source 3323 are connected to the source of the NMOS; the positive electrode of the voltage source 3323 is connected to a first terminal of the first switch 3321; the second end of the first switch 3321 and the second end of the second switch 3322 are connected with the grid electrode of the high-voltage field effect transistor NMOS; the switching of the first switch 3321 and the switching of the second switch 3322 are controlled by the switch control module 3200.

During normal operation, the second switch 3322 is turned off, the first switch 3321 is turned on, and a 5V drop of the voltage source 3323 is applied to the gate source of the high voltage fet NMOS, so that the high voltage fet NMOS is turned on, and the flag signal is normally transmitted between the detected terminal of the logic circuit unit 2000 and the pin CC. When the pin CC is over-voltage, the first switch 3321 is turned off, the second switch 3322 is turned on, VGS of the high voltage fet NMOS is 0, and the high voltage fet NMOS is turned off, so as to isolate the pin CC from the logic circuit unit 2000 and protect the logic circuit unit 2000. In this case, since the high voltage fet NMOS is disconnected, the pin CC is disconnected from the pull-down resistor RD _ LV inside the protection logic circuit unit 2000, so that the power control unit 1000 cannot detect the flag signal through the pin CC.

Referring to fig. 5, fig. 5 is a schematic structural diagram of a signal module 3100 according to an embodiment of the disclosure.

In one embodiment, the signal module 3100 includes a third resistor 3101 and a third switch 3102;

one end of the third resistor 3101 is an output terminal of the signal module 3100, and the other end of the third resistor 3101 is connected to a first end of the third switch 3102;

the second terminal of the third switch 3102 is connected to ground, and the control terminal of the third switch 3102 is the control terminal of the signal module 3100.

In this embodiment, the resistance value of the third resistor 3101 is equal to the resistance value of the pull-down resistor RD _ LV as the flag signal in the logic circuit unit 2000, and therefore the resistance value of the third resistor 3101 can be used instead of the flag signal being sent from the detected terminal of the logic circuit unit 2000. When an overvoltage occurs at the pin CC, the switch control module 3200 controls the third switch 3102 to close, so that the third resistor 3101 is connected to the pin CC. When the detection terminal of the power supply control unit 1000 detects the resistance value of the third resistor 3101, the power supply control unit 1000 maintains the state of normal power supply.

Referring to fig. 6, fig. 6 is a schematic structural diagram of a switch control module 3200 according to an embodiment of the present disclosure.

In one embodiment, the switch control module 3200 includes a sampling submodule 3210 and an over-voltage comparator 3220;

an output terminal of the overvoltage comparator 3220 is a first terminal of the switch control module 3200, a first input terminal of the overvoltage comparator 3220 is connected to a first terminal of the sampling submodule 3210, and a second input terminal of the overvoltage comparator 3220 is configured to input a reference voltage;

the second terminal of the sampling submodule 3210 is a second terminal of the switch control module 3200.

Optionally, the sampling submodule 3210 includes a first resistor 3211 and a second resistor 3212;

one end of the first resistor 3211 is connected to one end of the second resistor 3212, and serves as a first end of the sampling submodule 3210;

the other end of the first resistor 3211 is grounded;

the other end of the second resistor 3212 is a second end of the sampling submodule 3210.

In this embodiment, during normal operation, the output terminal of the over-voltage comparator 3220 outputs a low level to close the first switch 3321, the second switch 3322 is turned off, the voltage source 3323 outputs a voltage to the high-voltage fet NMOS, and the high-voltage fet NMOS gradually closes the switch under the action of the voltage source 3323, so that the power control unit 1000 is connected to the logic circuit unit 2000; after the pin CC detects the resistance value of the pull-down resistor RD _ LV of the flag signal of the logic circuit unit 2000, the third switch 3102 is turned off, and the third resistor 3101 is turned off from the detection end of the power control unit 1000, which is favorable for the detection end of the power control unit 1000, that is, the pin CC still detects the flag signal during the period that the pin CC is gradually closed in the high voltage fet NMOS.

When the pin CC is over-voltage, the output end of the over-voltage comparator 3220 outputs a high level, so that the first switch 3321 is turned off, the second switch 3322 is turned on, the third switch 3102 is turned on, the anode of the voltage source 3323 is turned off from the gate of the high-voltage fet NMOS, and the high-voltage fet NMOS is rapidly turned off to protect the logic circuit unit 2000, which results in the disconnection between the power control unit 1000 and the logic circuit unit 2000, and the detection end of the power control unit 1000 cannot detect the flag signal from the detected end of the logic circuit unit 2000; at this time, the third switch 3102 is closed while the first switch 3321 is opened, and the third resistor 3101 is connected to the detection terminal of the power supply control unit 1000. The detection terminal of the power control unit 1000 detects the resistance value of the third resistor 3101 from the third resistor 3101 as a flag signal, so that the detection terminal of the power control unit 1000 can still detect the flag signal during the overvoltage occurrence period, and the power control unit 1000 maintains the normal power supply state.

It is understood that when an overvoltage occurs at the pin CC, the third switch 3102 is turned on immediately, and the third resistor 3101 is connected to the detection terminal (pin CC) of the power control unit 1000; when the normal voltage is restored to the pin CC, the third switch 3102 is turned off with a delay in order to ensure that the high voltage fet NMOS is fully turned on, and the third resistor 3101 is turned off from the pin CC only after the flag signal of the low voltage logic circuit unit 2000 is detected.

Referring to fig. 7, fig. 7 is a schematic diagram of a fourth structure of the protection circuit according to the embodiment of the present application.

In one embodiment, the protection circuit further comprises a battery 4000;

the battery 4000, an input terminal of the battery 4000 is connected to a power output terminal of the power control unit 1000, and an output terminal of the battery 4000 is connected to a power input terminal of the logic circuit unit 2000, and is configured to receive and store the electric energy input from the power output terminal of the power control unit 1000, and output the electric energy to the logic circuit unit 2000 through the power input terminal of the logic circuit unit 2000.

It can be understood that, when the logic circuit unit 2000 is in the power failure state, the high voltage fet NMOS is disconnected, and therefore, the connection between the detected terminal of the logic circuit unit 2000 and the detection terminal of the power control unit 1000 is disconnected, so that the detection terminal of the power control unit 1000 cannot detect the flag signal transmitted by the detected terminal of the logic circuit unit 2000, that is, the pin CC cannot detect the flag signal. The battery 4000 of this embodiment can provide electric energy to the logic circuit unit 2000, thereby avoiding disconnection of the detected end of the logic circuit unit 2000 and the detection end of the power control unit 1000 due to disconnection of the high voltage fet NMOS caused by power failure of the logic circuit unit 2000, and further avoiding that the pin CC cannot detect the flag signal. However, in this embodiment, the overvoltage protection unit 3000 can provide the flag signal to the detection terminal of the power control unit 1000 instead of the flag signal transmitted by the detection terminal of the logic circuit unit 2000, so that the pin CC can still detect the flag signal. When the detection terminal of the power control unit 1000 detects the flag signal, a normal power supply state is maintained, so that the power control unit 1000 can supply power to the battery 4000.

Referring to fig. 8, fig. 8 is a schematic structural diagram of a chip according to an embodiment of the present disclosure. The embodiment of the application provides a chip, which comprises the protection circuit.

Referring to fig. 9, fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. An embodiment of the present application provides an electronic device, including the protection circuit described in any one of the above, or the chip described above.

That is, the above description is only an embodiment of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent flow transformations made by using the contents of the specification and the drawings, such as mutual combination of technical features between various embodiments, or direct or indirect application to other related technical fields, are included in the scope of the present application.

In addition, the present application may be identified by the same or different reference numerals for structural elements having the same or similar characteristics. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In this application, the word "for example" is used to mean "serving as an example, instance, or illustration". Any embodiment described herein as "for example" is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make and use the present application. In the foregoing description, various details have been set forth for the purpose of explanation.

It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes are not shown in detail to avoid obscuring the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

Claims

1. A protection circuit is characterized by comprising a power supply control unit, a logic circuit unit and an overvoltage protection unit;

the overvoltage protection unit is used for detecting the voltage of the detection end of the power supply control unit and outputting a marking signal;

the overvoltage protection unit is respectively connected with the detected end of the logic circuit unit and the detection end of the power supply control unit;

the overvoltage protection unit is used for disconnecting the connection between the power control unit and the logic circuit unit when detecting that the detection end of the power control unit generates overvoltage, and outputting a marking signal to the detection end of the power control unit, so that the power control unit maintains a normal power supply state according to the marking signal.

2. The protection circuit according to claim 1, wherein the overvoltage protection unit comprises a signal module, a switch control module and a switch module;

the output end of the signal module is connected with the detection end of the power supply control unit, and the signal module is used for outputting a marking signal to the detection end of the power supply control unit through the output end of the signal module;

3. The protection circuit of claim 2, wherein the switch module comprises a first switch submodule and a second switch submodule;

4. The protection circuit of claim 3, wherein the first switching submodule comprises a switching tube and a diode;

5. The protection circuit of claim 4, wherein the switching tube is a high voltage field effect transistor.

6. The protection circuit of claim 4 or 5, wherein the second switch submodule comprises a first switch, a second switch and a voltage source for driving the switching tube;

the second end of the first switch is connected with the second end of the second switch and is used as the second end of the second switch submodule;

7. The protection circuit of claim 2, wherein the switch control module comprises a sampling sub-module and an over-voltage comparator;

8. The protection circuit of claim 7, wherein the sampling submodule includes a first resistor and a second resistor;

the other end of the first resistor is grounded;

the other end of the second resistor is a second end of the sampling submodule.

9. The protection circuit of claim 2, wherein the signal module comprises a third resistor and a third switch;

10. The protection circuit of claim 1, comprising a battery;

the input end of the battery is connected with the power output end of the power control unit, the output end of the battery is connected with the power input end of the logic circuit unit and used for receiving and storing electric energy input from the power output end of the power control unit and outputting the electric energy to the logic circuit unit through the power input end of the logic circuit unit.

11. A chip comprising the protection circuit according to any one of claims 1 to 10.

12. An electronic device comprising the protection circuit according to any one of claims 1 to 10, or the chip according to claim 11.