CN217590828U - Dual-mode synchronous clock device - Google Patents

Dual-mode synchronous clock device Download PDF

Info

Publication number
CN217590828U
CN217590828U CN202220887102.XU CN202220887102U CN217590828U CN 217590828 U CN217590828 U CN 217590828U CN 202220887102 U CN202220887102 U CN 202220887102U CN 217590828 U CN217590828 U CN 217590828U
Authority
CN
China
Prior art keywords
module
dual
synchronous clock
mode
time service
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202220887102.XU
Other languages
Chinese (zh)
Inventor
吴为
周保荣
洪潮
曾德辉
刘宇明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CSG Electric Power Research Institute
Original Assignee
CSG Electric Power Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CSG Electric Power Research Institute filed Critical CSG Electric Power Research Institute
Priority to CN202220887102.XU priority Critical patent/CN217590828U/en
Application granted granted Critical
Publication of CN217590828U publication Critical patent/CN217590828U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)

Abstract

The embodiment of the application discloses a dual-mode synchronous clock device. The application provides a bimodulus synchronous clock device includes the FPGA module, DA conversion module, the constant temperature crystal oscillator module, multimode high accuracy time service module, the antenna and be used for connecting the module connector of external module, moreover, the steam generator is simple in structure, and simultaneously, to based on GPS or big dipper signal because factors such as meteorological environment may lose the synchronous condition, through adopting the core of keeping time as local clock through the voltage-controlled constant temperature crystal oscillator of adjustment and calibration, after losing GPS or big dipper synchronizing signal's 24 hours, still can maintain higher synchronous precision, can satisfy the requirement of synchrophasor measurement.

Description

Dual-mode synchronous clock device
Technical Field
The application relates to the technical field of synchronous clocks, in particular to a dual-mode synchronous clock device.
Background
A wide area measurement system based on a Beidou global positioning system is a new technology rapidly developed in recent years, and adopts a synchronous sampling technology to realize real-time high-speed acquisition of electric quantity data of a whole network by arranging synchronous phasor measurement terminals of key stations of the whole network. The synchronous clock module is an important device for ensuring the normal operation of the wide area measurement system.
A synchronous clock system is a system that receives an external time reference signal and outputs a time synchronization signal and time information to the outside with a required time precision, and it enables other clocks in a network to be aligned and synchronized by establishing a time synchronization protocol. However, when the synchronization time reference signal is lost for a short time or is strongly interfered, high synchronization accuracy cannot be maintained, and the accuracy of the synchronized phasor measurement is greatly reduced.
SUMMERY OF THE UTILITY MODEL
The application discloses a dual-mode synchronous clock device, which is used for solving the technical problem that in the prior art, a high synchronous precision cannot be maintained under the condition that a synchronous time reference signal is lost or subjected to strong interference for a short time, so that the precision of synchronous phasor measurement can be greatly reduced.
The application provides a dual-mode synchronous clock device, comprising: the system comprises an FPGA module, a DA conversion module, a constant-temperature crystal oscillator module, a multi-mode high-precision time service module, an antenna and a module connector;
the antenna is connected with the multimode high-precision time service module;
the multi-mode high-precision time service module is connected with the FPGA module through a pulse per second output interface and an NMEA data output interface;
the FPGA module is connected with the DA conversion module through an SPI interface, and the DA conversion module is connected with the constant-temperature crystal oscillator module; the reference clock signal output end of the constant-temperature crystal oscillator module is connected with the reference clock signal receiving end of the FPGA module;
the FPGA module is connected with the module connector through an Ethernet signal interface and a synchronous clock signal transmission interface.
Preferably, the multimode high-precision time service module is specifically a Beidou + GPS multimode high-precision time service module.
Preferably, the Beidou and GPS multi-mode high-precision time service module is specifically an SKG121T multi-mode high-precision time service module.
Preferably, the FPGA module is embodied as a 10CL025 FPGA chip.
Preferably, the DA conversion module is specifically an 18-bit DAC9881 chip.
Preferably, the constant temperature crystal oscillator is specifically an IQOV-90 constant temperature crystal oscillator module.
Preferably, the method further comprises the following steps: and the first voltage stabilizing module is used for providing constant power supply voltage for the multimode high-precision time service module.
Preferably, the first voltage stabilization module is specifically a linear voltage stabilization chip XC6221B32MR.
Preferably, the method further comprises the following steps: and the second voltage stabilizing module comprises a plurality of groups of DC-DC voltage reduction conversion devices which are respectively used for providing various different constant power supply voltages for the FPGA module.
Preferably, the synchronous clock signal transmission interface specifically includes: the system comprises two paths of adjustable clock signal output interfaces, a 1PPS signal output interface and a UART serial real-time clock signal output interface.
According to the technical scheme, the embodiment of the application has the following advantages:
this application is to based on GPS or big dipper signal because factors such as meteorological environment may lose the synchronous condition, has adopted the pressure-controlled constant temperature crystal oscillator through adjustment and calibration as the core that local clock is on time, after losing GPS or big dipper synchronizing signal's 24 hours, still can maintain higher synchronous precision, can satisfy the requirement of synchronous phasor measurement. Meanwhile, the core device of the dual-mode synchronous clock device provided by the application consists of the FPGA module, the DA conversion module, the constant-temperature crystal oscillator module, the multi-mode high-precision time service module, the antenna and the module connector for connecting the external module, and the circuit structure is simple.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a dual-mode synchronous clock apparatus provided in the present application.
Fig. 2 is a schematic diagram of a multimode high-precision time service module in a dual-mode synchronous clock device provided in the present application.
Fig. 3 is a schematic diagram of an FPGA module, a DA conversion module, and a constant temperature crystal oscillator module in the dual-mode synchronous clock apparatus provided by the present application.
Detailed Description
The embodiment of the application discloses a dual-mode synchronous clock device, which is used for solving the technical problem that the precision of synchronous phasor measurement can be greatly reduced because higher synchronous precision cannot be maintained under the condition that a synchronous time reference signal is lost or subjected to strong interference for a short time in the prior art.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Unless expressly stated or limited otherwise, the terms "mounted," "connected," and "coupled" are to be construed broadly and encompass, for example, both fixed and removable coupling as well as integral coupling; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in this application will be understood to be a specific case for those of ordinary skill in the art.
Referring to fig. 1 to fig. 3, a dual-mode synchronous clock device provided in an embodiment of the present application includes: the system comprises an FPGA module 2, a DA conversion module 3, a constant temperature crystal oscillator module 4, a multi-mode high-precision time service module 1, an antenna and a module connector 5;
the antenna is connected with the multimode high-precision time service module 1;
the multi-mode high-precision time service module 1 is connected with the FPGA module 2 through a second pulse output interface and an NMEA data output interface;
the FPGA module 2 is connected with the DA conversion module 3 through an SPI interface, and the DA conversion module 3 is connected with the constant temperature crystal oscillator module 4; the reference clock signal output end of the constant temperature crystal oscillator module 4 is connected with the reference clock signal receiving end of the FPGA module 2;
the FPGA module 2 is connected with the module connector 5 through an Ethernet signal interface and a synchronous clock signal transmission interface.
The operation principle of the dual-mode synchronous clock device provided by the embodiment comprises the following steps: firstly, a multi-mode high-precision time service module 1 acquires satellite signals through an antenna, 1PPS (pulse per second) pulse signals and NMEA (network address effect) data generated based on the satellite signals are sent to an FPGA (field programmable gate array) module 2, and the FPGA module 2 outputs RGMII (reduced-size radio interface) Ethernet signals, two-way adjustable clock signals, 1PPS (pulse per second) signals and UART (universal asynchronous receiver/transmitter) serial real-time clock signals to a module connector 5 according to the received 1PPS pulse signals and NMEA data and reference clock signals received from a constant-temperature crystal oscillator module 4 so as to provide clock signals for an external module.
The utility model provides a to because factors such as meteorological environment may lose synchronous condition based on GPS or big dipper signal, adopted the voltage-controlled constant temperature crystal oscillator through adjustment and calibration as the core that the local clock is on time, after losing GPS or big dipper synchronizing signal's 24 hours, still can maintain higher synchronous precision, can satisfy the requirement of synchronous phasor measurement. Meanwhile, the dual-mode synchronous clock device provided by the application comprises an FPGA module, a DA conversion module, a constant-temperature crystal oscillator module, a multi-mode high-precision time service module, an antenna and a module connector for connecting an external module, and is simple in structure.
Further, the multi-mode high-precision time service module is specifically a Beidou + GPS multi-mode high-precision time service module, and the Beidou + GPS multi-mode high-precision time service module is specifically an SKG121T multi-mode high-precision time service module.
It should be noted that the Beidou + GPS multimode high-precision time service module provided by the embodiment adopts an SKG121T type satellite receiving device, and has Beidou, GPS and GLONASS multimode satellite receiving capabilities; the time service precision of 10ns is provided; possess satellite antenna receiver, 1PPS second pulse signal output and NMEA location data output interface for 1PPS second pulse signal and NMEA location and real-time clock data connection to FPGA module of output.
Further, the FPGA module is specifically a 10CL025 FPGA chip.
It should be noted that 10CL025 model FPGAs of Cyclone 10 series are adopted, packaged as U256, and provided with 128Mbit 8-bit wide HyperRAM memory and 128Mbit SPI Flash; it has two-way RGMII 10/100/1000Mbps Ethernet interface.
The DA conversion module is specifically an 18-bit DAC9881 chip which is provided with a REF4132A33 high-precision series voltage reference, and the output voltage of the DA conversion module is 0-3.3V.
Further, the constant temperature crystal oscillator is specifically an IQOV-90 constant temperature crystal oscillator module.
It should be noted that the constant temperature crystal oscillator module adopts a IQOV-90 model 10MHz constant temperature crystal oscillator, and has a TPS7a52 low noise, high precision linear voltage stabilization chip to supply power, and the supply voltage is 3.3V.
Further, still include: and the first voltage stabilizing module is used for providing constant power supply voltage for the multimode high-precision time service module.
Furthermore, the first voltage stabilizing module is specifically a linear voltage stabilizing chip XC6221B32MR, and can provide a 3.3V power supply voltage for the multimode high-precision time service module.
Further, still include: and the second voltage stabilizing module comprises a plurality of groups of DC-DC voltage reduction conversion devices which are respectively used for providing various different constant power supply voltages for the FPGA module.
Wherein, the second voltage stabilizing module comprises a plurality of groups of DC-DC voltage reduction conversion devices and comprises: the four DC-DC buck converters EN5339QI, EN5329QI, EN5358QI and EN5358QI may provide 3.3V, 1.2V, 1.8V and 2.5V supply voltages for the FPGA module, respectively.
More specifically, the module connector may employ a 40pin 0.8mm board-to-board connector of ER8 type.
And on the basis of the precision clock synchronization protocol standard IEEE1588v2 for the synchronized phasor measurement based on the Beidou + GPS, the dual-mode synchronous clock module for the synchronized phasor measurement adopts a multi-mode high-precision time service module with the model of SKG121T with the time service precision of 10ns, a 10CL025 model FPGA with the gigabit Ethernet and a DAC9881 chip with 18 bits, so that the high-precision high-stability synchronous time service of the synchronized phasor measurement device and the synchronous clock device can be realized, the estimated synchronous error is less than or equal to 50ns, the time keeping precision is less than or equal to 1.5us/24, and the requirement of the synchronized phasor measurement can be met.
While the foregoing has described in detail the dual-mode synchronous clock apparatus provided in the present application, those skilled in the art will readily appreciate that the embodiments of the present application are not limited thereto.

Claims (10)

1. A dual-mode synchronous clock apparatus, comprising: the system comprises an FPGA module, a DA conversion module, a constant-temperature crystal oscillator module, a multi-mode high-precision time service module, an antenna and a module connector;
the antenna is connected with the multimode high-precision time service module;
the multi-mode high-precision time service module is connected with the FPGA module through a pulse per second output interface and an NMEA data output interface;
the FPGA module is connected with the DA conversion module through an SPI interface, and the DA conversion module is connected with the constant-temperature crystal oscillator module; the reference clock signal output end of the constant-temperature crystal oscillator module is connected with the reference clock signal receiving end of the FPGA module;
the FPGA module is connected with the module connector through an Ethernet signal interface and a synchronous clock signal transmission interface.
2. The dual-mode synchronous clock device according to claim 1, wherein the multi-mode high-precision time service module is specifically a Beidou and GPS multi-mode high-precision time service module.
3. The dual-mode synchronous clock device of claim 2, wherein the Beidou + GPS multimode high-precision time service module is specifically an SKG121T multimode high-precision time service module.
4. The dual-mode synchronous clock device according to claim 1, wherein the FPGA module is specifically a 10CL025 FPGA chip.
5. The dual-mode synchronous clock device of claim 1, wherein the DA conversion module is an 18-bit DAC9881 chip.
6. The dual-mode synchronous clock device according to claim 1, wherein the constant temperature crystal oscillator module is an IQOV-90 constant temperature crystal oscillator module.
7. The dual-mode synchronous clock apparatus of claim 1, further comprising: and the first voltage stabilizing module is used for providing constant power supply voltage for the multimode high-precision time service module.
8. The dual-mode synchronous clock device according to claim 7, wherein the first voltage-stabilizing module is specifically a linear voltage-stabilizing chip XC6221B32MR.
9. The dual-mode synchronous clock apparatus of claim 1, further comprising: and the second voltage stabilizing module comprises a plurality of groups of DC-DC voltage reduction conversion devices which are respectively used for providing various different constant power supply voltages for the FPGA module.
10. The dual-mode synchronous clock device of claim 1, wherein the synchronous clock signal transmission interface specifically comprises: the system comprises two paths of adjustable clock signal output interfaces, a 1PPS signal output interface and a UART serial real-time clock signal output interface.
CN202220887102.XU 2022-04-15 2022-04-15 Dual-mode synchronous clock device Active CN217590828U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220887102.XU CN217590828U (en) 2022-04-15 2022-04-15 Dual-mode synchronous clock device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220887102.XU CN217590828U (en) 2022-04-15 2022-04-15 Dual-mode synchronous clock device

Publications (1)

Publication Number Publication Date
CN217590828U true CN217590828U (en) 2022-10-14

Family

ID=83542583

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202220887102.XU Active CN217590828U (en) 2022-04-15 2022-04-15 Dual-mode synchronous clock device

Country Status (1)

Country Link
CN (1) CN217590828U (en)

Similar Documents

Publication Publication Date Title
CN102006159B (en) Multi-slave clock sampling value multi-interface synchronizing system based on IEEE1588
EP3376822B1 (en) Base station and method for clock synchronization of base station
CN104330966A (en) Multi-mode high-precision time and frequency standard equipment
CN105446917B (en) The device that the data record and location information of a kind of PPK-RTK obtains
CN203377841U (en) Satellite-based crystal oscillator taming apparatus for time service
CN108628157A (en) A kind of Big Dipper time service based on VPX boards under complex environment and Time keeping system
CN102830611B (en) Time source
CN101902292A (en) UTC high-precision time synchronization method based on optical transmission network
CN101242231A (en) Clock synchronization device for synchronous phase measuring in power system
CN104597747B (en) Synchronous test system and its method for improving synchronization accuracy based on Tame Rubidium Clock
CN110995388B (en) Distributed shared clock trigger delay system
CN202475769U (en) High-precision network clock server of LTE (Long Term Evolution) system
CN108738127B (en) Radio remote unit, baseband processing unit, distributed base station and synchronization method thereof
CN205787098U (en) A kind of distributed external illuminators-based radar multi-channel data acquisition unit
CN105892280B (en) A kind of satellite time transfer device
CN102142954B (en) Time synchronization method and equipment in rack
CN108768577A (en) A kind of communication network time service method and system based on PTP time synchronizing signals
CN217590828U (en) Dual-mode synchronous clock device
CN213585795U (en) Dual-mode NTP timer based on GPS/CDMA
CN102457956A (en) Acquisition method and system for reference clock signal
CN114142957A (en) Remote time-frequency equipment testing method
CN203708224U (en) Multipurpose serial time code decoder
CN211826913U (en) High-precision time synchronization and keeping-watch device based on clock synchronizer
CN111338204B (en) Decentralized integrated atomic time system and establishing method thereof
CN210225427U (en) OLT equipment

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant