CN2175421Y - Device for measuring parameter of load-settling-time - Google Patents

Abstract

The utility model relates to a device for measuring correlation parameters of load-settling-time. The correlation parameters can be accurately and organically displayed and processed through that a time-based unit providing accurate measurement time sequence is additionally provided and a microprocessor system and a correlation data interface are introduced, and the time-based unit comprises a crystal resonator time-base generator, a time-address logic circuit, a fixed time sequence generator, and a time data display. Fixed time sequence output provided by the utility model can simplify operation and overcome artificial fatigue errors; the time-based unit can also be additionally provided with a random time sequence generator and an anti-dithering random sampling circuit to improve test adaptability. The utility model is suitable for the field of geologic prospecting.

Description

Device for measuring parameter of load-settling-time

The utility model relates to the P(load that the engineering exploration in-situ test is used)-the S(sedimentation)-the t(time) architecture advances of correlation parameter measuring instrument.

In the engineering exploration in-situ test, during particularly the ground of construction work is tested, the sedimentation that often needs the geodetic base under load pressure, to occur.The most original survey method is to pile load earlier, write down load pressure, survey ground settlement again, not only test trouble, and also dangerous in preloading place survey sedimentation, have now and utilize traditional mechanics tester and displacement transducer to survey the tester of P, S parameter simultaneously from security standpoint.Yet settling amount (S) parameter not only with capacity value (P) relating to parameters, also can change with load duration amount (t), therefore need the test interval of being correlated with according to different test requests, for example survey sedimentation fast, need to survey once at interval, and conventionally survey sedimentation with 15 minutes, then in the 1st hour with 1 minute at interval, in the 2nd hour with 5 minutes at interval, in the 3rd hour with 10 minutes at interval ... test.Be by the manual observation clock mode correlation time to this in the past, the control time program.Because test period is very fast, artificial control easily produce the fatigability mistake, and the precision in control time is obviously lower down.

The utility model is desired to address the above problem, and its purpose is, provides a kind of and can alleviate the tester and operate burden, avoid test data human factor mistake, can show the measuring instrument of P-S-T correlation parameter simultaneously on a measuring instrument.

The utility model is achieved in that and is comprising shell, power supply, the panel of band data presentation window and function control piece, force transducer and load measurement circuit, displacement transducer and displacement measurement circuit, A/D converter, data display equipment, on the basis of the P-S-t correlation parameter measuring instrument of data output printer, increase by one again by memory under program, the microprocessor system that data memory and CPU form, a related data interface and the time-based unit that accurate measurement sequential is provided, this time-based unit comprises time-base generator, time-address logic circuit IC ₂, fixed time sequence generator and time data display, above-mentioned time-base generator is by integrated circuit (IC) ₁, crystal J ₁, resistor R ₁, R ₂With capacitor C ₁, C ₂Form IC ₁The CP end of output port and time data display and the CP of time-logical circuit hold and be connected, the said fixing timing sequencer is by ROMIC ₆And K switch ₁Form IC ₆Address wire port A ₀-A ₁₁With above-mentioned time-logical circuit IC ₂The address signal output port link to each other and IC ₆Output port through K switch ₁Be connected to the request interruptive port of above-mentioned CPU.

For improving test adaptability, make the utility model can not only provide and show the fixing test sequential, and can also by test request the random time program be set by operating personnel, and the utility model can be set up a random sequence generator again in time-based unit, and this generator comprises RAMIC ₅, integrated circuit (IC) ₃, IC ₄, K switch ₂-K ₄, resistor R ₃-R ₃, capacitor C ₃-C ₅, C ₁₀With setting key AN ₁, IC wherein ₄, R ₄, R ₅, C ₄, C ₅Form timing circuit, IC ₄The low triggering end mouth pass through C ₅Meet the setting key AN of other end ground connection ₁, and its output port directly meets RAMIC ₅The read gate port

, and through R ₃, C ₃Integrator delay-time circuit and the inverter ic formed ₃Meet RAMIC ₅The write gate port

, RAMIC ₅Address wire port A ₀-A ₁₁Also with IC ₂The address signal output port link to each other and its output port and K switch ₁-K ₃Connect, please use K switch soon in addition ₄An end through C ₁₀Meet IC ₄The low triggering end mouth and another termination IC ₁Output port.

For improving the shake that Yin Maoci etc. causes and inserting special sequential and make P-S value particular sample in measuring instrument work, the utility model can also be provided with an anti-shake stochastic sampling circuit before the sequential of time-based unit is exported, and this circuit has inverter ic ₇, integrated circuit (IC) ₈, resistor R ₈-R ₁₁, capacitor C ₆-C ₉With stochastic sampling key AN ₂, above-mentioned IC ₈The low triggering end mouth again through C ₈Meet the AN of other end ground connection ₂, and pass through C ₇, IC ₇And by R ₈And C ₆The integral delay circuit of forming connects K switch ₁

The utility model provides the time-based unit of accurate measurement sequential and introduces microprocessor system and related data interface by increasing by one, and the P-S measuring instrument can more accurate, truly, organically show and handle the P-S-t correlation parameter as compared with the past.The fixed time sequence output that its time-based unit provides, make simplified control and can overcome artificial fatigability mistake, the introducing of microprocessor system and related data interface makes it can carry out complicated related data again and handles, particularly time-based unit is set up random sequence generator and anti-shake stochastic sampling circuit again, and its test adaptability is greatly improved.

Fig. 1 is the circuit structure block scheme of the utility model one embodiment;

Fig. 2 is the time-based unit circuit diagram of the utility model one embodiment.

Further introduce circuit structure of the present utility model below in conjunction with accompanying drawing for embodiment.

As shown in Figure 1, by force transducer, the load measurement circuit, load (P) measuring unit that data display equipment and A/D converter constitute, by displacement transducer, the displacement measurement circuit, sedimentation (S) measuring unit that data display equipment and A/D converter constitute, and by time-base generator, time-address logic circuit, timing sequencer is connected with 8031 type CPU of microprocessor system by the related data interface respectively with the time-based unit that data display equipment constitutes, this microprocessor system is made program storage with 2764 type ROM of a 8K byte, storage is also made the data-carrier store of microprocessor system for the process of measurement of CPU control and data processor etc. with 6264 type RAM of a 8K byte.The sequential output of time-based unit is connected to the request interruptive port of CPU, and the control output end mouth of CPU is by printing interface control printer record measurement data.

Time-based unit embodiment illustrated in fig. 2 is except that having with 4060 type IC ₁With crystal J ₁Be main time-base generator, 4040 types time-address logic circuit IC ₂, outside LCD data display equipment and the fixed time sequence generator, also be provided with random sequence generator and anti-shake stochastic sampling circuit.The fixed time sequence generator of present embodiment is by 2764 type ROMIC ₆And K switch ₁Constitute, when time-address logic circuit IC ₂Parallel address signal is sent into storage the ROMIC of the relevant test duration program of establishment is in advance arranged ₆In, this ROM is just at different output port O ₁-O ₅Send different fixed time sequence signals, operating personnel can use K ₁Selecting required fixed time sequence to make correlation parameter measures.The random sequence generator of present embodiment is mainly by 6264 type RAMIC ₅, 4011 type inverter ics ₃, 555 type IC ₄, K ₂-K ₄, R ₃-R ₇, C ₃-C ₅, C ₁₀And AN ₁Form.In the present embodiment with K ₁-K ₄Make four blade eight and throw linked switch, when linked switch is changed to the 4-8 position, sequential output selector switch K ₁Correspondence meets the output port O of fixed time sequence generator ROM ₁-O ₅When linked switch is put the 1-3 position, sequential output selector switch K then ₁Meet the RAM output port O of random sequence generator ₀, operating personnel can do random sequence setting and output by various test requests under this state.Set the preceding palpus of random sequence and ask zero earlier, it is cleared condition that linked switch is put 1 position, at this moment the output port O of the RAM of random sequence generator ₀Through K ₃Ground connection is level "0".Simultaneously by time-base generator IC ₁The fast clear pulse that output port 6 is sent is through K ₄, C ₁₀Be added to IC ₄Low triggering end mouth 2, make IC ₄Output port 3 send the Fixed width pulse, make RAMIC ₅" write " gating, and through R ₃, C ₃The time-delay back is by IC a little ₃Anti-phase output is as RAMIC ₃Write pulse, just can carry out the random sequence setting then, linked switch is put 2 positions for state is set, this moment RAM output port O ₀Through K ₂Be connected to level"1", when time LCD data display equipment shows required setting-up time, by key AN is set ₁, RAM IC then ₅Middle corresponding address promptly is configured to level"1".Then linked switch is put 3 positions after setting entirely, then the random sequence generator just can pass through K ₁Sequential is set in output at random.The time-based unit of present embodiment also is added with the anti-shake stochastic sampling circuit of one-level before CPU request interruptive port output timing, and this circuit is by 4011 type inverter ics ₇, 555 type IC ₈, R ₈-R ₁₁, C ₆-C ₉Form, by K ₁The sequential of sending is through R ₈, C ₆Integration time-delay back is by IC ₇Anti-phase, meet IC ₈The low triggering end mouth, trigger timer IC by negative edge ₈, timing is by R ₉, C ₉Decision.In the measuring instrument operate as normal, insert special sequential or particular sample as need, then can be by stochastic sampling key AN ₂, send the insertion sequential.

Claims (3)

1, a kind of P (load)-S (sedimentation)-t (time) correlation parameter measuring instrument, comprise shell, power supply, the panel of band data presentation window and function control piece, force transducer and load measurement circuit, displacement transducer and displacement measurement circuit, A/D converter, data display equipment, the data output printer, it is characterized in that: it also comprises one by memory under program, the microprocessor system that data memory and CPU form, a related data interface and the time-based unit that accurate measurement sequential is provided, this time-based unit comprises time-base generator, time-address logic circuit IC ₂, fixed time sequence generator and time data display; Above-mentioned time-base generator is by integrated circuit (IC) ₁, crystal J ₁, resistor R ₁, R ₂With capacitor C ₁, C ₂Form IC ₁The CP end of output port and time data display and the CP of time-logical circuit hold and be connected; The said fixing timing sequencer is by ROM IC ₆And K switch ₁Form IC ₆Address wire port and above-mentioned time-address logic circuit IC ₂The address signal output port link to each other and IC ₆Output port through K switch ₁Be connected to the interrupt request port of above-mentioned CPU.

2, measuring instrument according to claim 1 is characterized in that: its time-based unit also has a random sequence generator, and this generator comprises RAMIC ₅, integrated circuit (IC) ₃, IC ₄, K switch ₂-K ₄, resistor R ₃-R ₇, capacitor C ₃-C ₅, C ₁₀With setting key AN ₁IC wherein ₄, R ₄, R ₅, C ₄, C ₅Form timing circuit, IC ₄The low triggering end mouth pass through C ₅Meet the setting key AN of other end ground connection ₁, and its output port directly meets RAMIC ₅Read-write gating port , and through R ₃, C ₃Integrator delay-time circuit and the inverter ic formed ₃Meet RAMIC ₅The write gate port

RAMIC ₅The address wire port also with IC ₂The address signal output port link to each other and its output port and K switch ₁-K ₃Connect, please use K switch soon in addition ₄An end through C ₁₀Meet IC ₄The low triggering end mouth and another termination IC ₁Output port.

3, measuring instrument according to claim 1 and 2 is characterized in that: also be provided with an anti-shake stochastic sampling circuit before the sequential output of its time-based unit, this circuit has inverter ic ₇, integrated circuit (IC) ₈, resistor R ₈-R ₁₁, capacitor C ₆-C ₉With stochastic sampling key AN ₂, above-mentioned IC ₃The low triggering end mouth through C ₈Meet the AN of other end ground connection ₂, and pass through C ₇, IC ₇And by R ₈And C ₆The lagged product parallel circuit of forming connects K switch ₁

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