CN217508583U - Double-tube diode clamping driving circuit - Google Patents
Double-tube diode clamping driving circuit Download PDFInfo
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- CN217508583U CN217508583U CN202123235954.5U CN202123235954U CN217508583U CN 217508583 U CN217508583 U CN 217508583U CN 202123235954 U CN202123235954 U CN 202123235954U CN 217508583 U CN217508583 U CN 217508583U
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Abstract
The utility model provides a double-barrelled diode clamper drive circuit, include: the PWM driving circuit comprises a first transformer, a second transformer, a first blocking capacitor, a second blocking capacitor, a first driving resistor and a second driving resistor, wherein the first transformer and the second transformer are connected in parallel, original elements of the first transformer and the primary edge of the second transformer are connected to a PWM input signal end through the first blocking capacitor and the second blocking capacitor respectively, and the secondary edge of the first transformer and the secondary edge of the second transformer are connected to the first driving resistor and the second driving resistor respectively. The utility model discloses can eliminate the parasitic capacitance among the drive circuit effectively, can also make subsequent first switch element and second switch element's switch tube turn-off voltage unanimous. The utility model discloses can reduce the loss of switch tube and transformer effectively, reduce the temperature rise effectively to improve drive circuit's reliability.
Description
Technical Field
The utility model relates to a drive circuit especially relates to a double-barrelled diode clamper drive circuit.
Background
In a conventional clamping drive circuit, as shown in fig. 3, different secondary sides are usually adopted to realize turn-off control of a subsequent drive switch, in the existing scheme, due to parasitic parameters of a drive transformer, a parasitic capacitor is introduced into a main circuit of the drive circuit, and then in a subsequent turn-off stage of the drive switch, the parasitic capacitor discharges to a switch tube junction capacitor through the transformer, so that the turn-off voltage of a switch tube is inconsistent, the switching loss is increased, and after a discharge current passes through a main transformer, the copper loss of the main transformer is also increased, the temperature is increased, and the reliability is low.
Disclosure of Invention
The utility model aims to solve the technical problem that a double-barrelled diode clamp drive circuit that can realize the switch tube turn-off voltage unanimity needs to be provided, and then reduces the loss of switch tube and transformer effectively, has reduced the temperature rise effectively and has improved drive circuit's reliability.
To this end, the utility model provides a double-barrelled diode clamper drive circuit, include: the PWM driving circuit comprises a first transformer, a second transformer, a first blocking capacitor, a second blocking capacitor, a first driving resistor and a second driving resistor, wherein the first transformer and the second transformer are connected in parallel, original elements of the first transformer and the primary edge of the second transformer are connected to a PWM input signal end through the first blocking capacitor and the second blocking capacitor respectively, and the secondary edge of the first transformer and the secondary edge of the second transformer are connected to the first driving resistor and the second driving resistor respectively.
The utility model discloses a further improvement lies in, the electric capacity parameter of first blocking electric capacity and second blocking electric capacity is the same.
The utility model discloses a further improvement lies in, first drive resistance is the same with the resistance parameter of second drive resistance.
The utility model discloses a further improvement lies in, still include first switch unit, second switch unit and third transformer, the vice limit of first transformer passes through first switch unit is connected to the primary side of third transformer, the vice limit of second transformer passes through second switch unit is connected to the primary side of third transformer.
The utility model discloses a further improvement lies in, first switch unit includes first switch tube, the grid of first switch tube passes through first drive resistance is connected to the one end on the vice limit of first transformer, the source electrode of first switch tube and the other end on the vice limit of first transformer are connected to the one end on the primary side of third transformer, the drain electrode of first switch tube is connected to the power end.
The utility model discloses a further improvement lies in, first switch unit still includes first diode, the positive pole of first diode is connected to the other end on third transformer primary side, the negative pole of first diode is connected to the power end.
The utility model discloses a further improvement lies in, the second switch unit includes the second switch tube, the grid of second switch tube passes through second drive resistance is connected to the one end on the vice limit of second transformer, the source electrode of second switch tube and the other end ground connection on the vice limit of second transformer, the drain electrode of second switch tube is connected to the other end on the primary side of third transformer.
The utility model discloses a further improvement lies in, second switch unit still includes the second diode, the positive pole ground connection of second diode, the negative pole of second diode is connected to the one end on third transformer primary side.
Compared with the prior art, the beneficial effects of the utility model reside in that: the secondary sides of the first transformer and the second transformer are respectively provided with only one winding, and two driving transformers are sampled to respectively drive the subsequent first switch unit and the second switch unit, so that the parasitic capacitance of the driving transformers can be effectively eliminated; on the basis, the first transformer and the second transformer are connected in parallel, primary sides share one PWM input signal, and the turn-off voltages of the switching tubes of the subsequent first switching unit and the subsequent second switching unit can be consistent. Therefore, the utility model discloses reduce the loss of switch tube and transformer effectively, reduced the temperature rise effectively to drive circuit's reliability has been improved.
Drawings
Fig. 1 is a schematic view of the topology of an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of an embodiment of the present invention;
fig. 3 is a prior art topology diagram.
Detailed Description
Preferred embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
As shown in fig. 1 and 2, this example provides a dual-transistor diode clamp driving circuit including: the PWM driving circuit comprises a first transformer 1, a second transformer 2, a first blocking capacitor 3, a second blocking capacitor 4, a first driving resistor 5 and a second driving resistor 6, wherein the first transformer 1 and the second transformer 2 are connected in parallel, an original element of the first transformer 1 and a primary edge of the second transformer 2 are connected to a PWM input signal end through the first blocking capacitor 3 and the second blocking capacitor 4 respectively, and a secondary edge of the first transformer 1 and a secondary edge of the second transformer 2 are connected to the first driving resistor 5 and the second driving resistor 6 respectively.
First, in this embodiment, the first transformer 1 and the second transformer 2 are connected in parallel, the secondary side of the first transformer 1 and the secondary side of the second transformer 2 are connected to the first driving resistor 5 and the second driving resistor 6, respectively, so that the secondary sides of the first transformer 1 and the second transformer 2 have only one winding, and two driving transformers are sampled to drive the subsequent first switching unit and the subsequent second switching unit, respectively, thereby effectively eliminating parasitic capacitances thereof.
On this basis, in this embodiment, the capacitance parameters of the first dc blocking capacitor 3 and the second dc blocking capacitor 4 are the same; the resistance parameters of the first driving resistor 5 and the second driving resistor 6 are the same. And then the first transformer 1 and the second transformer 2 have blocking capacitors and driving resistors with the same parameters, and are controlled by the same PWM input signal, and when the outputs of the first transformer 1 and the second transformer 2 drive the subsequent first switch unit and the second switch unit respectively, the turn-off voltages of the corresponding first switch tube 8 and the second switch tube 10 are the same.
As shown in fig. 2, the present embodiment further includes a first switching unit, a second switching unit, and a third transformer 7, wherein the secondary side of the first transformer 1 is connected to the primary side of the third transformer 7 through the first switching unit, and the secondary side of the second transformer 2 is connected to the primary side of the third transformer 7 through the second switching unit.
More specifically, as shown in fig. 2, the first switching unit in this embodiment includes a first switching tube 8 and a first diode 9, a gate of the first switching tube 8 is connected to one end of the secondary side of the first transformer 1 through the first driving resistor 5, a source of the first switching tube 8 and the other end of the secondary side of the first transformer 1 are connected to one end of the primary side of the third transformer 7, and a drain of the first switching tube 8 is connected to the power supply terminal Vdc +. The anode of the first diode 9 is connected to the other end of the primary side of the third transformer 7, and the cathode of the first diode 9 is connected to a power supply terminal.
As shown in fig. 2, the second switching unit in this embodiment includes a second switching tube 10 and a second diode 11, a gate of the second switching tube 10 is connected to one end of the secondary side of the second transformer 2 through the second driving resistor 6, a source of the second switching tube 10 and the other end of the secondary side of the second transformer 2 are grounded, and a drain of the second switching tube 10 is connected to the other end of the primary side of the third transformer 7. The anode of the second diode 11 is grounded, and the cathode of the second diode 11 is connected to one end of the primary side of the third transformer 7.
In summary, in the present embodiment, the secondary sides of the first transformer 1 and the second transformer 2 have only one winding, and two driving transformers are sampled to drive the subsequent first switching unit and the subsequent second switching unit respectively, so that the parasitic capacitance thereof can be effectively eliminated; on this basis, the first transformer 1 and the second transformer 2 are connected in parallel, and primary sides share one PWM input signal, so that the turn-off voltages of the switching tubes of the subsequent first switching unit and the second switching unit are consistent. Therefore, the power supply circuit effectively reduces the loss of the switching tube and the transformer, effectively reduces the temperature rise and improves the reliability of the driving circuit.
The above-mentioned embodiments are the preferred embodiments of the present invention, and the scope of the present invention is not limited to the above-mentioned embodiments, and the scope of the present invention includes and is not limited to the above-mentioned embodiments, and all equivalent changes made according to the shape and structure of the present invention are within the protection scope of the present invention.
Claims (8)
1. A dual-transistor diode-clamped driver circuit, comprising: the PWM signal input circuit comprises a first transformer, a second transformer, a first blocking capacitor, a second blocking capacitor, a first driving resistor and a second driving resistor, wherein the first transformer and the second transformer are connected in parallel, original components of the first transformer and the primary side of the second transformer are connected to a PWM input signal end through the first blocking capacitor and the second blocking capacitor respectively, and the secondary side of the first transformer and the secondary side of the second transformer are connected to the first driving resistor and the second driving resistor respectively.
2. The dual-transistor diode clamp driver circuit of claim 1, wherein the first blocking capacitor and the second blocking capacitor have the same capacitance parameter.
3. The dual-transistor diode clamp driver circuit of claim 1, wherein the first and second driver resistors have the same resistance parameters.
4. The dual-transistor diode clamp driving circuit according to any one of claims 1 to 3, further comprising a first switching unit, a second switching unit, and a third transformer, wherein a secondary side of the first transformer is connected to a primary side of the third transformer through the first switching unit, and a secondary side of the second transformer is connected to a primary side of the third transformer through the second switching unit.
5. The dual-transistor diode clamp driving circuit according to claim 4, wherein the first switching unit comprises a first switching transistor, a gate of the first switching transistor is connected to one end of the secondary side of the first transformer through the first driving resistor, a source of the first switching transistor and the other end of the secondary side of the first transformer are connected to one end of the primary side of the third transformer, and a drain of the first switching transistor is connected to the power supply terminal.
6. The dual-transistor diode clamp driver circuit of claim 5, wherein the first switching unit further comprises a first diode, an anode of the first diode being connected to the other end of the primary side of the third transformer, and a cathode of the first diode being connected to a power supply terminal.
7. The dual-transistor diode clamp driving circuit of claim 5, wherein the second switching unit comprises a second switching transistor, a gate of the second switching transistor is connected to one end of the secondary side of the second transformer through the second driving resistor, a source of the second switching transistor and the other end of the secondary side of the second transformer are grounded, and a drain of the second switching transistor is connected to the other end of the primary side of the third transformer.
8. The dual-transistor diode clamp driver circuit of claim 7, wherein the second switching unit further comprises a second diode, an anode of the second diode is grounded, and a cathode of the second diode is connected to one end of the primary side of the third transformer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123235954.5U CN217508583U (en) | 2021-12-21 | 2021-12-21 | Double-tube diode clamping driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123235954.5U CN217508583U (en) | 2021-12-21 | 2021-12-21 | Double-tube diode clamping driving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217508583U true CN217508583U (en) | 2022-09-27 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123235954.5U Active CN217508583U (en) | 2021-12-21 | 2021-12-21 | Double-tube diode clamping driving circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217508583U (en) |
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2021
- 2021-12-21 CN CN202123235954.5U patent/CN217508583U/en active Active
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| GR01 | Patent grant | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20221108 Address after: Floor 9, Keshida Industrial Park R&D Building, No.7 Road, Gaoxinyuan West District, Guangming New District, Shenzhen, Guangdong 518000 Patentee after: SHENZHEN KSTAR NEW ENERGY Co.,Ltd. Address before: 518000 rooms 401 and 402, 4th floor, building 1, software park, kejizhong 2nd Road, Gaoxin North District, Nanshan District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN KSTAR SCIENCE AND TECHNOLOGY Co.,Ltd. |
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| TR01 | Transfer of patent right |