CN217504540U - Electronic detonator bus current acquisition system - Google Patents
Electronic detonator bus current acquisition system Download PDFInfo
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- CN217504540U CN217504540U CN202221515813.0U CN202221515813U CN217504540U CN 217504540 U CN217504540 U CN 217504540U CN 202221515813 U CN202221515813 U CN 202221515813U CN 217504540 U CN217504540 U CN 217504540U
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Abstract
The utility model discloses an electron detonator bus current acquisition system, include: the device comprises an MCU, an operational amplifier U1, an operational amplifier U2, an operational amplifier U3 and an electronic detonator; the output ends of the operational amplifiers U1 and U2 are connected with the MCU, the output ends of the operational amplifiers U1 and U2 are connected with the reverse input ends of the operational amplifiers U1 and U2 through resistors, the reverse input ends of the operational amplifiers U1 and U2 are grounded through resistors, and the homodromous input ends of the operational amplifiers U1 and U2 are connected with the electronic detonator through resistors; the output end of the operational amplifier U3 is connected with the MCU, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a resistor, the reverse input end of the operational amplifier U3 is grounded through a resistor, the homodromous input end of the operational amplifier U3 is connected with the electronic detonator through a plurality of resistors, and the homodromous input end of the operational amplifier U3 is grounded through a plurality of resistors.
Description
Technical Field
The utility model relates to an electron detonator communication equipment technical field, more specifically the utility model relates to an electron detonator bus current acquisition system that says so.
Background
At present, the communication of electronic detonators in the civil explosion industry mostly adopts a current carrier mode, the working current of a single-shot electronic detonator is generally 10-30uA, and the communication current is generally 0.5-2 mA. A single initiator carries 500-1000 power generation electronic detonators with rated output current of 500 mA. Therefore, the collection range of the bus current of the initiator is generally 0-30mA, and the sampling precision is 1 uA. The current circuit scheme in the industry is realized by adopting a high-margin difference comparator, a 16bit AD converter and an MCU control mode. Amplifying the voltage drop of the 5 omega sampling resistor by a differential comparator, and inputting the voltage drop into an AD converter; the AD converter is referenced to the voltage 4.096V, and after the voltage is converted into a digital signal, the digital signal is transmitted to the MCU through the SPI interface. Current sampling range: 4.096V ÷ 40 ÷ 5 Ω ÷ 20.48mA, current resolution: 20.48mA ^ 2^16 ^ 0.3125 uA.
However, the circuit hardware cost is high; in order to achieve the balance between higher sampling precision and sampling resistance power, the current sampling range cannot be larger than 20 mA. MCU and AD converter pass through SPI communication, have restricted sampling efficiency
Therefore, when the sampling precision is ensured, the hardware cost is reduced, the current sampling range is expanded to the rated output current of the initiator, the current of the bus in the full range is sampled, and meanwhile, the sampling efficiency is improved.
SUMMERY OF THE UTILITY MODEL
In view of the above, the utility model provides an electronic detonator bus current acquisition system; the differential comparator is replaced by the 3-path low-cost operational amplifier, the 12-bit AD integrated in the MCU is used for replacing the external 16-bit AD, the current is collected in a segmented mode, the low-current sampling precision is met, the current sampling range is expanded by 30 times, the current sampling can cover the rated current of the bus, an external AD conversion module is not needed, and the reading rate of the sampled data is obviously improved.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
an electronic detonator bus current collection system comprising: the device comprises an MCU, an operational amplifier U1, an operational amplifier U2, an operational amplifier U3 and an electronic detonator;
the output end of the operational amplifier U1 is connected with the MCU, the output end of the operational amplifier U1 is connected with the reverse input end of the operational amplifier U1 through a resistor, the reverse input end of the operational amplifier U1 is grounded through a resistor, the homodromous input end of the operational amplifier U1 is connected with an electronic detonator through a resistor, and the gain of the operational amplifier U1 is 200;
the output end of the operational amplifier U2 is connected with the MCU, the output end of the operational amplifier U2 is connected with the reverse input end of the operational amplifier U2 through a resistor, the reverse input end of the operational amplifier U2 is grounded through a resistor, the homodromous input end of the operational amplifier U2 is connected with an electronic detonator through a resistor, and the gain of the operational amplifier U2 is 20;
the output end of the operational amplifier U3 is connected with the MCU, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a resistor, the reverse input end of the operational amplifier U3 is grounded through a resistor, the homodromous input end of the operational amplifier U3 is connected with an electronic detonator through a plurality of resistors, the homodromous input end of the operational amplifier U3 is grounded through a plurality of resistors, and the gain of the operational amplifier U3 is 10;
preferably, a port 1 of the operational amplifier U1 is connected to the MCU through a resistor R6, the MCU is grounded through a capacitor C3, the port 1 is connected to a port 4 through a resistor R7 and a resistor R8, a port 2 is grounded, a port 3 is connected to the electronic detonator through a resistor R5, a port 4 is grounded through a resistor R9, a port 5 is electrically connected to a D3V3, the port 5 is grounded through a capacitor C1 and a capacitor C2, and a capacitor C1 is connected in parallel to a capacitor C2.
Preferably, a port 1 of the operational amplifier U2 is connected to the MCU through a resistor R13, the MCU is grounded through a capacitor C8, the port 1 is connected to a port 4 through a resistor R16 and a resistor R18, a port 2 is grounded, a port 3 is connected to the electronic detonator through a resistor R12, a port 4 is grounded through a resistor R17, a port 5 is electrically connected to a D3V3, the port 5 is grounded through a capacitor C6 and a capacitor C7, and a capacitor C6 is connected in parallel to a capacitor C7.
Preferably, a port 1 of the operational amplifier U3 is connected to the MCU through a resistor R21, the MCU is grounded through a capacitor C11, the port 1 is connected to a port 4 through a resistor R24 and a resistor R25, the port 2 is grounded, the port 3 is connected to the electronic detonator through resistors R20, R14, R15, R19 and R22, the port 4 is grounded through a resistor R26, the port 5 is electrically connected to the D3V3, the port 5 is grounded through a capacitor C9 and a capacitor C10, and the capacitor C9 is connected in parallel to the capacitor C10.
According to the technical scheme, compared with the prior art, the utility model discloses an electronic detonator bus current acquisition system; the differential comparator is replaced by the 3-path low-cost operational amplifier, the 12-bit AD integrated in the MCU is used for replacing the external 16-bit AD, the current is collected in a segmented mode, the low-current sampling precision is met, the current sampling range is expanded by 30 times, the current sampling can cover the rated current of the bus, an external AD conversion module is not needed, and the reading rate of the sampled data is obviously improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic diagram of a circuit structure provided by the present invention.
Fig. 2 is a schematic diagram of a circuit structure of an application example provided by the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The embodiment of the utility model discloses electron detonator bus current acquisition system, include: the device comprises an MCU, an operational amplifier U1, an operational amplifier U2, an operational amplifier U3 and an electronic detonator;
the output end of the operational amplifier U1 is connected with the MCU, the output end of the operational amplifier U1 is connected with the reverse input end of the operational amplifier U1 through a resistor, the reverse input end of the operational amplifier U1 is grounded through a resistor, the homodromous input end of the operational amplifier U1 is connected with the electronic detonator through a resistor, and the gain of the operational amplifier U1 is 200;
the output end of the operational amplifier U2 is connected with the MCU, the output end of the operational amplifier U2 is connected with the reverse input end of the operational amplifier U2 through a resistor, the reverse input end of the operational amplifier U2 is grounded through a resistor, the homodromous input end of the operational amplifier U2 is connected with the electronic detonator through a resistor, and the gain of the operational amplifier U2 is 20;
the output end of the operational amplifier U3 is connected with the MCU, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a resistor, the reverse input end of the operational amplifier U3 is grounded through a resistor, the homodromous input end of the operational amplifier U3 is connected with the electronic detonator through a plurality of resistors, the homodromous input end of the operational amplifier U3 is grounded through a plurality of resistors, and the gain of the operational amplifier U3 is 10;
in order to further optimize the technical scheme, a port 1 of an operational amplifier U1 is connected with an MCU through a resistor R6, the MCU is grounded through a capacitor C3, the port 1 is connected with a port 4 through a resistor R7 and a resistor R8, a port 2 is grounded, a port 3 is connected with an electronic detonator through a resistor R5, the port 4 is grounded through a resistor R9, a port 5 is in power supply connection with a D3V3, the port 5 is grounded through a capacitor C1 and a capacitor C2, and the capacitor C1 is connected with a capacitor C2 in parallel.
In order to further optimize the technical scheme, a port 1 of an operational amplifier U2 is connected with an MCU through a resistor R13, the MCU is grounded through a capacitor C8, the port 1 is connected with a port 4 through a resistor R16 and a resistor R18, a port 2 is grounded, a port 3 is connected with an electronic detonator through a resistor R12, the port 4 is grounded through a resistor R17, a port 5 is in power supply connection with a D3V3, the port 5 is grounded through a capacitor C6 and a capacitor C7, and the capacitor C6 is connected with a capacitor C7 in parallel.
In order to further optimize the technical scheme, a port 1 of an operational amplifier U3 is connected with an MCU through a resistor R21, the MCU is grounded through a capacitor C11, the port 1 is connected with a port 4 through a resistor R24 and a resistor R25, the port 2 is grounded, a port 3 is connected with an electronic detonator through resistors R20, R14, R15, R19 and R22, the port 4 is grounded through a resistor R26, a port 5 is in power supply connection with a D3V3, the port 5 is grounded through a capacitor C9 and a capacitor C10, and a capacitor C9 is connected with a capacitor C10 in parallel.
The sampling resistor is arranged on the low side, and when the current reaches the rated output current of 500mA of the detonator, the voltage drop of the sampling resistor is 2.5V, namely the highest input sampling voltage. Therefore, the power supply of the operational amplifier can be selected to be 3.3V and is compatible with the MCU power supply. Different sampling precision and sampling range can be realized according to different sampling resistance and amplification factor combinations. For example, 5 sampling resistors are selected to be 1 Ω, the gain of U1 is set to be 400, the collection current range is 0-1.65mA, and the resolution is 0.4 uA; the gain of U2 is set to 20, the acquisition current range is 0-33mA, and the resolution is 8 uA; the gain of U3 was set to 5, acquisition current range 0-660mA, resolution 160 uA. The outputs of U1, U2 and U3 are connected to a 12-bit ADC module integrated by the MCU, 3 voltages are acquired and converted at the same time, and one path is selected for current calculation according to the current range of the conversion result.
Application examples are shown in FIG. 2, and low-cost, high-precision and low-temperature-drift TLV333 is selected for U1, U2 and U3. The gain of U1 is set to 200, the acquisition current range is 3.3V ÷ 200 ÷ 5 Ω ═ 3.3mA, the resolution is 3.3mA ÷ 2^12 ═ 0.805 uA; the gain of U2 is set to 20, the acquisition current range is 3.3V/20/5 Ω -33mA, the resolution is 33 mA/2 ^ 12-8.05 uA; the gain of U3 is set to 10, the acquisition current range 3.3V ÷ 10 ÷ 1 Ω ═ 330mA, the resolution 330mA ÷ 2^12 ═ 80.5 uA.
This application uses low limit current sampling scheme, replace the difference comparator through 3 way low-cost operational amplifier, use MCU internal integration's 12bit AD to replace outside 16bit AD, hardware cost reduces more than 80%, through gathering the electric current segmentation, both satisfied undercurrent sampling precision, 30 times of extension current sampling range again, the current sampling can cover bus rated current, because of need not outside AD conversion module, the read rate of sampling data is showing and is improving.
In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (4)
1. An electronic detonator bus current collection system, comprising: the device comprises an MCU, an operational amplifier U1, an operational amplifier U2, an operational amplifier U3 and an electronic detonator;
the output end of the operational amplifier U1 is connected with the MCU, the output end of the operational amplifier U1 is connected with the reverse input end of the operational amplifier U1 through a resistor, the reverse input end of the operational amplifier U1 is grounded through a resistor, and the homodromous input end of the operational amplifier U1 is connected with an electronic detonator through a resistor;
the output end of the operational amplifier U2 is connected with the MCU, the output end of the operational amplifier U2 is connected with the reverse input end of the operational amplifier U2 through a resistor, the reverse input end of the operational amplifier U2 is grounded through a resistor, and the homodromous input end of the operational amplifier U2 is connected with an electronic detonator through a resistor;
the output end of the operational amplifier U3 is connected with the MCU, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a resistor, the reverse input end of the operational amplifier U3 is grounded through a resistor, the homodromous input end of the operational amplifier U3 is connected with an electronic detonator through a plurality of resistors, and the homodromous input end of the operational amplifier U3 is grounded through a plurality of resistors.
2. The electronic detonator bus current collection system of claim 1, wherein a port 1 of the operational amplifier U1 is connected with an MCU through a resistor R6, the MCU is grounded through a capacitor C3, the port 1 is connected with a port 4 through a resistor R7 and a resistor R8, the port 2 is grounded, a port 3 is connected with the electronic detonator through a resistor R5, the port 4 is grounded through a resistor R9, the port 5 is in power supply connection with a D3V3, the port 5 is grounded through a capacitor C1 and a capacitor C2, and the capacitor C1 is connected with a capacitor C2 in parallel.
3. The electronic detonator bus current collection system of claim 1, wherein a port 1 of the operational amplifier U2 is connected with an MCU through a resistor R13, the MCU is grounded through a capacitor C8, the port 1 is connected with a port 4 through a resistor R16 and a resistor R18, the port 2 is grounded, a port 3 is connected with the electronic detonator through a resistor R12, the port 4 is grounded through a resistor R17, the port 5 is in power supply connection with a D3V3, the port 5 is grounded through a capacitor C6 and a capacitor C7, and the capacitor C6 is connected with a capacitor C7 in parallel.
4. The electronic detonator bus current collection system of claim 1, wherein a port 1 of the operational amplifier U3 is connected with an MCU through a resistor R21, the MCU is grounded through a capacitor C11, the port 1 is connected with a port 4 through a resistor R24 and a resistor R25, the port 2 is grounded, the port 3 is connected with the electronic detonator through resistors R20, R14, R15, R19 and R22, the port 4 is grounded through a resistor R26, the port 5 is in power supply connection with D3V3, the port 5 is grounded through a capacitor C9 and a capacitor C10, and the capacitor C9 is connected with the capacitor C10 in parallel.
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CN202221515813.0U CN217504540U (en) | 2022-06-15 | 2022-06-15 | Electronic detonator bus current acquisition system |
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CN202221515813.0U CN217504540U (en) | 2022-06-15 | 2022-06-15 | Electronic detonator bus current acquisition system |
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