CN217470074U - Ultra-high resolution synthetic aperture imaging camera - Google Patents

Ultra-high resolution synthetic aperture imaging camera Download PDF

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Publication number
CN217470074U
CN217470074U CN202220062948.XU CN202220062948U CN217470074U CN 217470074 U CN217470074 U CN 217470074U CN 202220062948 U CN202220062948 U CN 202220062948U CN 217470074 U CN217470074 U CN 217470074U
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synthetic aperture
definition video
unit
grounded
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徐达
陈浩
金超
卢小银
范书广
李�瑞
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Hefei Zhongke Junda Vision Technology Co ltd
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Hefei Fuhuang Junda High Tech Information Technology Co ltd
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Abstract

The utility model discloses a synthetic aperture imaging camera of ultrahigh resolution, including synthetic aperture optical unit, high definition video unit, conversion unit, main control unit and network transmission unit: the synthetic aperture optical unit comprises two spherical bodies with equal cross sections and unequal cambered surfaces, wherein the outer side is the larger radian, and the inner side is the smaller radian; a plurality of high definition video units are movably arranged at different positions and angles on the inner side of the synthetic aperture optical unit, and any high definition video unit collects local images. The utility model discloses effectively realized through a main control board, can the image after a plurality of high definition video unit of concurrent processing gather and the conversion, fuse arbitrary adjacent local scene to splice a plurality of high-resolution images, splice into the super high resolution ratio image of billion rank pixel, the effect is showing.

Description

Ultra-high resolution synthetic aperture imaging camera
Technical Field
The utility model relates to an image processing technology field, concretely relates to synthetic aperture imaging camera of ultrahigh resolution.
Background
The ultrahigh resolution target imaging has important significance to the fields of security monitoring, national defense and the like, and according to the wave optics theory, the angular resolution of the traditional optical imaging system is as follows: the resolution of θ is 1.22 λ/D, which is limited by the wavelength and the aperture of the optical system, and in the case of fixed wavelength band, the angular resolution of the system can be increased only by increasing the aperture of the system. However, the practical application is restricted by the material, the manufacturing technology difficulty and the like to develop the large-aperture optical system.
Synthetic aperture imaging is a novel visual information detection technology, which is equivalent to large-aperture and small-depth-of-field camera imaging by acquiring target information from multiple angles only by using a plurality of high-definition visible light sensors. Therefore, the technology can obtain the optical perspective imaging result of the shielded target, and can obviously improve the performance of target imaging detection under the conditions of serious shielding, complex background interference and the like.
In the prior art, the mode that the connectors are placed around the main control board is inconvenient for debugging and assembling of equipment, the wiring harness cannot be reasonably planned, the signal isolation degree is low, long-time reliable operation of the equipment cannot be supported, and meanwhile debugging and assembling of the equipment are also inconvenient.
It is therefore desirable to design an ultra-high resolution synthetic aperture imaging camera to solve the above problems.
SUMMERY OF THE UTILITY MODEL
To the problem that above-mentioned prior art exists, the utility model provides a synthetic aperture imaging camera of ultrahigh resolution can use multichannel CMOS module to gather multichannel local scene in parallel, fuses arbitrary adjacent local scene to splice a plurality of high-resolution images, splice into the ultrahigh resolution image of billion rank pixel.
The utility model discloses a synthetic aperture imaging camera of ultrahigh resolution, including synthetic aperture optical unit, high definition video unit, conversion unit, main control unit and network transmission unit:
the synthetic aperture optical unit comprises two spherical bodies with equal cross sections and unequal radians, the spherical surface with the larger radian is the outer side of the synthetic aperture optical unit, and the spherical surface with the smaller radian is the inner side of the synthetic aperture optical unit;
the high-definition video units are movably arranged at different positions and angles on the inner side of the synthetic aperture optical unit, and any high-definition video unit collects local images;
one side of the conversion unit, which is close to the high-definition video unit, is an arc surface, and the arc surface is provided with a plurality of FFC seats corresponding to the high-definition video unit; one side of the conversion unit, which is far away from the high-definition video unit, is provided with an RDIMM;
the main control unit is used for processing high-definition videos processed by the conversion units in parallel, a plurality of RDIMM seats are arranged on one side, close to the conversion units, of the main control unit, and the conversion units are vertically fixed on the main control unit through corresponding golden fingers;
and the network transmission unit is used for transmitting the image processed by the main control unit to the host.
As a further optimization of the above solution, a plurality of connection rings corresponding to the number of the high definition video units are disposed inside the synthetic aperture optical unit, and the connection rings are used to movably dispose the plurality of high definition video units inside the synthetic aperture optical unit.
As a further optimization of the above scheme, the number of the conversion units is four, the number of the RDIMM seats of the main control unit is four, and the four RDIMM seats form a square.
As a further optimization of the above scheme, the main control unit comprises a microprocessor chip XCVU440FLGB 2377; the main control unit comprises a serial high-speed transceiver interface GTH, a clock chip SI5338, an LED and a JTAG & UART.
As a further optimization of the scheme, a plurality of high-definition video units comprise CMOS sensors, specifically AR1820 HS/D;
as a further optimization of the above scheme, the circuit of the conversion unit comprises an FFC socket and an RDIMM, wherein the FFC socket is connected with the high-definition video unit, the model of the FFC socket is AFC11-S18ICA-00_ temp, and the RDIMM comprises 288 pins; each IC of any RDIMM is connected with 4 FFC seats, and each RDIMM is connected with 16 FFC seats;
pins 18 of any four FFC mounts connect to pins 1, 19, 54, 72 of each IC of the RDIMM, respectively;
pins 2, 17 of any four FFC mounts connect with pins 2, 17, 20, 35, 38, 53, 56, 71, respectively, of each IC of the RDIMM;
pins 16 of any four FFC mounts are connected to pins 3, 21, 52, 70 of each IC of the RDIMM, respectively;
pins 15 of any four FFC sockets are connected with pins 4, 23, 51, 69 of each IC of the RDIMM respectively;
pins 14 of any four FFC mounts are connected to pins 5, 24, 50, 68, respectively, of each IC of the RDIMM;
pins 13 of any four FFC mounts are connected to pins 6, 22, 49, 67, respectively, of each IC of the RDIMM;
pin 1 of any four FFC sockets is connected to pin 18, 36, 37, 55 of each IC of the RDIMM, respectively;
pins 3, 4, 7, 8, 9, 10, 11, 12 of any four FFC mounts connect with pins 16, 15, 12, 11, 10, 9, 8, 7, 34, 33, 30, 29, 28, 27, 26, 25, 39, 40, 43, 44, 45, 46, 47, 48, 57, 58, 61, 62, 63, 64, 65, 66, respectively, of each IC of the RDIMM;
pins 5, 6 of any four FFC mounts connect with pins 14, 13, 32, 31, 41, 42, 59, 60, respectively, of each IC of the RDIMM.
As a further optimization of the above scheme, a current limiting circuit is further arranged between the microprocessor chip XCVU440FLGB2377 of the main control unit and the power supply terminal corresponding thereto, and includes a current limiting chip MAX15091AETI +, resistors R4, R1, R14, R17, R10, R8, R15, R2, R7, R9, capacitors C5, C6, C8, C9, C16, C17, C15, C1, C2, C3, and C5;
one end of the C15 is grounded, and the other end is connected with the current-limiting chip pin 8; c8, C5, C6 and C9 are grounded after being connected in parallel;
one end of R8 is connected with the current limiting chip pin 27, one end of C17 is connected with the current limiting chip pin 24, and the other ends of R8 and C17 are grounded; one end of the R14 is connected with the current-limiting chip pin 11, and the other end is grounded; r17, R10 and R4 are connected in series, one end of R17 is grounded, and the other end of R4 is connected with one end of R1; r2 is connected with C16 in series and then grounded, and the other end of R2 is connected with the current limiting chip pin 9; one end of R7 is connected with pin 13, one end of R9 is connected with pin 12, and the other ends of R7 and R9 are converged to output current;
pins 1-7 of the current limiting chip are connected with one end of R1, pins 15-21 are connected with one end of C8, pins 14, 25, 26 and 29 are grounded, pin 10 is connected with one end of C18, pin 28 is connected with one end of R15, and the other ends of C18 and R15 are converged and grounded; pin 23 is connected to one end of R10, and pin 22 is connected to the other end of R10.
As a further optimization of the scheme, the circuit where the plurality of high-definition video units are located comprises resistors R30, R29, R31 and R26, capacitors C43, C44, C45, C50, C48, C49 and C51 and a power supply chip U5, and power supply of the high-definition video units flows from the current limiting circuit;
pins 3, 5, 6 and 12 of the U5 are grounded, pin 8 is grounded after being connected with C51 in series, and pin 4 is grounded after being connected with R30 in series; pin 7 is connected in series with R31 and then grounded;
one end of R29 is connected with an enabling end, and the other end is connected with R30;
c43, C44 and C45 are grounded after being connected in parallel, one end of the circuit after being connected in parallel is connected with the current limiting circuit, and pins 1 and 2 of U5 are connected with one end of C45; r26 is connected with C50 in parallel, one end of the parallel connection is connected with the pin 11, and the other end of the parallel connection is connected with the high-voltage end of R31; c48 and C49 are grounded after being connected in parallel, one end of the connected in parallel is connected with the pin 10, and the other end of the connected in parallel is output to the high-definition video unit.
As a further optimization of the above scheme, the power supply circuit of the clock chip SI5338 includes: the high-definition video unit comprises a resistor R19, capacitors C31, C32, C33, C29, C25 and C26, and a power supply chip U4, wherein power supply of the clock chip flows from a circuit where the high-definition video unit is located;
pin 9 of U4 is grounded, and pin 5 is connected to one end of C33; the pin 7 is connected with one end of the C32, the pin 8 is connected with one end of the C31, and the other ends of the C31, the C32 and the C33 are converged and then grounded; the inflow end of the circuit where the high-definition video unit is located is connected with one end of the C31; l2 in series with C31;
r19 is connected with C29 in parallel, one end is connected with pin 4, and the other end is grounded; the pins 1, 2 and 3 are connected with the high-voltage end of R20 after being converged; r20 is connected with C25 and C26 in parallel, one end of the parallel circuit is grounded, and the other end outputs power to the clock chip.
The utility model adopts the above technical scheme, compare with prior art, the utility model discloses a synthetic aperture imaging camera of ultrahigh resolution has following technological effect:
1. the utility model is provided with a plurality of high definition video units which are connected with the conversion unit through the FFC seat, namely, the images collected by the plurality of high definition video units connected with the conversion unit can be converted and processed in parallel through the conversion unit; and then a plurality of conversion units with the same structure are vertically fixed on the main control unit through corresponding golden fingers, so that the images acquired and converted by a plurality of high-definition video units can be processed in parallel through one main control board, and the whole debugging and assembling of camera equipment are facilitated
2. The utility model discloses the conversion unit that sets up will divide rather than the high definition video unit part of being connected for every conversion unit corresponds multiunit high definition video unit, ensures the inside pencil rational planning of camera, and signal isolation is good, and is respond well.
Drawings
Fig. 1 is a schematic structural diagram of an ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 2 is a schematic structural diagram of a main control unit of an ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 3 is another schematic structural diagram of the main control unit of the ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 4 is a schematic diagram of a protection circuit of an ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 5 is a schematic diagram of a CMOS power supply of an ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 6 is a schematic diagram of an FFC mount of a CMOS of an ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 7 is a schematic structural diagram of a conversion unit of an ultra-high resolution synthetic aperture imaging camera according to the present invention;
fig. 8 is a schematic diagram of the clock power supply of the ultra-high resolution synthetic aperture imaging camera according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clear, the present invention is further described in detail by the embodiments and the accompanying drawings. It should be understood, however, that the description herein of specific embodiments is for purposes of illustration only and is not intended to limit the scope of the present disclosure.
As shown in fig. 1-8, the utility model discloses an ultra high resolution's synthetic aperture imaging camera, including synthetic aperture optical unit, high definition video unit, conversion unit, main control unit and network transmission unit:
the synthetic aperture optical unit comprises two spherical bodies with equal cross sections and unequal radians, the spherical surface with large radian is the outer side of the synthetic aperture optical unit, and the spherical surface with small radian is the inner side of the synthetic aperture optical unit;
the plurality of high-definition video units are movably arranged at different positions and angles on the inner side of the synthetic aperture optical unit, and any high-definition video unit collects local images;
what is particularly described here is that the utility model discloses a gather local image specifically is: any high-definition video unit is arranged at any position inside the synthetic aperture optical unit, and high-definition images within the maximum range are collected based on the position; more specifically, a plurality of high-definition video units are fixed on the inner side of the synthetic aperture optical unit through flanges by adopting a screwing method, so that the equipment is convenient to install or disassemble, and the effect is good.
One side of the conversion unit, which is close to the high-definition video units, is an arc surface, and the arc surface is provided with a plurality of FFC seats corresponding to the high-definition video units in number; one side of the conversion unit, which is far away from the high-definition video unit, is provided with an RDIMM;
it should be noted that the RDIMM of the present invention is computer hardware, such as: the memory strip and the memory slot, the display card and the display card slot and the like are used for transmitting signals; the plurality of high-definition video units are connected with the corresponding FFC seats through FFC flat cables;
the main control unit is used for processing the high-definition videos processed by the conversion units in parallel, one side of the main control unit, which is close to the conversion units, is provided with a plurality of RDIMM seats, and the conversion units are vertically fixed on the main control unit through corresponding golden fingers;
the network transmission unit is used for transmitting the image processed by the main control unit to an external host.
Specifically, the utility model discloses the image that well host computer received is the image after carrying out distortion correction, image concatenation, image fusion processing through the master control unit, and last rethread network transmission unit transmits to the host computer and shows or further processing.
The utility model provides an ultra-high resolution synthetic aperture imaging camera, a plurality of high definition video units arranged are connected with a conversion unit through an FFC seat, namely, images collected by a plurality of high definition video units connected with the conversion unit can be converted and processed in parallel through the conversion unit; and then, a plurality of conversion units with the same structure are vertically fixed on the main control unit through corresponding golden fingers, so that the effect that images acquired and converted by a plurality of high-definition video units can be processed in parallel through one main control board, any adjacent local scenes are fused, a plurality of high-resolution images are spliced to form ultrahigh-resolution images of billion-level pixels, and the effect is remarkable is effectively achieved.
Furthermore, a plurality of connecting rings which correspond to the high-definition video units in number and are equal to the high-definition video units are arranged on the inner side of the synthetic aperture optical unit, and the connecting rings are used for movably arranging the plurality of high-definition video units on the inner side of the synthetic aperture optical unit.
Furthermore, the number of the conversion units is four, the number of the RDIMM seats of the main control unit is four, and the four RDIMM seats form a square; as another embodiment of the utility model, set up 5 converting unit, and 5 converting unit are regular pentagon's order vertical fixation on the main control unit, based on this kind of setting, can effectively utilize the space in the synthetic aperture imaging camera.
Further, the main control unit comprises a micro-processing chip XCVU440FLGB 2377; the main control unit comprises a serial high-speed transceiver interface GTH, a clock chip SI5338, an LED and a JTAG & UART interface.
Further, the plurality of high definition video units comprise CMOS sensors, specifically AR1820 HS/D;
furthermore, the circuit of the conversion unit comprises an FFC seat and an RDIMM, wherein the FFC seat is connected with the high-definition video unit, the model of the FFC seat is AFC11-S18ICA-00_ temp, and the RDIMM comprises 288 pins; each IC of any RDIMM is connected with 4 FFC sites, and any RDIMM is connected with 16 FFC sites, and the 4 FFC sites are respectively D1, D2, D3 and D4:
pin 18 of D1, D2, D3, D4 is connected to pin 1, 19, 54, 72, respectively, of each IC of the RDIMM;
pins 2, 17 of D1, D2, D3, D4 connect with pins 2, 17, 20, 35, 38, 53, 56, 71, respectively, of each IC of the RDIMM;
pin 16 of D1, D2, D3, D4 is connected to pin 3, 21, 52, 70, respectively, of each IC of the RDIMM;
pin 15 of D1, D2, D3, D4 is connected to pin 4, 23, 51, 69, respectively, of each IC of the RDIMM;
pin 14 of D1, D2, D3, D4 is connected to pin 5, 24, 50, 68, respectively, of each IC of the RDIMM;
pin 13 of D1, D2, D3, D4 is connected to pin 6, 22, 49, 67, respectively, of each IC of the RDIMM;
pin 1 of D1, D2, D3, D4 connect with pins 18, 36, 37, 55, respectively, of each IC of the RDIMM;
pins 3, 4, 7, 8, 9, 10, 11, 12 of D1, D2, D3, D4, respectively, connect with pins 16, 15, 12, 11, 10, 9, 8, 7, 34, 33, 30, 29, 28, 27, 26, 25, 39, 40, 43, 44, 45, 46, 47, 48, 57, 58, 61, 62, 63, 64, 65, 66 of each IC of the RDIMM;
pins 5, 6 of D1, D2, D3, D4 connect with pins 14, 13, 32, 31, 41, 42, 59, 60, respectively, of each IC of the RDIMM.
The utility model discloses an at the integrated a plurality of high definition video unit of synthetic aperture optical unit, and divide into groups high definition video unit, make each RDIMM support and carry out the transmission of data to 16 high definition video unit, and through setting up many RDIMM, ensure that synthetic aperture imaging camera can the image data of a plurality of high definition video unit collection of parallel transmission, effectively realized through a main control board, fuse adjacent local scene and the image concatenation of multiposition multi-angle collection, the effect is showing.
Further, a current limiting circuit is arranged between the microprocessor chip XCVU440FLGB2377 and a power supply, and comprises a current limiting chip MAX15091AETI +, a resistor R4, R1, R14, R17, R10, R8, R15, R2, R7, R9, a capacitor C5, C6, C8, C9, C16, C17, C15, C1, C2, C3 and C5;
one end of the C15 is grounded, and the other end is connected with a current-limiting chip pin 8; c8, C5, C6 and C9 are grounded after being connected in parallel;
one end of R8 is connected with the current-limiting chip pin 27, one end of C17 is connected with the current-limiting chip pin 24, and the other ends of R8 and C17 are grounded; one end of the R14 is connected with the current-limiting chip pin 11, and the other end is grounded; r17, R10 and R4 are connected in series, one end of R17 is grounded, and the other end of R4 is connected with one end of R1; the R2 and the C16 are connected in series and then grounded, and the other end of the R2 is connected with a current-limiting chip pin 9; one end of R7 is connected with pin 13, one end of R9 is connected with pin 12, and the other ends of R7 and R9 are converged to output current;
the current limiting chip pins 1-7 are connected with one end of R1, the pins 15-21 are connected with one end of C8, the pins 14, 25, 26 and 29 are grounded, the pin 10 is connected with one end of C18, the pin 28 is connected with one end of R15, and the other ends of C18 and R15 are converged and grounded; pin 23 is connected to one end of R10, and pin 22 is connected to the other end of R10.
It should be noted that the current limiting circuit of the present invention is set to flow a current greater than 9 amperes, i.e. the current limiting circuit cannot normally operate, and the overcurrent capacity is adjusted by R8, I ═ R8/2777.8.
The utility model discloses the current-limiting circuit that sets up, effective control synthetic aperture imaging camera's safe operational environment adopts R8 resistance, and nimble regulating circuit's ability of overflowing, the effect is showing.
Further, the power supply of the high-definition video units of the plurality of high-definition video units, including resistors R30, R29, R31 and R26, capacitors C43, C44, C45, C50, C48, C49 and C51 and a power supply chip U5, flows from the current limiting circuit;
pins 3, 5, 6 and 12 of the U5 are grounded, pin 8 is grounded after being connected with C51 in series, and pin 4 is grounded after being connected with R30 in series; pin 7 is connected in series with R31 and then grounded;
one end of R29 is connected with an enabling end, and the other end is connected with R30;
c43, C44 and C45 are grounded after being connected in parallel, one end of the circuit after being connected in parallel is connected with a current limiting circuit, and pins 1 and 2 of U5 are connected with one end of C45; r26 is connected with C50 in parallel, one end of the parallel connection is connected with the pin 11, and the other end of the parallel connection is connected with the high-voltage end of R31; c48 and C49 are grounded after being connected in parallel, one end of the connected high-definition video unit is connected with the pin 10, and the other end of the connected high-definition video unit outputs the high-definition video unit.
Further, the power supply circuit of the clock chip SI5338 includes: the power supply of the resistor R19, the capacitors C31, C32, C33, C29, C25 and C26 and the power supply chip U4 flows from the circuit where the high-definition video unit is located;
pin 9 of U4 is grounded, and pin 5 is connected to one end of C33; the pin 7 is connected with one end of the C32, the pin 8 is connected with one end of the C31, and the other ends of the C31, the C32 and the C33 are converged and then grounded; the inflow end of the circuit where the high-definition video unit is located is connected with one end of the C31; l2 in series with C31;
r19 is connected with C29 in parallel, one end is connected with pin 4, and the other end is grounded; the pins 1, 2 and 3 are connected with the high-voltage end of R20 after being converged; r20 is connected with C25 and C26 in parallel, one end of the parallel circuit is grounded, and the other end outputs power to the clock chip.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims (9)

1. The ultra-high resolution synthetic aperture imaging camera is characterized by comprising a synthetic aperture optical unit, a high definition video unit, a conversion unit, a main control unit and a network transmission unit:
the synthetic aperture optical unit comprises two spherical bodies with equal cross sections and unequal radians, the spherical surface with the larger radian is the outer side of the synthetic aperture optical unit, and the spherical surface with the smaller radian is the inner side of the synthetic aperture optical unit;
the high-definition video units are movably arranged at different positions and angles on the inner side of the synthetic aperture optical unit, and any high-definition video unit collects local images;
one side of the conversion unit, which is close to the high-definition video unit, is an arc surface, and the arc surface is provided with a plurality of FFC seats corresponding to the high-definition video unit; one side of the conversion unit, which is far away from the high-definition video unit, is provided with an RDIMM;
the main control unit is used for processing high-definition videos processed by the conversion units in parallel, a plurality of RDIMM seats are arranged on one side, close to the conversion units, of the main control unit, and the conversion units are vertically fixed on the main control unit through corresponding RDIMMs;
and the network transmission unit is used for transmitting the image processed by the main control unit to the host.
2. The ultra-high resolution synthetic aperture imaging camera of claim 1, wherein: the inner side of the synthetic aperture optical unit is provided with a plurality of connecting rings with the number corresponding to that of the high-definition video units, and the connecting rings are used for movably arranging the high-definition video units on the inner side of the synthetic aperture optical unit.
3. The ultra-high resolution synthetic aperture imaging camera of claim 1, wherein: the number of the conversion units is four, the number of the RDIMM seats of the main control unit is four, and the four RDIMM seats form a square in a surrounding mode.
4. The ultra-high resolution synthetic aperture imaging camera of claim 1, wherein: the main control unit comprises a micro-processing chip XCVU440FLGB 2377; the main control unit comprises a serial high-speed transceiver interface GTH, a clock chip SI5338, an LED and a JTAG & UART interface.
5. The ultra-high resolution synthetic aperture imaging camera of claim 1, wherein: a plurality of said high definition video units comprise CMOS sensors.
6. The ultra-high resolution synthetic aperture imaging camera of claim 3, wherein: the circuit of the conversion unit comprises an FFC seat and an RDIMM (radio frequency identification memory) which are connected with the high-definition video unit, wherein the RDIMM comprises 288 pins; each IC of any RDIMM is connected with 4 FFC seats, and any RDIMM is connected with 16 FFC seats.
7. The ultra-high resolution synthetic aperture imaging camera of claim 4, wherein: a current limiting circuit is further arranged between the microprocessor chip XCVU440FLGB2377 of the main control unit and a power supply end corresponding to the microprocessor chip, and comprises a current limiting chip MAX15091AETI +, resistors R4, R1, R14, R17, R10, R8, R15, R2, R7, R9, capacitors C5, C6, C8, C9, C16, C17, C15, C1, C2, C3 and C5;
one end of the C15 is grounded, and the other end is connected with the current-limiting chip pin 8; c8, C5, C6 and C9 are grounded after being connected in parallel;
one end of R8 is connected with the current limiting chip pin 27, one end of C17 is connected with the current limiting chip pin 24, and the other ends of R8 and C17 are grounded; one end of the R14 is connected with the current-limiting chip pin 11, and the other end is grounded; r17, R10 and R4 are connected in series, one end of R17 is grounded, and the other end of R4 is connected with one end of R1; the R2 and the C16 are connected in series and then grounded, and the other end of the R2 is connected with the pin 9 of the current-limiting chip; one end of R7 is connected with pin 13, one end of R9 is connected with pin 12, and the other ends of R7 and R9 are converged to output current;
pins 1-7 of the current limiting chip are connected with one end of R1, pins 15-21 are connected with one end of C8, pins 14, 25, 26 and 29 are grounded, pin 10 is connected with one end of C18, pin 28 is connected with one end of R15, and the other ends of C18 and R15 are converged and grounded; pin 23 is connected to one end of R10, and pin 22 is connected to the other end of R10.
8. The ultra-high resolution synthetic aperture imaging camera of claim 5, wherein: the circuit of the high-definition video units comprises resistors R30, R29, R31 and R26, capacitors C43, C44, C45, C50, C48, C49 and C51 and a power supply chip U5, wherein power supply of the high-definition video units flows from the current limiting circuit;
pins 3, 5, 6 and 12 of the U5 are grounded, pin 8 is grounded after being connected with C51 in series, and pin 4 is grounded after being connected with R30 in series; pin 7 is connected in series with R31 and then grounded;
one end of R29 is connected with an enabling end, and the other end is connected with R30;
c43, C44 and C45 are grounded after being connected in parallel, one end of the circuit after being connected in parallel is connected with the current limiting circuit, and pins 1 and 2 of U5 are connected with one end of C45; r26 is connected with C50 in parallel, one end of the parallel connection is connected with the pin 11, and the other end of the parallel connection is connected with the high-voltage end of R31; c48 and C49 are grounded after being connected in parallel, one end of the connected in parallel is connected with the pin 10, and the other end of the connected in parallel is output to the high-definition video unit.
9. The ultra-high resolution synthetic aperture imaging camera of claim 4, wherein: the power supply circuit of the clock chip SI5338 comprises: the high-definition video unit comprises a resistor R19, capacitors C31, C32, C33, C29, C25 and C26 and a power supply chip U4, wherein power supply of the clock chip flows from a circuit where the high-definition video unit is located;
pin 9 of U4 is grounded, and pin 5 is connected to one end of C33; the pin 7 is connected with one end of the C32, the pin 8 is connected with one end of the C31, and the other ends of the C31, the C32 and the C33 are converged and then grounded; the inflow end of the circuit where the high-definition video unit is located is connected with one end of the C31; l2 in series with C31;
r19 is connected with C29 in parallel, one end is connected with pin 4, and the other end is grounded; the pins 1, 2 and 3 are connected with the high-voltage end of R20 after being converged; r20 is connected with C25 and C26 in parallel, one end of the parallel circuit is grounded, and the other end outputs power to the clock chip.
CN202220062948.XU 2022-01-11 2022-01-11 Ultra-high resolution synthetic aperture imaging camera Active CN217470074U (en)

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Address after: Fuhuang New Vision Building, No. 77 Wutaishan Road, Baohe Economic Development Zone, Hefei City, Anhui Province, 230051

Patentee after: Hefei Zhongke Junda Vision Technology Co.,Ltd.

Address before: Fuhuang New Vision Building, No. 77 Wutaishan Road, Baohe Economic Development Zone, Hefei City, Anhui Province, 230051

Patentee before: HEFEI FUHUANG JUNDA HIGH-TECH INFORMATION TECHNOLOGY Co.,Ltd.