CN217468396U - Chip packaging structure - Google Patents

Abstract

The application discloses a chip packaging structure. The chip packaging structure comprises a bare chip, a heat conducting pad and a heat radiating substrate. The die is disposed on the first side of the thermal pad. The second surface of the heat conducting pad faces the first surface of the heat radiating substrate, and the heat conducting pad is abutted to the first surface of the heat radiating substrate. The first surface of the heat conduction pad is provided with an insulating protection piece, and the insulating protection piece extends to the first surface of the heat dissipation substrate from the first surface of the heat conduction pad so as to arrange the heat conduction pad on the heat dissipation substrate. The utility model provides a chip package structure, insulating protection spare can play the guard action to the heat conduction pad, avoids the edge of heat conduction pad because of vibrating or colliding with the damaged production conductive particle of reason such as colliding with, and then avoids conductive particle to cause electronic equipment short circuit such as circuit board.

Description

Chip packaging structure

Technical Field

The application relates to the technical field of chips, in particular to a chip packaging structure.

Background

In the chip field, a bare chip (also called a bare chip or die or bare die chip) is a chip with complete functions, which is cut from a wafer, generally about several millimeters in size, and is provided with pads or holes for connecting metal wires, and the metal wires are connected to external pins or pads of a circuit board when in use. The die is a product form before packaging of the semiconductor component, and becomes a component of the semiconductor element, the integrated circuit, and the like after packaging.

During packaging, the bare chip is provided with the heat conducting pad. At present, after the die and the thermal pad are mounted, the edge of the thermal pad is exposed to air. When the electronic device vibrates, the four sides of the thermal pad may be damaged, which may generate conductive particles and easily short-circuit the electronic device.

SUMMERY OF THE UTILITY MODEL

The embodiment of the application provides a chip packaging structure, which aims to solve the problem that conductive particles are generated due to the damage of the edge of a heat conducting pad.

The embodiment of the application provides a chip packaging structure which comprises a bare chip, a heat conducting pad and a heat radiating substrate. Wherein the die is disposed on a first side of the thermal pad. The second surface of the heat conducting pad faces the first surface of the heat radiating substrate, and the heat conducting pad is abutted to the first surface of the heat radiating substrate. The first surface of the heat conducting pad is provided with an insulating protection piece, and the insulating protection piece extends from the first surface of the heat conducting pad to the first surface of the heat dissipation substrate so as to arrange the heat conducting pad on the heat dissipation substrate.

According to an aspect of an embodiment of the present application, the insulation guard is a flexible film.

According to an aspect of the embodiments of the present application, the heat-dissipating substrate has a rectangular shape.

According to an aspect of an embodiment of the present application, the heat conduction pad has a rectangular shape, and the insulation shield is disposed around an edge of the heat conduction pad.

According to an aspect of the embodiments of the present application, the heat-dissipating substrate has a circular or elliptical shape.

According to an aspect of an embodiment of the present application, the heat conduction pad has a circular or elliptical shape, and the insulation shield is disposed along a circumferential direction of the heat conduction pad.

According to one aspect of the embodiments of the present application, the thermal pad has a size larger than a size of the die.

According to an aspect of the embodiment of the present application, a region of the first surface of the heat dissipation substrate corresponding to the thermal pad is provided with at least one substrate groove.

According to an aspect of the embodiment of the present application, the substrate groove is rectangular or circular, the substrate groove is plural, and the plural substrate grooves are arranged in an array along an extending direction of the thermal pad.

According to one aspect of an embodiment of the present application, the die is bonded to the thermal pad.

The chip package structure that this application embodiment provided, insulating protection spare can play the guard action to the heat conduction pad, avoids the edge of heat conduction pad to produce electrically conductive granule because of reasons such as vibration or collide with damage, and then avoids electrically conductive granule to cause electronic equipment short circuit such as circuit board. Moreover, the insulating protection piece can fix the heat conduction pad on the heat dissipation substrate, so that the connection between the heat conduction pad and the heat dissipation substrate is convenient.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic front view of a chip package structure according to an embodiment of the present disclosure;

fig. 2 is a schematic bottom view of a chip package structure according to an embodiment of the present disclosure.

Reference numerals:

100-die, 200-thermal pad, 300-heat dissipating substrate, 400-insulating shield;

301-substrate recess.

Detailed Description

Embodiments of the present application will be described in further detail below with reference to the drawings and examples. The following detailed description of the embodiments and the accompanying drawings are provided to illustrate the principles of the application and are not intended to limit the scope of the application, i.e., the application is not limited to the described embodiments.

In the description of the present application, it is noted that, unless otherwise indicated, the terms "first" and "second," etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance; "plurality" means two or more; the terms "inner," "outer," "top," "bottom," and the like, as used herein, refer to an orientation or positional relationship shown in the drawings for ease of description and simplicity of description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.

In the conventional chip package structure, after the bare chip and the thermal pad are mounted, four sides of the thermal pad are exposed to the air. When the electronic device vibrates, the edge of the thermal pad may be damaged, which may generate conductive particles and easily short-circuit the electronic device.

Therefore, the embodiment of the application provides a chip packaging structure to avoid the edge breakage of a heat conduction pad to generate conductive particles.

Referring to fig. 1 and fig. 2, fig. 1 is a schematic diagram illustrating a front view structure of a chip package structure according to an embodiment of the present disclosure, and fig. 2 is a schematic diagram illustrating a bottom view structure of the chip package structure according to the embodiment of the present disclosure. As shown in fig. 1 and fig. 2, an embodiment of the present invention provides a chip package structure, which includes a die 100, a thermal pad 200, and a heat dissipation substrate 300. Wherein the die 100 is disposed on a first side of the thermal pad 200. The second surface of the thermal pad 200 is opposite to the first surface, the second surface of the thermal pad 200 faces the first surface of the heat-dissipating substrate 300, and the thermal pad 200 abuts against the first surface of the heat-dissipating substrate 300, so that the thermal pad 200 is located between the die 100 and the heat-dissipating substrate 300.

The insulation guard 400 is disposed on the first surface of the thermal pad 200, and the insulation guard 400 extends from the first surface of the thermal pad 200 to the first surface of the heat sink base plate 300, and the insulation guard 400 is connected to both the thermal pad 200 and the heat sink base plate 300, so that the thermal pad 200 is disposed on the heat sink base plate 300.

In this embodiment, the insulating protection member 400 can protect the thermal pad 200, and prevent the edge of the thermal pad 200 from being damaged due to vibration or collision, and thus prevent the conductive particles from causing short circuit of electronic devices such as circuit boards. Also, the insulating protection member 400 may fix the thermal pad 200 to the heat dissipation substrate 300, so that the connection between the thermal pad 200 and the heat dissipation substrate 300 is convenient.

In particular implementations, the die 100 may be bonded to the thermal pad 200. When the thermal pad 200 is fixed to the heat dissipation substrate 300, the die 100 may be aligned with the center of the heat dissipation substrate 300. The insulating protection member 400 and the thermal pad 200 may be bonded, the insulating protection member 400 may wrap the edge of the thermal pad 200, and the insulating protection member 400 and the heat dissipation substrate 300 may also be bonded.

As one possible example, the insulation guard 400 may be a flexible film-like shape. A flexible insulation shield 400 may provide better protection to the die 100 edges. The insulation guard 400 of a film shape occupies a small space.

As a possible embodiment, the heat dissipation substrate 300 may be rectangular. The shape of the thermal pad 200 may correspond to the shape of the heat sink substrate 300, i.e., the thermal pad 200 may also be rectangular. The insulating shield member 400 may be disposed around the edges of the thermal pad 200, so as to wrap the four sides of the rectangular thermal pad 200 therein, thereby shielding the edges of the thermal pad 200.

As a possible embodiment, the heat dissipation substrate 300 may have a circular or elliptical shape. The shape of the thermal pad 200 may correspond to the shape of the heat sink substrate 300, i.e., the thermal pad 200 may also be circular or elliptical. The insulation shield 400 may be disposed along the circumferential direction of the thermal pad 200 so as to wrap the circular or elliptical edge inside, thereby shielding the edge of the thermal pad 200.

As a possible embodiment, the size of the thermal pad 200 may be larger than that of the die 100, so that the thermal pad 200 may form a better covering for the die 100, and the thermal conduction resistance is smaller, which helps to improve the heat dissipation efficiency of the die 100.

In a specific implementation, for example, when the thermal pad 200 is square, the maximum dimension of the die 100 is smaller than the side length of the thermal pad 200, the die 100 may be disposed at the center of the thermal pad 200, and the thermal pad 200 may cover the entire die 100. When the thermal pad 200 has a circular shape, the maximum dimension of the die 100 is smaller than the radial dimension of the thermal pad 200, the die 100 may be disposed at the center of the thermal pad 200, and the thermal pad 200 may cover the entire die 100.

As a possible embodiment, an area of the first surface of the heat dissipation substrate 300 corresponding to the thermal pad 200 may be provided with at least one substrate groove 301. The substrate groove 301 can absorb the deformation generated after the thermal pad 200 is compressed, so as to prevent the thermal pad 200 from bulging, ensure the connection tightness between the bare chip 100 and the thermal pad 200, and also ensure the connection tightness between the thermal pad 200 and the heat dissipation substrate 300, thereby ensuring the heat dissipation effect of the bare chip 100.

As a possible example, the substrate recess 301 may be rectangular or circular, the substrate recess 301 may be plural, and the plural substrate recesses 301 may be arranged in an array along the extending direction of the thermal pad 200.

In a specific implementation, the substrate groove 301 may be rectangular, and a plurality of rectangular substrate grooves 301 may be arranged in an array along the extending direction of the thermal pad 200, and the thermal pad 200 corresponds to the plurality of rectangular substrate grooves 301 arranged in an array. Alternatively, the substrate groove 301 may be circular, and a plurality of circular substrate grooves 301 may be arranged in an array along the extending direction of the thermal pad 200, and the thermal pad 200 corresponds to the plurality of circular substrate grooves 301 arranged in an array.

It should be understood by those skilled in the art that the foregoing is only illustrative of the present invention, and is not intended to limit the scope of the present invention. It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (10)

1. A chip package structure comprises a die, a thermal pad and a heat sink substrate, wherein,

the bare chip is arranged on the first surface of the heat conducting pad;

the second surface of the heat conducting pad faces the first surface of the heat radiating substrate, and the heat conducting pad is abutted against the first surface of the heat radiating substrate;

the first surface of the heat conducting pad is provided with an insulating protection piece, and the insulating protection piece extends from the first surface of the heat conducting pad to the first surface of the heat dissipation substrate so as to arrange the heat conducting pad on the heat dissipation substrate.

2. The chip package structure according to claim 1, wherein the insulation guard is a flexible film.

3. The chip package structure according to claim 1, wherein the heat-dissipating substrate has a rectangular shape.

4. The chip package structure according to claim 1 or 3, wherein the thermal pad has a rectangular shape, and the insulation shield is disposed around an edge of the thermal pad.

5. The chip package structure according to claim 1, wherein the heat-dissipating substrate has a circular or elliptical shape.

6. The chip package structure according to claim 1 or 5, wherein the thermal pad has a circular or oval shape, and the insulation shield is disposed along a circumferential direction of the thermal pad.

7. The chip package structure of claim 1, wherein the thermal pad has a size larger than a size of the die.

8. The chip package structure according to claim 1, wherein at least one substrate groove is disposed in an area of the first surface of the heat dissipation substrate corresponding to the thermal pad.

9. The chip package structure according to claim 8, wherein the substrate recess has a rectangular shape or a circular shape, and the substrate recess is plural and arranged in an array along an extending direction of the thermal pad.

10. The chip package structure according to claim 1, wherein the die is bonded to the thermal pad.

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