CN217428421U - PCB packaging structure, battery protection board and battery - Google Patents

PCB packaging structure, battery protection board and battery Download PDF

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Publication number
CN217428421U
CN217428421U CN202220646763.3U CN202220646763U CN217428421U CN 217428421 U CN217428421 U CN 217428421U CN 202220646763 U CN202220646763 U CN 202220646763U CN 217428421 U CN217428421 U CN 217428421U
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China
Prior art keywords
pcb
packaging
board
battery
hard board
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CN202220646763.3U
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Chinese (zh)
Inventor
黄天定
颜彩仙
张洪瑜
李保才
潘玉华
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Shenzhen Xinwangda Intelligent Technology Co ltd
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Shenzhen Xinwangda Intelligent Technology Co ltd
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Abstract

The application relates to the technical field of PCB packaging, and discloses a PCB packaging structure, a battery protection plate and a battery, wherein the PCB packaging structure comprises a PCB hard board, a first packaging layer and a plurality of active device wafers, wherein the active device wafers are respectively attached to the attaching surface of the PCB hard board, and each active device wafer is respectively electrically connected with a conductive interconnection structure of the PCB hard board; the first packaging layer is fixedly connected to the PCB hard board, and the plurality of active device wafers are packaged in the first packaging layer together, so that structural members such as a substrate and the like for manufacturing a single part by a device can be omitted, the thickness of the packaged PCB can be effectively reduced, the space is saved, the limitation of the thickness on the number of layers of the PCB hard board is avoided, and the electrical performance is improved. The battery protection board with the PCB packaging structure and the battery with the battery protection board also have the advantages.

Description

PCB packaging structure, battery protection board and battery
Technical Field
The application relates to the technical field of PCB packaging, in particular to a PCB packaging structure, a battery protection plate and a battery.
Background
At present, the conventional hard board packaging is performed after a device is welded on a hard board, the thickness of a finished PCB is relatively thick, and when the hard board packaging is applied to a product, for example, when the hard board packaging is used as a battery protection board and is loaded into the product, the number of layers of the PCB substrate is limited due to thickness space limitation under a set installation space of the product, and the electrical performance is influenced to a certain degree.
SUMMERY OF THE UTILITY MODEL
The present application is directed to solving at least one of the problems in the prior art. Therefore, the application provides a PCB packaging structure, which can reduce the thickness and size of the PCB after packaging and save space.
The application also provides a battery protection board with the PCB packaging structure and a battery with the battery protection board.
The PCB packaging structure comprises a PCB hard board, a first packaging layer and a plurality of active device wafers, wherein the PCB hard board is provided with a mounting surface, the mounting surface is positioned on the top surface of the PCB hard board in the thickness direction, and the PCB hard board is provided with a conductive interconnection structure; the active device wafers are respectively attached to the attaching surface and are arranged at intervals, and each active device wafer is electrically connected with the conductive interconnection structure; the first packaging layer is fixedly connected to the PCB hard board, and the plurality of active device wafers are packaged in the first packaging layer together.
The PCB packaging structure of the embodiment of the first aspect of the application has at least the following beneficial effects: the active device wafers are directly attached to the PCB hard board and are uniformly packaged in the first packaging layer after being electrically connected, and structural members such as a substrate for manufacturing a single part by the device can be omitted, so that the thickness of the packaged PCB can be effectively reduced, the space is saved, the limitation of the whole thickness on the number of layers of the PCB hard board is avoided, and the electrical performance is improved.
According to some embodiments of the present application, each of the active device wafers is electrically connected to the conductive interconnect structure through a pin.
According to some embodiments of the present application, the active device wafer is mounted to the mounting surface by means of an electro-plating solder.
According to some embodiments of the application, the electronic device further comprises a passive device, the passive device is attached to the attaching surface of the PCB hard board and has a set distance with each active device wafer, and the passive device is electrically connected with the conductive interconnection structure.
According to some embodiments of the application, the device further comprises a second packaging layer, wherein the second packaging layer covers the mounting surface and packages the first packaging layer and the passive device inside.
According to some embodiments of the present application, the second encapsulation layer is a hard cover plate and is fixedly connected to the mounting surface.
According to some embodiments of the present application, the PCB board includes at least one layer of substrate, the conductive interconnect structure being disposed within the substrate.
According to some embodiments of the present application, the PCB board includes a plurality of substrates arranged in a stack, and the conductive interconnection structures of adjacent substrates are electrically connected to each other.
The battery protection board of the embodiment of the second aspect of the present application includes the PCB encapsulation structure of the embodiment of the first aspect, and the PCB hard board is further provided with a connection point for electrically connecting to a battery.
The battery protection plate of the embodiment of the second aspect of the application has at least the following beneficial effects: the battery protection board of this embodiment adopts the PCB packaging structure of above-mentioned first aspect embodiment, compares with conventional battery protection board, has saved the structure that the device made monomer device, and consequently, PCB encapsulates the back thickness and reduces, can provide the thickness space for the PCB hardboard increases the number of piles to help improving the electrical properties of battery protection board.
The battery of the embodiment of the third aspect of the present application comprises a battery body and the battery protection board of the embodiment of the second aspect, wherein the battery body is electrically connected to the connection point of the PCB hard board.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
FIG. 1 is a schematic cross-sectional view of a typical conventional PCB package structure;
FIG. 2 is a schematic cross-sectional view of a PCB package structure according to an embodiment of the present application;
fig. 3 is a schematic diagram illustrating an active device wafer mounted on a PCB rigid board in a PCB package structure according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a PCB rigid board, an active device wafer and a first package layer in a PCB package structure according to an embodiment of the present disclosure;
FIG. 5 is a schematic view of a passive device mounted on the structure shown in FIG. 4;
fig. 6 is a schematic cross-sectional view of a PCB package structure according to another embodiment of the present application.
Reference numerals are as follows:
the device comprises a hard board 1, an ink layer 2, a single device 3, a device wafer 4 and a part packaging layer 5;
a PCB (printed circuit board) hard board 100 and a mounting surface 101;
the active device wafer 200, the leads 300, the first package layer 400, the passive device 500, and the second package layer 600.
Detailed Description
The conception and the resulting technical effects of the present application will be clearly and completely described below in conjunction with the embodiments to fully understand the objects, features and effects of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, and not all embodiments, and other embodiments obtained by those skilled in the art without inventive efforts based on the embodiments of the present application belong to the protection scope of the present application.
In the description of the embodiments of the present application, if an orientation description is referred to, for example, the orientations or positional relationships indicated by "upper", "lower", "front", "rear", "left", "right", etc. are based on the orientations or positional relationships shown in the drawings, only for convenience of description and simplification of description, but not for indicating or implying that the referred device or apparatus must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
In the description of the embodiments of the present application, if a feature is referred to as being "disposed", "fixed", "connected", or "mounted" to another feature, it can be directly disposed, fixed, or connected to the other feature or indirectly disposed, fixed, connected, or mounted to the other feature. In the description of the embodiments of the present application, if "a number" is referred to, it means one or more, if "a plurality" is referred to, it means two or more, if "greater than", "less than" or "more than" is referred to, it is understood that the number is not included, and if "greater than", "lower" or "inner" is referred to, it is understood that the number is included. If reference is made to "first" or "second", this should be understood to distinguish between features and not to indicate or imply relative importance or to implicitly indicate the number of indicated features or to implicitly indicate the precedence of the indicated features.
Fig. 1 is a schematic cross-sectional view of a typical conventional PCB packaging structure, and referring to fig. 1, at present, the conventional PCB packaging is performed by welding a single device on an ink layer 2 of a hard board 1, the packaging structure includes the hard board 1, the ink layer 2 and the single device 3, the single device 3 further includes a device wafer 4 and a part packaging layer 5, and the packaging structure generally has the following problems:
1. the whole thickness of the single devices 3 is thicker after the hard board 1 is welded, the thickness is further thickened after packaging, and the number of layers of the PCB substrate is limited due to the limitation of the thickness space in a set installation space of a product, so that the electrical performance is influenced;
2. in the packaging process, the problem that cavities are formed due to incomplete colloid filling is easily caused between the monomer device 3 and the ink layer 2 of the hard board 1;
3. the manufacturing process is complex and the cost is high.
The embodiment of the present application provides a PCB package structure, which can solve at least one of the above problems, for example, the PCB package structure of the embodiment of the present application can reduce the thickness of a PCB formed by packaging, thereby saving space, and also provides a battery protection board having the PCB package structure and a battery having the battery protection board. The following detailed description of the embodiments of the present application is made with reference to fig. 2 to 6:
fig. 2 is a schematic cross-sectional view of a PCB package structure according to an embodiment of the present invention, fig. 3 is a schematic view of a PCB 100 to which an active device wafer 200 is attached in the PCB package structure according to the embodiment of the present invention, fig. 4 is a schematic view of the PCB 100, the active device wafer 200 and a first package layer 400 in the PCB package structure according to the embodiment of the present invention, wherein fig. 2 is a schematic cross-sectional view in a thickness direction, and fig. 3 and 4 are schematic views of a top mounting surface; referring to fig. 2 to 4, a PCB package structure according to a first aspect of the present application includes a PCB board 100, a first package layer 400, and a plurality of active device wafers 200. The PCB hard board 100 has a mounting surface 101, the mounting surface 101 is located on a top surface of the PCB hard board 100 in a thickness direction, and the PCB hard board 100 has a conductive interconnection structure therein. The active device wafers 200 are respectively mounted on the mounting surface 101 of the PCB 100, and the active device wafers 200 are disposed at intervals, and each active device wafer 200 is electrically connected to a conductive interconnection structure (not shown) of the PCB 100, referring to fig. 3, each active device wafer 200 can be electrically connected to the conductive interconnection structure through a pin 300, so that the connection is reliable.
Referring to fig. 2 and 4, the first packaging layer 400 is fixedly connected to the PCB board 100, and a plurality of active device wafers 200 are packaged together in the first packaging layer 400. Therefore, the plurality of active device wafers 200 are directly attached to the PCB hard board 100 and are uniformly packaged in the first packaging layer 400 after being electrically connected, so that structural members such as a substrate and packaging glue for manufacturing a single device can be omitted, the thickness of the packaged PCB can be effectively reduced, the space is saved, the limitation of the thickness on the number of layers of the PCB hard board 100 is avoided, and the electrical performance is improved.
Moreover, the packaging surface of the PCB hard board 100 in the embodiment of the present application may adopt the conventional hard board 1, and the ink layer 2 is disposed on the packaging surface, but because the PCB packaging structure in the embodiment of the present application adopts a plurality of active device wafers 200 directly attached to the PCB hard board 100 and electrically connected to the conductive interconnection structure of the PCB hard board 100, in the embodiment of the present application, the solder mask ink layer 2 may be omitted from the packaging surface of the PCB hard board 100, so that the screen printing process of the solder mask ink layer 2 in the manufacturing of the PCB hard board 100 may be omitted, the manufacturing process of the single device postwelding may be omitted, thereby simplifying the process and effectively saving the cost.
In addition, referring to fig. 1, it can be understood that, in a conventional PCB packaging structure, a single device is packaged by a packaging adhesive after being soldered to a hard board 1, and a problem of a void formed by incomplete filling of the adhesive is likely to occur between the single device 3 and the hard board 1 in a packaging process. In the PCB package structure of the embodiment of the application, the active device wafer 200 is directly attached to the PCB hard board 100 and connected to the conductive interconnection structure of the PCB hard board 100, and the package of the plurality of active device wafers 200 and the PCB hard board 100 is realized through the first package layer 400, and the package of a single device and the PCB hard board 100 is not required to be performed by using a package adhesive, so that the problem that a cavity is formed between the device and the PCB hard board 100 due to the improper filling of the adhesive is solved, and the stability can be effectively improved.
Referring to fig. 3, in some embodiments, the active device wafer 200 is soldered to the mounting surface 101 of the PCB board 100 by electroplating, so that the active device wafer 200 is stably mounted on the mounting surface 101.
Fig. 5 is a schematic diagram of mounting a passive device 500 on the structure shown in fig. 4, fig. 6 is a schematic cross-sectional diagram of a PCB package structure according to another embodiment of the present application, and fig. 5 is a schematic diagram of a top mounting surface.
Referring to fig. 5, in the PCB package structure of some embodiments, a passive device 500 is further included, the passive device 500 is mounted on the mounting surface 101 of the PCB board 100 and has a set pitch with each active device wafer 200, and the passive device 500 is electrically connected to the conductive interconnection structure. Referring to fig. 5 and 6, in some embodiments, the PCB packaging structure further includes a second packaging layer 600, and the second packaging layer 600 covers the mounting surface 101 and packages the first packaging layer 400 and the passive device 500 inside, so that the passive device 500 and the plurality of active device wafers 200 are packaged together, thereby simplifying the structure and the process and effectively improving the packaging efficiency.
In some embodiments, the second packaging layer 600 is a hard cover plate and is fixedly connected to the mounting surface 101, which can perform packaging and protection functions, and ensure stability of the internal active device wafer 200 and the internal passive device 500.
In some embodiments, the PCB 100 includes at least one substrate (not shown) with a conductive interconnection structure disposed therein, and the implementation of the conductive interconnection structure disposed in the substrate can adopt the conventional technology in the art, which is not described herein again.
In some embodiments, the PCB 100 includes a plurality of stacked substrates (not shown), the conductive interconnection structures of the adjacent substrates are electrically connected to each other, and the conductive interconnection structures of the adjacent substrates can be interconnected by using a conventional technique in the art, which is not described herein. Thus, the multi-layer substrate of the PCB board 100 and the active device wafer 200 and the passive device 500 electrically connected to the conductive interconnect structure are electrically interconnected. Therefore, the thickness dimension after packaging can be reduced by the PCB packaging structure of the embodiment of the application, so that a design space is provided for layer number design of the PCB hard board 100, and optimization of electrical performance is facilitated.
In a second embodiment of the present application, a battery protection board (not shown, and partial structure can refer to fig. 2 to 6) is provided, including the PCB encapsulation structure of the first embodiment, and the PCB rigid board 100 is further provided with connection points for electrically connecting to a battery. It can be understood that the battery protection board can be generally used for protecting the charging and discharging performance of the battery, and the battery protection board of the embodiment of the present application adopts the PCB encapsulation structure of the above first aspect embodiment, and compared with the conventional battery protection board, the structure that the active device is made into a single device is omitted, so that the thickness is reduced after the PCB is encapsulated, and a thickness space can be provided for increasing the number of layers of the PCB hard board 100, thereby contributing to improving the electrical performance of the battery protection board.
In a third embodiment of the present application, a battery (not shown, and partial structure thereof can refer to fig. 2 to 6) is provided, which includes a battery body and the battery protection board of the second embodiment, wherein the battery body is electrically connected to a connection point on the PCB 100 in the battery protection board, so as to implement monitoring of a battery state. Moreover, as can be seen from the above, the battery protection board adopts the PCB encapsulation structure of the first embodiment, and compared with the conventional battery protection board, the structure that an active device is made into a single device is omitted, so that the thickness is reduced after the PCB is encapsulated, and a thickness space can be provided for increasing the number of layers of the PCB hard board 100, thereby contributing to improving the electrical performance of the battery protection board, thereby improving the stability of battery state monitoring, and the thickness of the battery protection board is not significantly increased.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present application. Furthermore, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.

Claims (10)

  1. PCB packaging structure, its characterized in that includes:
    the PCB hard board is provided with a mounting surface, the mounting surface is positioned on the top surface of the PCB hard board in the thickness direction, and the PCB hard board is internally provided with a conductive interconnection structure;
    the active device wafers are respectively attached to the attaching surfaces and are arranged at intervals, and each active device wafer is electrically connected with the conductive interconnection structure;
    and the first packaging layer is fixedly connected to the PCB hard board, and the plurality of active device wafers are packaged in the first packaging layer together.
  2. 2. The PCB package of claim 1, wherein each of the active device wafers is electrically connected to the conductive interconnect structure through a pin.
  3. 3. The PCB package structure of claim 1, wherein the active device wafer is mounted on the mounting surface by means of electroplating welding.
  4. 4. The PCB packaging structure of any one of claims 1 to 3, further comprising a passive device, wherein the passive device is attached to the attaching surface of the PCB hard board and has a set distance with each active device wafer, and the passive device is electrically connected with the conductive interconnection structure.
  5. 5. The PCB packaging structure of claim 4, further comprising a second packaging layer, wherein the second packaging layer covers the mounting surface and packages the first packaging layer and the passive device inside.
  6. 6. The PCB packaging structure of claim 5, wherein the second packaging layer is a rigid cover plate and is fixedly connected with the mounting surface.
  7. 7. The PCB encapsulation structure of claim 1, wherein the PCB stiffener comprises at least one layer of substrate within which the conductive interconnect structure is disposed.
  8. 8. The PCB encapsulation structure of claim 7, wherein the PCB stiffener comprises a plurality of stacked substrates, and the conductive interconnects of adjacent substrates are electrically connected to each other.
  9. 9. The battery protection board, characterized by comprising the PCB encapsulation structure of any one of claims 1 to 8, wherein the PCB rigid board is further provided with connection points for electrically connecting to the battery.
  10. 10. A battery comprising a battery body and a battery protection board as claimed in claim 9, wherein the battery body is electrically connected to the connection point of the PCB hard board.
CN202220646763.3U 2022-03-23 2022-03-23 PCB packaging structure, battery protection board and battery Active CN217428421U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220646763.3U CN217428421U (en) 2022-03-23 2022-03-23 PCB packaging structure, battery protection board and battery

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220646763.3U CN217428421U (en) 2022-03-23 2022-03-23 PCB packaging structure, battery protection board and battery

Publications (1)

Publication Number Publication Date
CN217428421U true CN217428421U (en) 2022-09-13

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202220646763.3U Active CN217428421U (en) 2022-03-23 2022-03-23 PCB packaging structure, battery protection board and battery

Country Status (1)

Country Link
CN (1) CN217428421U (en)

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