CN217406414U - Circuit for realizing PWM-PFM composite control of full-bridge LLC converter - Google Patents
Circuit for realizing PWM-PFM composite control of full-bridge LLC converter Download PDFInfo
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- CN217406414U CN217406414U CN202221088993.9U CN202221088993U CN217406414U CN 217406414 U CN217406414 U CN 217406414U CN 202221088993 U CN202221088993 U CN 202221088993U CN 217406414 U CN217406414 U CN 217406414U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
A circuit for realizing PWM-PFM composite control of a full-bridge LLC converter comprises a voltage regulator, a switching frequency circuit and a full-bridge phase-shifting chip U3; the full-bridge phase-shift chip U3 comprises a time-base capacitor access end CT, a time-base resistor access end RT, an EAP end for adjusting the duty ratio Dy, and signal output ends for outputting four driving signals of MOS tubes Q1-Q4 in the full-bridge LLC converter; the switching frequency circuit comprises an operational amplifier U1B, a voltage regulator tube ZD and an operational amplifier U2A, wherein when the current IRT of the time-base resistor reaches the maximum value, the full-bridge phase-shifting chip U3 adjusts the duty ratio Dy according to the output Vfb of the operational amplifier U1 a. The utility model can realize the stabilization of the output voltage without increasing a large dummy load when the converter works in a PWM control mode under the conditions of light load and no load; when the load current is large, the working mode of frequency conversion control (PFM) is automatically entered, the efficiency of the system is improved, and the design of the magnetic core element is simplified.
Description
Technical Field
The utility model belongs to the technical field of a direct current (DC/DC) conversion technique and specifically relates to a circuit that realizes full-bridge LLC converter PWM-PFM combined control is related to.
Background
The full-bridge LLC resonant converter realizes zero voltage switching-on (ZVS) due to the primary side MOS tube, realizes Zero Current (ZCS) by the side rectifier diode, has small switching loss and high overall efficiency, and is generally used for a direct current charging pile power supply, a high-power communication power supply and a vehicle-mounted charging power supply (OBC) at present. Full-bridge LLC resonant converters generally adopt a frequency conversion control (PFM)) operation mode, and the switching frequency needs to be adjusted to be very high under light load (no-load), but a highest switching frequency needs to be set due to the limits of the core element and the switching element, which may make it difficult to stabilize the output voltage under light load (no-load). At present, the stabilization of the light-load voltage is generally realized by the following two methods: 1) the output of the power supply increases a relatively large dummy load, but has the following disadvantages: the loss is increased, the efficiency is reduced, and the size of the power supply is increased; 2) the mode of hiccup control is adopted, but the power supply has the defects that the output voltage ripple is large, the power supply is noisy, and the switching between the hiccup mode and the normal loading mode is difficult and the like in the hiccup working mode.
SUMMERY OF THE UTILITY MODEL
Aiming at the defects of the prior art, the utility model provides a circuit for realizing the PWM-PFM composite control of a full-bridge LLC converter, under the conditions of light load and no load, the converter works in a PWM control mode, and the stability of output voltage can be realized without increasing a large dummy load; when the load current is large, the working mode of frequency conversion control (PFM) is automatically entered, the efficiency of the system is improved, and the design of the magnetic core element is simplified.
A circuit for realizing PWM-PFM composite control of a full-bridge LLC converter comprises a voltage regulator, a switching frequency circuit and a full-bridge phase-shifting chip U3; the full-bridge phase-shifting chip U3 comprises a time-base capacitor access end CT, a time-base resistor access end RT, an EAP end for adjusting the duty ratio Dy, and signal output ends for outputting four driving signals of MOS tubes Q1-Q4 in the full-bridge LLC converter, wherein the time-base capacitor access end CT is connected with a time-base capacitor C3, and the time-base capacitor access end RT, the time-base capacitor access end CT and the time-base capacitor C3 are connected into a charging and discharging circuit; the voltage regulator comprises an operational amplifier U1A, wherein the output end of the operational amplifier U1A is connected with an EAP end and a switching frequency circuit; the switching frequency circuit comprises an operational amplifier U1B, a voltage stabilizing tube ZD and an operational amplifier U2A, wherein the input negative end of the operational amplifier U1B is connected with the output end of the operational amplifier U1A, the output end of the operational amplifier U1B is connected with the input negative end of the operational amplifier U2A, and the voltage stabilizing tube ZD is connected between the output end of the operational amplifier U1B and the input negative end of the operational amplifier U2A; the output end of the operational amplifier U2 is connected with a diode D1, the negative end of a diode D1 is connected with the output end of the operational amplifier U2, and the positive end of a diode D1 is connected with a time-base resistor access end RT; when the current IRT of the time-base resistor reaches the maximum value, the full-bridge phase-shifting chip U3 adjusts the duty ratio Dy according to the output Vfb of the operational amplifier U1 a; and the positive input terminal of the operational amplifier U1B is used for setting a switching threshold value of the light-load or no-load operation in the PWM mode and the PFM mode.
Preferably, a resistor R10 for limiting the minimum value of the current IRT is further disposed in the switching frequency circuit, one end of the resistor R10 is grounded, and the other end is connected to the positive terminal of the diode D1.
Preferably, a resistor R9 is connected between the output terminal of the operational amplifier U2A and the negative terminal of the diode D1.
Preferably, the operational amplifier U2A is connected in parallel with a resistor R8.
Preferably, the operational amplifier U1B is connected in parallel with a resistor R6.
To sum up, the utility model discloses following beneficial effect has:
1: under the conditions of light load and no-load, the converter works in a PWM control mode, and the stability of output voltage can be realized without increasing a large dummy load; when the load current is large, the working mode of frequency conversion control (PFM) is automatically entered, the efficiency of the system is improved, and the design of the magnetic core element is simplified.
Drawings
FIG. 1 is a schematic diagram of a full-bridge LLC resonant converter topology;
FIG. 2 shows driving waveforms of MOS transistor in PFM operation mode;
FIG. 3 is a control block diagram of a UCC3895 controller;
FIG. 4 is a circuit of a PFM and PWM composite operating mode of a full-bridge LLC converter;
fig. 5 shows driving waveforms of the MOS transistor in the PWM operating mode.
Detailed Description
The present invention will be further described with reference to the following detailed description of the preferred embodiments in conjunction with the accompanying drawings.
The embodiment is as follows: a circuit for realizing PWM-PFM composite control of a full-bridge LLC converter is shown in figure 1 and comprises an H-bridge inverter, wherein the H-bridge inverter is composed of MOS (metal oxide semiconductor) tubes Q1, Q2, Q3 and Q4, and the MOS tubes Q1, Q2, Q3 and Q4 are controlled by driving signals OUTA, OUTB, OUTC and OUTD.
Referring to fig. 4, the circuit includes a voltage regulator, a switching frequency circuit, a full bridge phase shift chip U3; the full-bridge phase-shifting chip U3 comprises a time-base capacitor access end CT, a time-base resistor access end RT, an EAP end used for adjusting the duty ratio Dy, and signal output ends used for outputting four driving signals of MOS tubes Q1-Q4 in the full-bridge LLC converter, wherein the time-base capacitor access end CT is connected with a time-base capacitor C3, and the time-base capacitor access end RT, the time-base capacitor access end CT and the time-base capacitor C3 are connected into a charging and discharging circuit. Taking the full-bridge phase-shift controller UCC3895 chip of fig. 3 as an example, the CT (pin 7) and RT (pin 8) are access ends of a time-base capacitor and a time-base resistor of the controller, the controller works through charging and discharging of the time-base capacitor, and the charging and discharging current is in direct proportion to the time-base resistor current. When the RT pin is grounded through the time-base resistor, the current of the time-base resistor is constant, and the value is as follows:
at this time, the working period of the synchronous controller is determined by the time-base resistor and the time-base capacitor together, and the period is as follows:
thus varying the current I of the time-base resistance RT Can change the transformationThe frequency of the device. I is RT The smaller the charging and discharging current is, the lower the working frequency of the chip is; i is RT The larger the charging and discharging current is, the higher the working frequency of the chip is.
As shown in fig. 4, the voltage regulator includes an operational amplifier U1A, the output voltage Vout is sent to the negative input terminal (pin 2) of the operational amplifier U1A through the voltage division of resistors R1 and R2, the set reference of the output voltage is connected to the positive input terminal (pin 3) of the amplifier U1A, and the output terminal of the operational amplifier U1A is connected to the EAP terminal and the switching frequency circuit;
the switching frequency circuit comprises an operational amplifier U1B, a voltage stabilizing tube ZD and an operational amplifier U2A, wherein the input negative end of the operational amplifier U1B is connected with the output end of the operational amplifier U1A, the input positive end of the operational amplifier U1B is used for setting a switching threshold value of light load or no-load operation under a PWM mode and a PFM mode, the output end of the operational amplifier U1B is connected with the input negative end of the operational amplifier U2A, and the voltage stabilizing tube is connected between the output end of the operational amplifier U1B and the input negative end of the operational amplifier U2A; the output end of the operational amplifier U2 is connected with a diode D1, the negative end of the diode D1 is connected with the output end of the operational amplifier U2, and the positive end of the diode D1 is connected with the time-base resistor access end RT.
The principle of the PWM-PFM compound control is as follows:
when the output voltage Vout becomes high due to some reason (e.g., a load becomes small or an input voltage rises), the output Vfb of the operational amplifier U1a decreases, the output Ub of the operational amplifier U1B increases, the output Uc of the operational amplifier U2a decreases, and the charge/discharge current I of the chip U3 decreases RT Increasing, the chip working frequency is increased, so that the gain of the converter is reduced, and the output voltages OUTA, OUTB, OUTC and OUTD are reduced; the process is a PFM (frequency modulation) working mode when the load becomes small, and the PFM working mode is automatically entered when the load becomes small and the load current is large, so that the efficiency of the system is improved, and the design of the magnetic core element is simplified. In this operation mode, the driving waveforms of the 4 MOS transistors Q1, Q2, Q3, and Q4 are shown in fig. 2.
When the load is further reduced, the output of the operational amplifier U1BUb increases to the breakdown voltage VZ1 of the voltage regulator tube ZD, at the moment, the output Uc of the operational amplifier U2A reaches the minimum value, and the charging and discharging current I RT A maximum value is also reached, i.e. the maximum switching frequency fsmax is defined. At this time, the switching frequency is maintained at the highest switching frequency and does not change any more, the controller U3 adjusts the duty ratio Dy (phase shift angle) of the chip according to the feedback voltage Ufb at this time, so as to achieve the effect of voltage stabilization without adding a large dummy load, the process is a PWM (pulse width modulation) working mode, and corresponding driving waveforms of 4 MOS transistors Q1, Q2, Q3, and Q4 are shown in fig. 5. Vout increases, Ufb decreases, the duty cycle Dy of the chip U3 decreases, and Vout decreases through regulation; on the contrary, Vout decreases, Vfb increases, chip duty ratio Dy increases, and Vout increases through regulation.
In order to avoid entering a switch capacitance area when the converter is used for frequency conversion regulation, a resistor R10 for limiting the minimum value of current IRT is further arranged in the switching frequency circuit, one end of the resistor R10 is grounded, the other end of the resistor R10 is connected with the positive end of a diode D1, and R10 is used for setting I in the circuit RT The minimum value of the current, i.e. the lowest value fsmin defining the switching frequency.
A resistor R9 is connected between the output end of the operational amplifier U2A and the negative end of the diode D1. The operational amplifier U2A is connected with a resistor R8 in parallel. The operational amplifier U1B is connected in parallel with a resistor R6.
The above-described embodiments are merely illustrative of the preferred embodiments of the present invention and are not intended to limit the spirit and scope of the present invention. Without departing from the design concept of the present invention, various modifications and improvements made by the technical solution of the present invention by those skilled in the art should fall into the protection scope of the present invention, and the technical contents claimed by the present invention have been fully recorded in the claims.
Claims (5)
1. A circuit for realizing PWM-PFM composite control of a full-bridge LLC converter is characterized by comprising a voltage regulator, a switching frequency circuit and a full-bridge phase-shifting chip U3;
the full-bridge phase-shifting chip U3 comprises a time-base capacitor access end CT, a time-base resistor access end RT, an EAP end for adjusting the duty ratio Dy, and signal output ends for outputting four driving signals of MOS tubes Q1-Q4 in the full-bridge LLC converter, wherein the time-base capacitor access end CT is connected with a time-base capacitor C3, and the time-base capacitor access end RT, the time-base capacitor access end CT and the time-base capacitor C3 are connected into a charging and discharging circuit;
the voltage regulator comprises an operational amplifier U1A, wherein the output end of the operational amplifier U1A is connected with an EAP end and a switching frequency circuit;
the switching frequency circuit comprises an operational amplifier U1B, a voltage stabilizing tube ZD and an operational amplifier U2A, wherein the input negative end of the operational amplifier U1B is connected with the output end of the operational amplifier U1A, the output end of the operational amplifier U1B is connected with the input negative end of the operational amplifier U2A, and the voltage stabilizing tube ZD is connected between the output end of the operational amplifier U1B and the input negative end of the operational amplifier U2A; the output end of the operational amplifier U2 is connected with a diode D1, the negative end of a diode D1 is connected with the output end of the operational amplifier U2, and the positive end of a diode D1 is connected with a time-base resistor access end RT;
current I of full-bridge phase-shift chip U3 in time-base resistor RT When the maximum is reached, adjusting the duty ratio Dy according to the output Vfb of the operational amplifier U1 a;
and the positive input terminal of the operational amplifier U1B is used for setting a switching threshold value of the light-load or no-load operation in the PWM mode and the PFM mode.
2. The circuit for implementing PWM-PFM combined control of full-bridge LLC converter according to claim 1, wherein said switching frequency circuit is further provided with a limiting current I RT And a resistor R10 with one end of the resistor R10 connected to ground and the other end connected to the positive terminal of the diode D1.
3. The circuit for realizing PWM-PFM compound control of a full-bridge LLC converter according to claim 1, wherein a resistor R9 is connected between the output terminal of said operational amplifier U2A and the negative terminal of a diode D1.
4. The circuit for realizing PWM-PFM compound control of a full-bridge LLC converter according to claim 1, wherein said operational amplifier U2A is connected in parallel with a resistor R8.
5. The circuit for realizing PWM-PFM compound control of a full-bridge LLC converter according to claim 1, wherein a resistor R6 is connected in parallel to the operational amplifier U1B.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221088993.9U CN217406414U (en) | 2022-05-09 | 2022-05-09 | Circuit for realizing PWM-PFM composite control of full-bridge LLC converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221088993.9U CN217406414U (en) | 2022-05-09 | 2022-05-09 | Circuit for realizing PWM-PFM composite control of full-bridge LLC converter |
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| Publication Number | Publication Date |
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| CN217406414U true CN217406414U (en) | 2022-09-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202221088993.9U Active CN217406414U (en) | 2022-05-09 | 2022-05-09 | Circuit for realizing PWM-PFM composite control of full-bridge LLC converter |
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| Country | Link |
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| CN (1) | CN217406414U (en) |
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- 2022-05-09 CN CN202221088993.9U patent/CN217406414U/en active Active
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