CN217362910U - Three-level buck converter circuit applying power management chip - Google Patents

Three-level buck converter circuit applying power management chip Download PDF

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Publication number
CN217362910U
CN217362910U CN202220997784.XU CN202220997784U CN217362910U CN 217362910 U CN217362910 U CN 217362910U CN 202220997784 U CN202220997784 U CN 202220997784U CN 217362910 U CN217362910 U CN 217362910U
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tube
circuit
power
flying capacitor
resistor
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张龙
孙权
刘海涛
袁婷
陈智通
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XI'AN AEROSPACE MINXIN TECHNOLOGY CO LTD
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XI'AN AEROSPACE MINXIN TECHNOLOGY CO LTD
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The utility model provides a three-level buck converter circuit applying power management chip, which is arranged on a switch tube M S1 The source end is connected with a resistor voltage divider, the drain end is connected with a main power stage circuit and used for realizing a flying capacitor C A And charge redistribution of the main power stage circuit; the switch tube M S3 The drain terminal is respectively connected with the resistance voltage divider and the ground terminal GND, and the source terminal is connected with the switch tube M S3 Drain terminal of, switching tube M S2 The source end of the primary power stage circuit is connected into a primary power stage circuit and used for connecting a flying capacitor C A Charging to V IN 2; the structure of the application can realize the balance control of the flying capacitor voltage without a complex control loop, simplifies the design of a system control circuit,the problem of unbalanced flying capacitor voltage of the three-level buck converter under different duty ratio states is solved, system stability is improved, and the three-level buck converter has the advantages of being simple in structure and easy to adjust.

Description

Three-level buck converter circuit applying power management chip
Technical Field
The utility model belongs to the technical field of analog integrated circuit, concretely relates to three level buck converter circuit of application power management chip.
Background
The development of modern science and technology has higher and higher requirements on electronic products, and at present, the battery voltage of many portable electronic devices is generally required to be converted into lower voltage to supply power for other increasing functional modules, so that the requirement on a step-down converter is higher and higher. The buck converter in the prior art has high efficiency, but the large inductor in the structure is difficult to integrate on a chip; the switched capacitor converter has no inductor, but the power switch added with the capacitor can increase conversion loss, and the charge redistribution can also increase power loss; the three-level DC-DC converter combines the advantages of the two converters, can reduce the voltage stress of the power device, reduce the inductor current ripple, and reduce the switching loss and the conduction loss, but the balance problem of flying capacitance is an important challenge in the design of the three-level converter.
In the prior art, a flying capacitor voltage real-time calibration scheme that a converter is provided with a Common Mode Feedback (CMFB) and a differential amplifier (DDA) is adopted, the flying capacitor voltage is continuously adjusted to be half of an input voltage VIN, the breakdown problem of a power device can be avoided, inductive current ripples and output voltage ripples are reduced, and the bandwidth of the converter is expanded to a higher frequency; however, the converter in the prior art needs a balance control loop, which increases the complexity of the circuit design, and the feedback loop may be easily affected by the working conditions such as load, which is not good for the normal operation of the converter.
SUMMERY OF THE UTILITY MODEL
To the problem that exists among the prior art, the utility model provides a three level buck converter circuit of application power management chip need not the balance control loop and can be with the half of flight electric capacity voltage calibration to input voltage VIN, has avoided the design of complicated balance loop.
The utility model discloses a realize through following technical scheme:
a three-level buck converter circuit applying a power management chip is characterized by comprising a switching tube M S1 And a switching tube M S2 And a switch tube M S3 Flying capacitor C A The circuit comprises a resistor voltage divider, a main power level circuit and an output end circuit;
input signal V IN The circuit is connected with a resistance voltage divider and a main power level circuit respectively, and the main power level circuit is connected with an output end circuit;
the switch tube M S1 The source end is connected with a resistor voltage divider, the drain end is connected with a main power stage circuit and used for realizing a flying capacitor C A And charge redistribution of the main power stage circuit; the switch tube M S3 The drain terminal is respectively connected with the resistance voltage divider and the ground terminal GND, and the source terminal is connected with the switch tube M S3 Drain terminal of, switching tube M S2 The source end of the primary power stage circuit is connected into a primary power stage circuit and used for connecting a flying capacitor C A Charging to V IN /2；
The flying capacitor C A Upper pole plate connecting switch tube M S1 The source end and the lower polar plate are connected with a switch tube M S3 The source terminal of (1).
Further, the main power stage circuit comprises a power tube M H1 Power tube M H2 Power tube M L1 Power tube M L2 And a flying capacitor C B ；
The power tube M H1 Power tube M H2 Power tube M L1 And a power tube M L2 The source end and the drain end are connected in sequence, and the power tube M H1 The drain terminal and the resistor divider are connected with an input signal V IN Power tube M L2 The source end is grounded;
the flying capacitor C B The upper polar plate is connected with a power tube M H2 The drain end and the lower polar plate are connected with a power tube M L2 A source end.
Further, the flying capacitor C A And a flying capacitor C B The capacity values are equal.
Further, the switch tube M S1 The drain terminals are respectively connected with flying capacitors C B Upper pole plate and power tube M H1 And powerPipe M H2 To (c) to (d);
the switch tube M S3 The source ends of the two are respectively connected with a flying capacitor C B Lower polar plate and power tube M L1 And a power tube M L2 In the meantime.
Further, the output end circuit comprises an inductor L and an output capacitor C O And a load;
one end of the inductor L is connected with the main power stage circuit, and the other end of the inductor L is respectively connected with the capacitor C 0 Upper pole plate and load terminal, capacitor C 0 The other end of the lower polar plate and the load is connected with a ground end GND.
Furthermore, one end of the inductor L is connected with a power tube M H2 And power tube M L1 In between.
Further, the resistor divider comprises resistors R connected in series 1 And a resistance R 2 ；
The resistance R 1 One end is connected with an input signal V IN The other end is respectively connected with a resistor R 2 One terminal, flying capacitor C A Upper pole plate and switch tube M S1 A source end; the resistor R 2 The other end is respectively connected with a ground end GRN and a switch tube M S3 The drain terminal of (1).
Further, the resistor R 1 And a resistance R 2 Are equal.
Compared with the prior art, the utility model discloses following profitable technological effect has:
the utility model provides a three-level buck converter circuit applying power management chip, which is arranged on a switch tube M S1 The source end of the flying capacitor CA is connected with the resistor voltage divider, and the drain end of the flying capacitor CA is connected with the main power level circuit and used for realizing charge redistribution of the flying capacitor CA and the main power level circuit; the switch tube M S3 The drain terminal is respectively connected with the resistance voltage divider and the ground terminal GND, and the source terminal is connected with the switch tube M S3 Drain terminal of, switching tube M S2 The source end of the primary power stage circuit is connected into a primary power stage circuit and used for connecting a flying capacitor C A Charging to V IN 2; the structure of the flying capacitor voltage balancing control circuit can realize the balance control of the flying capacitor voltage without a complex control loop, simplifies the design of a system control circuit, and solves the problem of three-level drop under different duty ratio statesThe problem of unbalanced flying capacitor voltage of the voltage converter is solved, the system stability is improved, and the voltage converter has the advantages of simple structure and easiness in adjustment.
Drawings
Fig. 1 is a circuit diagram of a three-level buck converter employing a power management chip according to an embodiment of the present invention;
FIG. 2 is a state diagram of a three-level buck converter circuit employing a power management chip in phase φ 1 in an embodiment of the invention;
fig. 3 is a state diagram of a three-level buck converter circuit using a power management chip in phase Φ 2 according to an embodiment of the present invention;
FIG. 4 is a state diagram of a three-level buck converter circuit employing a power management chip in phase φ 3 according to an embodiment of the present invention;
fig. 5 is a state diagram of a three-level buck converter circuit employing a power management chip in phase phi 4 according to an embodiment of the present invention.
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings, which are provided for purposes of illustration and not limitation.
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, article, or apparatus.
The utility model provides a three-level buck converter circuit applying power management chip, as shown in figure 1, comprising a switch tube M S1 And a switching tube M S2 And a switching tube M S3 Flying capacitor C A The circuit comprises a resistor voltage divider, a main power level circuit and an output end circuit;
input signal V IN The circuit is connected with a resistance voltage divider and a main power level circuit respectively, and the main power level circuit is connected with an output end circuit;
the switch tube M S1 The source end of the flying capacitor CA is connected with the resistor voltage divider, and the drain end of the flying capacitor CA is connected with the main power level circuit and used for realizing charge redistribution of the flying capacitor CA and the main power level circuit; the switch tube M S3 The drain terminal is respectively connected with the resistance voltage divider and the ground terminal GND, and the source terminal is connected with the switch tube M S3 Drain terminal of, switching tube M S2 The source end of the flying capacitor is connected into a main power stage circuit and used for converting the flying capacitor into a flying capacitor C A Charging to V IN /2；
The flying capacitor C A Upper pole plate connecting switch tube M S1 The source end and the lower polar plate are connected with a switch tube M S3 The source terminal of (1).
Furthermore, the connection mode of the main power stage circuit adopted by the application is the same as the three-level connection mode in the prior art, and the main power stage circuit comprises a power tube M H1 Power tube M H2 Power tube M L1 Power tube M L2 And a flying capacitor C B ；
The power tube M H1 Power tube M H2 Power tube M L1 And a power tube M L2 Source terminal and drain terminalSequentially connected, power tube M H1 The drain terminal and the resistor divider are connected with an input signal V IN Power tube M L2 The source end is grounded;
the flying capacitor C B The upper polar plate is connected with a power tube M H2 The drain end and the lower polar plate are connected with a power tube M L2 A source end.
Further, the flying capacitor C A And a flying capacitor C B The capacity values are equal.
Further, the switch tube M S1 The drain terminals are respectively connected with flying capacitors C B Upper pole plate and power tube M H1 And power tube M H2 To (c) to (d);
the switch tube M S3 The source ends of the two are respectively connected with a flying capacitor C B Lower polar plate and power tube M L1 And a power tube M L2 In the meantime.
Furthermore, the output end circuit comprises an inductor L and an output capacitor C O And a load;
one end of the inductor L is connected with the main power stage circuit, and the other end of the inductor L is respectively connected with the flying capacitor C 0 Upper pole plate and one end of load, capacitor C 0 The other end of the lower polar plate and the load is connected with a ground end GND; specifically, one end of the inductor L is connected with the power tube M H2 And a power tube M L1 In the meantime.
The utility model provides a pair of preferred embodiment does, the resistance divider is including the resistance R who establishes ties 1 And a resistance R 2 ；
The resistor R 1 One end is connected with an input signal V IN The other end is respectively connected with a resistor R 2 One terminal, flying capacitor C A Upper pole plate and switch tube M S1 A source end; the resistor R 2 The other end is respectively connected with a ground end GRN and a switch tube M S3 The drain terminal of (a); specifically, the resistor R 1 And a resistance R 2 Are equal.
The utility model relates to an application power management chip's three level buck converter circuit is when using, and under the conversion ratio was less than 0.5's the condition, a cycle totally four work phase positions are: phase phi 1 phase, phase phi 2 phase, phase phi 3 phase and phase phi 4 phase.
In the phase φ 1 stage, as shown in FIG. 2, the power tube M H1 Power tube M L1 And a switching tube M S3 Conducting, power tube M H2 Power tube M L2 And a switching tube M S1 And a switching tube M S2 Off, at this time flying capacitor C B Upper board of (B) is connected with V IN Stage V of lower level plate connection switch SW And (4) an end. In this stage, the input voltage V IN Give flying capacitance C B Charging, flying capacitor C due to phase phi 4 B Voltage C on B ＝V IN/2 Therefore switch node V SW Terminal voltage is V IN -V B ＝V IN/2 . Since the resistor R1 and the resistor R2 have the same resistance, the flying capacitor C A The voltage obtained is V IN/2 ；
In the phase φ 2 phase, as shown in FIG. 3, the power transistor M L1 Power tube M L2 And a switching tube M S1 And a switching tube M S2 Power tube M H1 Power tube M H2 And a switching tube M S3 Off, at this time flying capacitor C A And a flying capacitor C B In parallel, the flying capacitance C due to the action of the voltage-dividing resistor A And a flying capacitor C B Voltage V on A ＝V B ＝V IN/2 . In this stage, the switch node V SW The voltage at the end is 0;
in the phase phi 3 phase, as shown in FIG. 4, the power tube M H2 Power tube M L2 And a switching tube M S3 Conducting, power tube M H1 Power tube M L1 And a switching tube M S1 And a switching tube M S2 Off, at this time flying capacitor C B Upper board of (B) is connected with V SW And a lower board ground GND. In this phase, the flying capacitance C B Serving as a power source to supply power to the load due to V in the phase phi 2 stage B ＝V IN/2 Therefore switch node V SW Terminal voltage is V IN -V B ＝V IN/2 . V is still present at this time due to the action of the resistive divider A ＝V IN/2 ；
The phase φ 4 phase and the phase φ 2 phase operate in the same manner, as shown in FIG. 5, and therefore have V A ＝V B ＝V IN/2 。
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present invention.

Claims (8)

1. A three-level buck converter circuit applying a power management chip is characterized by comprising a switching tube M S1 And a switching tube M S2 And a switching tube M S3 And a flying capacitor C A The circuit comprises a resistor voltage divider, a main power level circuit and an output end circuit;
input signal V IN The circuit is connected with a resistance voltage divider and a main power level circuit respectively, and the main power level circuit is connected with an output end circuit;
the switch tube M S1 The source end is connected with a resistor voltage divider, the drain end is connected with a main power stage circuit and used for realizing a flying capacitor C A And charge redistribution of the main power stage circuit; the switch tube M S3 The drain terminal is respectively connected with the resistance voltage divider and the ground terminal GND, and the source terminal is connected with the switch tube M S3 Drain terminal of (2), switching tube M S2 The source end of the primary power stage circuit is connected into a primary power stage circuit and used for connecting a flying capacitor C A Charging to V IN /2；
The flying capacitor C A Upper pole plate connecting switch tube M S1 The source end and the lower polar plate are connected with a switch tube M S3 The source terminal of (1).
2. The circuit of claim 1, wherein the main power stage circuit comprises a power transistor M H1 Power tube M H2 Power tube M L1 Power tube M L2 And a flying capacitor C B ；
The power tube M H1 Power tube M H2 Power tube M L1 And a power tube M L2 The source end and the drain end are connected in sequence, and the power tube M H1 The drain terminal and the resistor divider are connected with an input signal V IN Power tube M L2 The source end is grounded;
the flying capacitor C B The upper polar plate is connected with a power tube M H2 The drain end and the lower polar plate are connected with a power tube M L2 A source end.
3. The circuit of claim 2, wherein said flying capacitor C is a flying capacitor C A And a flying capacitor C B The capacity values are equal.
4. The circuit of claim 2, wherein the switch transistor M is a three-level buck converter circuit using a power management chip S1 The drain terminals are respectively connected with flying capacitors C B Upper pole plate and power tube M H1 And a power tube M H2 To (c) to (d);
the switch tube M S3 The source ends of the flying capacitors are respectively connected with a flying capacitor C B Lower polar plate and power tube M L1 And a power tube M L2 In between.
5. The circuit of claim 4, wherein the output circuit comprises an inductor L and an output capacitor C O And a load;
one end of the inductor L is connected with the main power stage circuit, and the other end of the inductor L is respectively connected with the capacitor C 0 Upper pole plate and one end of load, capacitor C 0 The other end of the lower pole plate and the load is connected with a ground end GND.
6. The three-level buck converter circuit using the power management chip of claim 5,one end of the inductor L is connected with a power tube M H2 And a power tube M L1 In the meantime.
7. The three-level buck converter circuit using a power management chip of claim 1, wherein the resistor divider comprises a resistor R connected in series 1 And a resistance R 2 ；
The resistor R 1 One end is connected with an input signal V IN The other end is respectively connected with a resistor R 2 One terminal, flying capacitor C A Upper pole plate and switch tube M S1 A source end; the resistor R 2 The other end is respectively connected with a ground end GRN and a switch tube M S3 The drain terminal of (1).
8. The circuit of claim 7, wherein the resistor R is a resistor R of the three-level buck converter 1 And a resistance R 2 Are equal.
CN202220997784.XU 2022-04-27 2022-04-27 Three-level buck converter circuit applying power management chip Active CN217362910U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220997784.XU CN217362910U (en) 2022-04-27 2022-04-27 Three-level buck converter circuit applying power management chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220997784.XU CN217362910U (en) 2022-04-27 2022-04-27 Three-level buck converter circuit applying power management chip

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CN217362910U true CN217362910U (en) 2022-09-02

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