CN217307644U - 32 frequency multiplication link and frequency multiplication device thereof - Google Patents

32 frequency multiplication link and frequency multiplication device thereof Download PDF

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Publication number
CN217307644U
CN217307644U CN202221133138.5U CN202221133138U CN217307644U CN 217307644 U CN217307644 U CN 217307644U CN 202221133138 U CN202221133138 U CN 202221133138U CN 217307644 U CN217307644 U CN 217307644U
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frequency
circuit
band
pass filter
doubling circuit
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CN202221133138.5U
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杜国孟
蒋兴华
雒一
陈尘
陈美玲
赵小梅
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Chengdu Maxwell Technology Co ltd
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Chengdu Maxwell Technology Co ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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Abstract

The utility model relates to a 32 doubling frequency link, including filter circuit, 2 times frequency multiplier circuit, 4 times frequency multiplier circuit, 8 times frequency multiplier circuit, 16 times frequency multiplier circuit and the 32 times frequency multiplier circuit that connect electrically in proper order, filter circuit inserts treats the doubling frequency signal and filter, 2 times frequency multiplier circuit, 4 times frequency multiplier circuit, 8 times frequency multiplier circuit, 16 times frequency multiplier circuit and 32 times frequency multiplier circuit treat the doubling frequency signal in proper order and carry out 2 times frequency multiplication, 4 times frequency multiplication, 8 times frequency multiplication, 16 times frequency multiplication and 32 times frequency multiplication. A frequency doubling device of a 32-frequency doubling chain comprises the 32-frequency doubling chain. The utility model discloses the circuit is simple, need not too much debugging, low cost.

Description

32 frequency multiplication link and frequency multiplication device thereof
Technical Field
The utility model relates to a frequency mixer doubling of frequency link field, especially a 32 doubling of frequency link and frequency doubling device thereof.
Background
With the development of microwave electronic technology, especially the rapid development of interference systems, countermeasure systems, radar systems and communication systems, the size requirements of signal frequency doubling and frequency doubling links are required to be smaller and the cost requirements are required to be lower in many occasions. To achieve frequency multiplication of the desired signal, the following methods are commonly used in the art: the frequency multiplier is connected in series with direct frequency multiplication, the triode is combined with the link to realize frequency multiplication, and the step diode forms a harmonic emitter to realize frequency multiplication. The three methods all belong to active circuits, and need to be additionally added with a power supply for supplying power, so that the power consumption of a link is inevitably increased; in addition, the three frequency doubling methods all realize frequency doubling by utilizing the nonlinear characteristics of devices, have complicated links, low frequency doubling efficiency, high debugging difficulty, poor consistency, inconvenience for large-scale generation and higher cost.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art's not enough, provide a 32 doubling of frequency link and frequency doubling device thereof, the circuit is simple, need not too much debugging, low cost.
The purpose of the utility model is realized through the following technical scheme:
a32 frequency multiplication link comprises a filter circuit, a 2-time frequency multiplication circuit, a 4-time frequency multiplication circuit, an 8-time frequency multiplication circuit, a 16-time frequency multiplication circuit and a 32-time frequency multiplication circuit which are electrically connected in sequence, wherein the filter circuit is connected to a signal to be multiplied and filters the signal to be multiplied, and the 2-time frequency multiplication circuit, the 4-time frequency multiplication circuit, the 8-time frequency multiplication circuit, the 16-time frequency multiplication circuit and the 32-time frequency multiplication circuit sequentially carry out 2-time frequency multiplication, 4-time frequency multiplication, 8-time frequency multiplication, 16-time frequency multiplication and 32-time frequency multiplication on the signal to be multiplied. The circuit is simple, excessive debugging is not needed, and the cost is low.
Further, the frequency doubling circuit for 2 times, the frequency doubling circuit for 4 times, the frequency doubling circuit for 8 times, the frequency doubling circuit for 16 times and the frequency doubling circuit for 32 times all comprise a mixer and an amplifying filter circuit which are electrically connected in sequence.
Further, the amplifying and filtering circuit comprises an amplifier and a band-pass filter which are electrically connected in sequence.
Further, the filter circuit comprises a 20M-25M band-pass filter, the band-pass filter of the frequency doubling circuit for 2 times is a 40M-50M band-pass filter, the band-pass filter of the frequency doubling circuit for 4 times is an 80M-100M band-pass filter, the band-pass filter of the frequency doubling circuit for 8 times is a 160M-200M band-pass filter, the band-pass filter of the frequency doubling circuit for 16 times is a 320M-400M band-pass filter, and the band-pass filter of the frequency doubling circuit for 32 times is a 640M-800M band-pass filter.
Further, the 32-time frequency doubling circuit is electrically connected with a power divider.
Further, a radio frequency port and a medium frequency port of the frequency mixer are used as input ends of signals to be frequency multiplied, and a local oscillator port of the frequency mixer is used as an output end of the signals to be frequency multiplied.
Further, an intermediate frequency port and a local oscillator port of the frequency mixer are used as input ends of signals to be frequency multiplied, and a radio frequency port of the frequency mixer is used as an output end of the signals to be frequency multiplied.
Further, a radio frequency port and a local oscillator port of the frequency mixer are used as input ends of signals to be frequency multiplied, and an intermediate frequency port of the frequency mixer is used as an output end of the signals to be frequency multiplied.
A frequency doubling device of a 32 frequency doubling chain comprises the 32 frequency doubling chain.
The beneficial effects of the utility model are that:
the circuit is simple, excessive debugging is not needed, the cost is low, and the practicability and the popularization value are high.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
FIG. 2 is a schematic circuit diagram of the present invention;
FIG. 3 is an enlarged view taken at A in FIG. 2;
FIG. 4 is an enlarged view at B in FIG. 2;
FIG. 5 is an enlarged view at C of FIG. 2;
FIG. 6 is an enlarged view taken at D in FIG. 2;
FIG. 7 is an enlarged view at E in FIG. 2;
FIG. 8 is an enlarged view at F of FIG. 2;
fig. 9 is an enlarged view at G in fig. 2.
In the figure, a frequency multiplier circuit for 2-2 times, a frequency multiplier circuit for 3-4 times, a frequency multiplier circuit for 4-8 times, a frequency multiplier circuit for 5-16 times, a frequency multiplier circuit for 6-32 times, a 7-power divider, a band-pass filter for 11-20M-25M, a band-pass filter for 21-40M-50M, a band-pass filter for 31-80M-100M, a band-pass filter for 41-160M-200M, a band-pass filter for 51-320M-400M, a band-pass filter for 61-640M-800M, a 81-mixer and an 82-amplifier.
Detailed Description
The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can be implemented or applied by other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic concept of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the form, amount and ratio of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.
The first embodiment is as follows:
as shown in fig. 1 to 9, a 32-time frequency multiplication link includes a filter circuit, a 2-time frequency multiplication circuit 2, a 4-time frequency multiplication circuit 3, an 8-time frequency multiplication circuit 4, a 16-time frequency multiplication circuit 5, and a 32-time frequency multiplication circuit 6, which are electrically connected in sequence, wherein the filter circuit is connected to a signal to be frequency multiplied and filters the signal to be frequency multiplied, and the 2-time frequency multiplication circuit 2, the 4-time frequency multiplication circuit 3, the 8-time frequency multiplication circuit 4, the 16-time frequency multiplication circuit 5, and the 32-time frequency multiplication circuit 6 sequentially perform 2-time frequency multiplication, 4-time frequency multiplication, 8-time frequency multiplication, 16-time frequency multiplication, and 32-time frequency multiplication on the signal to be frequency multiplied.
The frequency doubling circuit 2 for 2 times, the frequency doubling circuit 3 for 4 times, the frequency doubling circuit 4 for 8 times, the frequency doubling circuit 5 for 16 times and the frequency doubling circuit 6 for 32 times all comprise a mixer 81 and an amplifying filter circuit which are sequentially and electrically connected.
The amplifying and filtering circuit comprises an amplifier 82 and a band-pass filter which are electrically connected in turn.
The filter circuit comprises a 20M-25M band-pass filter 11, the band-pass filter of the frequency doubling circuit 2 for 2 times is a 40M-50M band-pass filter 21, the band-pass filter of the frequency doubling circuit 3 for 4 times is an 80M-100M band-pass filter 31, the band-pass filter of the frequency doubling circuit 4 for 8 times is a 160M-200M band-pass filter 41, the band-pass filter of the frequency doubling circuit 5 for 16 times is a 320M-400M band-pass filter 51, and the band-pass filter of the frequency doubling circuit 6 for 32 times is a 640M-800M band-pass filter 61.
The signal to be frequency multiplied realizes the first frequency multiplication through a frequency multiplication circuit 2 for 2 times;
the signal to be frequency multiplied after the first frequency multiplication realizes the second frequency multiplication through a 4-time frequency multiplication circuit 3;
the signal to be frequency multiplied after the second frequency multiplication realizes the third frequency multiplication through the frequency multiplication circuit 4 for 8 times;
the fourth frequency multiplication of the signal to be frequency multiplied after the third frequency multiplication is realized through the 16-time frequency multiplication circuit 5;
and the fourth-time frequency-multiplied signal to be frequency-multiplied is subjected to fifth frequency multiplication through the 32-time frequency multiplication circuit 6.
The filter circuit and the amplification filter circuit perform frequency selection on the frequency-to-be-multiplied signal to complete the suppression of the stray signal. The frequency selection is carried out by a 20M-25M band-pass filter 11 to obtain a 20M-25M signal, the frequency selection is carried out by a 40M-50M band-pass filter 21 to obtain a 40M-50M signal, the frequency selection is carried out by an 80M-100M band-pass filter 31 to obtain an 80M-100M signal, the frequency selection is carried out by a 160M-200M band-pass filter 41 to obtain a 160M-200M signal, the frequency selection is carried out by a 320M-400M band-pass filter 51 to obtain a 320M-400M signal, and the frequency selection is carried out by a 640M-800M band-pass filter 61 to obtain a 640M-800M signal.
The amplification filter circuit also performs amplification of the signal to be multiplied to a level that can drive the mixer 81 in the next n-times frequency multiplier circuit (n is 4, 8, 16, 32).
The frequency doubling efficiency can be improved by amplifying and frequency selecting the frequency doubling signals.
And the 32-time frequency doubling circuit 6 is electrically connected with a power divider 7.
In FIGS. 2-9, FL-017 to FL-022 are band-pass filters.
U6, U5, U3, U10, U11 and U12 in FIGS. 2-9 are mixers 81.
A frequency doubling device of a 32 frequency doubling chain comprises the 32 frequency doubling chain.
The frequency mixer 81 can realize frequency multiplication by using the general frequency mixer 81, and has multiple selectable models and wide application occasions.
A32 frequency multiplication link and frequency multiplication device thereof realize frequency multiplication by using a universal mixer 81, have simple circuit, do not need excessive debugging, have low cost and have very high practicability and popularization value.
(1) The frequency multiplication is realized by adopting the universal mixer 81 circuit, so that the circuit structure is simplified. (2) Because the frequency multiplication is realized by adopting the universal mixer 81 circuit, the mixer 81 is a passive circuit and does not need an external power supply for power supply, thereby reducing the power consumption of a link. (3) The band-pass filter realizes frequency selection and suppresses unwanted spurious signals. (4) The assembly and debugging difficulty is low, the reliability of a circuit system is high, and the cost is low.
A32 frequency multiplication link and a frequency multiplication device thereof are mainly used in the field of frequency synthesis and have higher popularization value.
A32 frequency multiplication link and a frequency multiplication device thereof are a frequency multiplication scheme with simple circuit structure, solve the problems existing in the prior art, and ensure lower cost, no excessive debugging and more stable system while meeting the basic frequency multiplication function.
The frequency multiplication or combination into a frequency multiplication chain is implemented using the device characteristics of the mixer 81.
Example two:
the second embodiment has all the features of the first embodiment, except that:
the radio frequency port and the intermediate frequency port of the frequency mixer 81 are used as input ends of signals to be frequency multiplied, and the local oscillator port of the frequency mixer 81 is used as an output end of the signals to be frequency multiplied. As shown in fig. 2.
The signal to be frequency multiplied is simultaneously input to the radio frequency port and the intermediate frequency port of the mixer 81, and the signal to be frequency multiplied is output from the local oscillation port.
The signal is added to the mixer 81 at the same time by using the rf port and the if port of the mixer 81, and the frequency multiplication is realized by using the mixing characteristic.
The three ports (local oscillator, rf and if) of the mixer 81 are not necessarily limited to the circuit connection of fig. 2, and may be combined to perform frequency multiplication according to the actual layout of the circuit.
Example three:
the third embodiment has all the features of the first embodiment, except that:
the intermediate frequency port and the local oscillator port of the mixer 81 are used as input ends of signals to be frequency doubled, and the radio frequency port of the mixer 81 is used as an output end of the signals to be frequency doubled.
The signal to be frequency multiplied is simultaneously input to the intermediate frequency port and the local oscillator port of the mixer 81, and the signal to be frequency multiplied is output from the radio frequency port.
Example four:
the fourth embodiment has all the features of the first embodiment, except that:
the radio frequency port and the local oscillator port of the mixer 81 are used as input ends of signals to be frequency multiplied, and the intermediate frequency port of the mixer 81 is used as an output end of the signals to be frequency multiplied.
The signal to be frequency multiplied is simultaneously input to the radio frequency port and the local oscillator port of the mixer 81, and the signal to be frequency multiplied is output from the intermediate frequency port.
The above-mentioned embodiments only express the specific embodiments of the present invention, and the description thereof is specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention.

Claims (9)

1. A 32-frequency-doubled link, comprising: the frequency doubling circuit comprises a filter circuit, a frequency doubling circuit for 2 times, a frequency doubling circuit for 4 times, a frequency doubling circuit for 8 times, a frequency doubling circuit for 16 times and a frequency doubling circuit for 32 times, wherein the filter circuit is connected with a signal to be frequency doubled and filters the signal to be frequency doubled, and the frequency doubling circuit for 2 times, the frequency doubling circuit for 4 times, the frequency doubling circuit for 8 times, the frequency doubling circuit for 16 times and the frequency doubling circuit for 32 times are sequentially arranged on the signal to be frequency doubled.
2. The 32 frequency-doubled link of claim 1, wherein: the 2-time frequency doubling circuit, the 4-time frequency doubling circuit, the 8-time frequency doubling circuit, the 16-time frequency doubling circuit and the 32-time frequency doubling circuit respectively comprise a mixer and an amplifying filter circuit which are sequentially and electrically connected.
3. The 32 frequency multiplication link according to claim 2, wherein: the amplifying and filtering circuit comprises an amplifier and a band-pass filter which are electrically connected in sequence.
4. A 32 frequency-doubled link according to claim 3, wherein: the filter circuit comprises a 20M-25M band-pass filter, the band-pass filter of the frequency doubling circuit for 2 times is a 40M-50M band-pass filter, the band-pass filter of the frequency doubling circuit for 4 times is an 80M-100M band-pass filter, the band-pass filter of the frequency doubling circuit for 8 times is a 160M-200M band-pass filter, the band-pass filter of the frequency doubling circuit for 16 times is a 320M-400M band-pass filter, and the band-pass filter of the frequency doubling circuit for 32 times is a 640M-800M band-pass filter.
5. The 32 frequency-doubled link of claim 1, wherein: and the 32-time frequency doubling circuit is electrically connected with a power divider.
6. A 32 frequency-doubled link according to claim 2, wherein: the radio frequency port and the intermediate frequency port of the frequency mixer are used as input ends of signals to be frequency multiplied, and the local oscillator port of the frequency mixer is used as an output end of the signals to be frequency multiplied.
7. A 32 frequency-doubled link according to claim 2, wherein: and the intermediate frequency port and the local oscillator port of the frequency mixer are used as input ends of signals to be frequency multiplied, and the radio frequency port of the frequency mixer is used as an output end of the signals to be frequency multiplied.
8. A 32 frequency-doubled link according to claim 2, wherein: and the radio frequency port and the local oscillator port of the frequency mixer are used as input ends of signals to be frequency multiplied, and the intermediate frequency port of the frequency mixer is used as an output end of the signals to be frequency multiplied.
9. A frequency multiplier apparatus for a 32-frequency multiplier link, comprising: the frequency doubling means comprises a 32 frequency doubling chain according to any of claims 1 to 8.
CN202221133138.5U 2022-05-11 2022-05-11 32 frequency multiplication link and frequency multiplication device thereof Active CN217307644U (en)

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Application Number Priority Date Filing Date Title
CN202221133138.5U CN217307644U (en) 2022-05-11 2022-05-11 32 frequency multiplication link and frequency multiplication device thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221133138.5U CN217307644U (en) 2022-05-11 2022-05-11 32 frequency multiplication link and frequency multiplication device thereof

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CN217307644U true CN217307644U (en) 2022-08-26

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