CN217240616U

CN217240616U - Electric motor car speed governing circuit

Info

Publication number: CN217240616U
Application number: CN202220877595.9U
Authority: CN
Inventors: 钟允林; 钟平昌
Original assignee: Individual
Current assignee: Individual
Priority date: 2022-04-15
Filing date: 2022-04-15
Publication date: 2022-08-19
Anticipated expiration: 2032-04-15

Abstract

The utility model provides an electric vehicle speed regulation circuit, which relates to the technical field of power electronics and comprises an electric circuit, a regenerative braking circuit and a field effect tube control circuit; the electric circuit consists of a power supply, a switch S1, a motor M, a second diode, a field-effect tube Q1 and a detection resistor R0; the regenerative braking circuit comprises a motor M, a field effect transistor Q2, an inductor L1, a diode D1, a power supply and a diode D3. The fet control circuits are electrically connected to the gate and source of the first fet Q1 and the gate and source of the second fet Q2, respectively. The beneficial effect of this application does: the speed of the electric vehicle is regulated by controlling the on-time proportion (Q2 is turned off when Q1 is turned on, and Q1 is turned off when Q2 is turned on) of the two field effect transistors, so that the regulating function is more sensitive and controllable; by arranging the regenerative braking circuit, energy recovery is realized when the vehicle goes downhill or is braked, and the regenerative braking device is energy-saving and environment-friendly.

Description

Electric motor car speed governing circuit

Technical Field

The utility model relates to a power electronic technology field particularly, relates to an electric motor car speed governing circuit.

Background

With the progress of science and technology, electric bicycles, electric motorcycles and electric automobiles are widely applied to transportation, the existing electric vehicles are generally driven by direct current motors and speed is adjusted by Hall elements, but the existing speed adjusting technology has the defects of high cost, no regenerative braking function, no zero protection function and the like.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide an electric motor car speed governing circuit to improve above-mentioned problem. In order to realize the purpose, the utility model discloses the technical scheme who takes as follows:

the application provides an electric motor car speed governing circuit, its characterized in that, it has included: the main circuit comprises a power supply, a first switch S1, a first diode D1, a motor and a first inductor L1, wherein the positive pole of the power supply is electrically connected with the positive pole of the motor through the first switch S1, the negative pole of the power supply is electrically connected with the negative pole of the motor through a diode D3 and a first inductor L1, the first diode D1 is connected with the first switch S1 in parallel, the cathode of the first diode D1 is electrically connected with the positive pole of the power supply, and the anode of the first diode D1 is electrically connected with the positive pole of the motor; the electric circuit comprises a first field-effect transistor Q1, a detection resistor R0 and a second diode D2, wherein one end of the detection resistor R0 is electrically connected with the negative electrode of the power supply, the other end of the detection resistor R0 is electrically connected with the source electrode of the first field-effect transistor Q1, the drain electrode of the first field-effect transistor Q1 is electrically connected with the negative electrode of the motor, the second diode D2 is connected with the motor in parallel, the cathode of the second diode D2 is electrically connected with the positive electrode of the motor, and the anode of the second diode D2 is electrically connected with the negative electrode of the motor; the regenerative braking circuit comprises a second field effect transistor Q2 and a third diode D3, wherein the drain electrode of the second field effect transistor Q2 is electrically connected with the positive electrode of the motor, the source electrode of the second field effect transistor Q2 is electrically connected with the negative electrode of the motor through a first inductor L1, the cathode electrode of the third diode D3 is electrically connected with the source electrode of the second field effect transistor Q2, and the anode electrode of the third diode D3 is electrically connected with the negative electrode of the power supply; the field effect transistor control circuit comprises a magnetic speed regulation circuit and a control circuit, and the field effect transistor control circuit is respectively and electrically connected with the grid electrode and the source electrode of the first field effect transistor Q1 and the grid electrode and the source electrode of the second field effect transistor Q2.

Further, the magnetic speed regulating circuit comprises a resonant circuit, a rectifying circuit and an adjusting circuit which are sequentially connected in series.

Further, the resonant circuit comprises a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a first nand gate I and a variable inductor L2, wherein the first capacitor C1, the first nand gate I, the second resistor R2 and the second capacitor C2 are sequentially connected in series and then connected in parallel with the variable inductor, and the first resistor R1 is connected in parallel with the first nand gate I.

The rectifier circuit further includes a fourth diode D4, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a fourth capacitor C4, and a first transistor BG1, where the fourth diode D4, the third resistor R3, and the fourth resistor R4 are sequentially connected in series and then connected to a base of the first transistor BG1, the fourth capacitor C4 is electrically connected to a collector of the first transistor BG1, an emitter of the first transistor BG1 is connected to the ninth resistor R9, the third capacitor C3 is electrically connected to a end of the third resistor R3 away from the fourth diode D4, the fifth resistor R5 is electrically connected to a end of the fourth resistor R4 away from the third resistor R3, and the sixth resistor R6 is electrically connected to an emitter of the first transistor BG 1.

Further, the adjusting circuit comprises a seventh resistor R7 and a first voltage regulator tube ZD1, one end of the seventh resistor R7 is connected with an emitter of a first triode BG1, the other end of the seventh resistor R3526 is electrically connected with the first voltage regulator tube ZD1, and the end of the first voltage regulator tube ZD1 far away from the seventh resistor R7 is electrically connected with the field effect tube control circuit.

Further, the magnetic speed regulation circuit further comprises a zero protection circuit, the zero protection circuit is connected in series with the magnetic speed regulation circuit, the zero protection circuit comprises an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a second nand gate II, a third nand gate III, a fourth nand gate IV, a second voltage regulator ZD2, a fifth capacitor C5, a sixth capacitor C6 and a second triode BG2, the input ends of the second nand gate II are respectively connected with the sixth capacitor C6 and the twelfth resistor R12, the output end of the second nand gate II is electrically connected with the thirteenth resistor R13, the input end of the third nand gate III is respectively connected with the anodes of the thirteenth resistor R13 and the fifth diode D5, the output end of the third nand gate III is respectively connected with the cathodes of the eleventh resistor R11 and the sixth diode D6, an anode of the sixth diode D6 is connected to one end of the seventh resistor R7, which is far away from an emitter of the first triode, an output end of the fourth nand gate IV is electrically connected to a cathode of the fifth diode D5, an input end of the fourth nand gate IV is electrically connected to collectors of a tenth resistor R10, a fifth capacitor C5 and a second triode BG2, respectively, one end of the tenth resistor R10, which is far away from the fourth nand gate IV, is electrically connected to the eighth resistor R8, one end of the eighth resistor R8, which is far away from the tenth resistor R10, is electrically connected to a collector of the second triode BG2, an emitter of the second triode BG2 is electrically connected to the second voltage regulator ZD2, a base of the second triode BG2 is electrically connected to the ninth resistor R9, and one end of the ninth resistor R9, which is far away from the second triode BG2, is connected to an emitter of the first triode.

Further, the control circuit comprises a first integrated chip U1, a second integrated chip U2, a fourth integrated chip U4 and an auxiliary circuit, a third pin and a first pin of the first integrated chip are respectively electrically connected with a gate and a source of the first field effect transistor Q1, a third pin and a first pin of the second integrated chip U2 are electrically connected with a gate and a source of the second field effect transistor Q2 through a voltage regulating circuit to lead out a purple line and a gray line, the fourth integrated chip U4 controls the first integrated chip U1 and a signal sent by the second integrated chip U2, the second field effect transistor Q2 is turned off when the first field effect transistor Q1 is turned on, and the first field effect transistor Q1 is turned off when the second field effect transistor Q2 is turned on.

Furthermore, the auxiliary circuit further comprises a detection circuit and a third integrated chip U3, wherein two ends of the detection circuit are respectively connected with the detection resistor R0 and a sixth pin of the third integrated chip U3 for electrical connection, and the third integrated chip U3 is electrically connected with the first integrated chip U1.

The beneficial effects of the utility model are that:

1. the utility model discloses a set up two field effect transistors and field effect tube control circuit, adjust the speed of the on-time proportional control electric motor car of two field effect transistors, speed control function is sensitive controllable more.

2. The utility model discloses a set up regenerative braking circuit, realize carrying out energy recuperation, energy-concerving and environment-protective when downhill path or braking.

3. The utility model discloses a set up zero-bit protection circuit, realize need with speed adjustment to zero position when the electric motor car starts for the driver is safer when driving.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the embodiments of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention, and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.

FIG. 1 is a block diagram of the main circuit;

FIG. 2 is a block diagram of the magnetic speed regulation circuit;

fig. 3 is a block diagram of the control circuit.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without making creative efforts belong to the protection scope of the present invention.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined or explained in subsequent figures. Meanwhile, in the description of the present invention, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

As shown in fig. 1, the present embodiment provides a speed regulating circuit for an electric vehicle, which includes a main circuit, a forward electromotive circuit, a regenerative braking circuit, and a field-effect tube control circuit.

The main circuit comprises a power supply, a first switch S1, a first diode D1, a motor, a first inductor L1, a second diode D2, a third diode D3, a detection resistor R0, a first field effect transistor Q1 and a second field effect transistor Q2.

The electric circuit comprises a first field-effect transistor Q1, a detection resistor R0 and a second diode D2, wherein one end of the detection resistor R0 is electrically connected with the negative pole of a power supply, the other end of the detection resistor R0 is electrically connected with the source electrode of the first field-effect transistor Q1, the drain electrode of the first field-effect transistor Q1 is electrically connected with the negative pole of the motor, the second diode D2 is connected with the motor in parallel, the cathode of the second diode D2 is electrically connected with the positive pole of the motor, and the anode of the second diode D2 is electrically connected with the negative pole of the motor. With the design, when the power switch is switched on, current flows from the positive pole of the power supply to the positive pole and the negative pole of the motor through the switch, the conducted first field effect transistor Q1 and the detection resistor R0 to return to the negative pole of the power supply; when the first field effect transistor Q1 is turned off, the current of the motor is freewheeled by the diode D2, so the current of the motor always flows into the motor from the positive pole and flows out of the motor from the negative pole, torque is generated to operate normally, and the inductor L1 prevents short circuit.

The regenerative braking circuit comprises a second field effect transistor Q2 and a third diode D3, wherein the drain electrode of the second field effect transistor Q2 is electrically connected with the positive electrode of the motor, the source electrode of the second field effect transistor Q2 is electrically connected with the negative electrode of the motor through a first inductor L1, the cathode electrode of a third diode D3 is electrically connected with the source electrode of the second field effect transistor Q2, and the anode electrode of the third diode D3 is electrically connected with the negative electrode of the power supply. With the design, when the motor rotates, the action of electromagnetic induction generates counter potential (the effect of power generation, if the counter potential is larger than the average value of the power supply voltage in one period), current flows out from the positive pole of the motor in the reverse direction, passes through the second field effect transistor Q2 (when the second field effect transistor is switched on), the inductor L and returns to the negative pole of the motor; when the second field effect transistor Q2 is turned off, the current returns from the positive pole of the motor to the positive pole of the battery through the first switch S1 to charge the power supply, and then returns to the negative pole of the motor from the negative pole, the third diode D3, the first inductor L1. Since the electric motor outputs current to the outside at this time, a braking torque is generated, which is a regenerative braking state.

The fet control circuit includes a magnetic speed regulation circuit and a control circuit electrically connected to the gate and source of the first fet Q1 and the gate and source of the second fet Q2, respectively. By means of the design, the speed of the electric vehicle is adjusted by controlling the on-time proportion of the first field effect transistor Q1 and the second field effect transistor Q2 through the field effect transistors, so that the speed adjustment is sensitive and reliable, and the safety is high.

In some embodiments, as shown in fig. 2, fig. 2 illustrates a structure of a magnetic speed regulation circuit including a resonance circuit, a rectification circuit, and a regulation circuit connected in series in this order. By means of the design, the magnetic speed regulation circuit transmits the speed regulation signal to the control circuit, the on-time proportion of the first field-effect tube Q1 and the second field-effect tube Q2 is regulated, the speed of the electric vehicle is controlled, and the magnetic speed regulation circuit has the advantages of being sensitive in signal transmission and high in transmission precision.

Further, the resonant circuit includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a first nand gate I, and a variable inductor L2. The first capacitor C1 and the input end of the first NAND gate I are connected with the connection point of the first resistor R1, and the variable inductance first resistor R1 is connected with the first NAND gate I in parallel. According to the application, an integrated chip EF4093BP is used for sending a 200kHz square wave signal, the square wave signal is output to a series resonance circuit consisting of a second resistor R2, a second capacitor C2 and an adjustable inductor L2 through a first NAND gate I, the inductance of a coil is changed by adjusting the position of a magnetic core of the variable inductor L2, and then the voltage at two ends of the variable inductor L2 is changed, so that the design converts the designation of speed adjustment into a voltage signal for transmission.

Furthermore, the rectifier circuit comprises a fourth diode D4, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a fourth capacitor C4 and a first triode BG1, wherein the fourth diode D4, the third resistor R3 and the fourth resistor R4 are sequentially connected in series and then connected with the base of the first triode BG1, the fourth capacitor C4 is electrically connected with the collector of the first triode BG 9, the emitter of the first triode BG1 is connected with the connection point of the sixth resistor R6, the seventh resistor R7 and the ninth resistor R9, the third capacitor C3 is electrically connected with the end of the third resistor R3 far away from the fourth diode D4, the fifth resistor R5 is electrically connected with the end of the fourth resistor R5 far from the third resistor R5, and the sixth resistor R5 is electrically connected with the emitter of the first triode BG 5. Due to the design, through the rectification of the fourth diode D4, the filtering function of a circuit consisting of the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the third capacitor C3 and the fourth capacitor C4 is achieved, and then the direct-current voltage is output through the amplification of the first triode BG1 and the emitter E of the first triode BG1, so that the transmission of signals is clearer and more accurate.

Further, the adjusting circuit comprises a seventh resistor R7 and a first voltage regulator tube ZD1, one end of the seventh resistor R7 is connected with the emitter of the triode BG1, the other end of the seventh resistor R1 is electrically connected with the first voltage regulator tube ZD1, and the end part of the first voltage regulator tube ZD1 far away from the seventh resistor R7 is electrically connected with the field effect tube control circuit. By means of the design, the direct-current voltage output by the emitter E of the first triode BG1 is adjusted by the seventh resistor R7 and the first voltage regulator tube ZD1 and is transmitted to the control circuit of the field effect tube, so that signal transmission is more accurate, and speed regulation is sensitive and reliable.

In other embodiments, as shown in fig. 2, the magnetic speed regulation circuit further includes a zero-position protection circuit, the zero-position protection circuit is connected in series to the magnetic speed regulation circuit, the zero-position protection circuit includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a second nand gate II, a third nand gate III, a fourth nand gate IV, a second voltage regulator ZD2, a fifth capacitor C5, a sixth capacitor C6 and a second transistor BG2, the input terminals of the second nand gate II are respectively connected to the sixth capacitor C6 and the twelfth resistor R12, the output terminal of the second nand gate II is electrically connected to the thirteenth resistor R13, the input terminal of the third nand gate III is respectively connected to the anodes of the thirteenth resistor R13 and the fifth diode D5, the output terminal of the third nand gate III is respectively connected to the cathodes of the eleventh resistor R11 and the sixth diode D6, the anode of the sixth diode D6 is connected with the resistor R7 and the first voltage regulator ZD1, the output end of the fourth nand gate IV is connected with the cathode of the fifth diode D5, the input end of the fourth nand gate IV is respectively connected with the tenth resistor R10, the fifth capacitor C5 and the collector of the second triode BG2, one end of the tenth resistor R10 far away from the fourth nand gate IV is electrically connected with the eighth resistor R8, one end of the eighth resistor R8 far away from the tenth resistor R10 is electrically connected with the collector of the second triode BG2, the emitter of the second triode BG2 is electrically connected with the second voltage regulator ZD2, the base of the second triode BG2 is electrically connected with the ninth resistor R9, one end of the ninth resistor R9 far away from the second triode BG2 is connected with the emitter of the triode BG1, in this application, the bistable state maintaining circuit is composed of the second nand gate II and the third nand gate III, when the power switch is just turned on, the sixth capacitor C6 is at low potential, the input of the second nand gate II is thus at a low potential and thus outputs a high potential, the input of the third nand gate III is at a high potential and the output is at a low potential, so that the input of the second nand gate II is always maintained at a low potential and the output signal of the emitter E of the first transistor BG1 (the pacing signal supplied to the fet) is latched. If the speed regulation knob is not at the zero position when the power switch is turned on, the first triode BG1 has output, the second triode BG2 has input current, the collector C is at the low potential, the input low potential and the output of the fourth NAND gate IV are high potential, so that the bistable state maintaining circuit is not influenced, the output signal is always locked, the first field effect transistor Q1 is always in the turn-off state, and the electric vehicle is always in the parking state. If the speed-regulating knob is in a zero position when the power switch is turned on (or is not in the zero position when the power switch is turned on but returns the zero position by hand), the base input signal of the second triode BG2 is at the lowest value, the second triode BG2 is in an off state, the collector C is at a high potential, the input of the fourth NAND gate IV is at a high potential, the output end 4 is at a low potential, the input end of the third NAND gate III is changed into a low potential, so that the bistable state maintaining circuit jumps to be in an open state, and the output end of the third NAND gate III is always at the high potential without influencing the output of green line signals. Therefore, when the electric vehicle cannot be started by turning on the power switch, the speed can be regulated normally only by turning the knob back to the zero position. Due to the design, the electric vehicle can be started after the speed is adjusted to the zero position when the electric vehicle is started, and the safety of the electric vehicle is improved.

As shown in fig. 1 and 3, in some embodiments, the control circuit includes a first integrated chip U1, a second integrated chip U2, a fourth integrated chip U4, and an auxiliary circuit, a third pin and a first pin of the first integrated chip are electrically connected to a gate and a source of the first fet Q1, voltages of the third pin and the first pin of the second integrated chip U2 are adjusted to lead out a purple line and a gray line, which are electrically connected to a gate and a source of the second fet Q2, respectively, the auxiliary circuit is connected to the remaining pins of the first integrated chip and the second integrated chip, and the fourth integrated chip U4 controls signals sent by the first integrated chip U1 and the second integrated chip U2, so that the second fet Q2 is in an off state when the first fet Q1 is turned on, and the first fet Q1 is in an off state when the second fet Q2 is turned on. In the present application, the on and off states of the first fet Q1 are determined by the gate voltages, i.e., the voltages of the orange line and the black line, and the voltage between the orange line and the black line is determined by the voltage between the third pin and the first pin of the first ic U1; the turn-on and turn-off of the second fet Q2 are determined by the gate voltages, i.e., the voltages of the purple line and the gray line, and the voltage between the purple and gray lines is determined by the voltage between the third pin and the first pin of the second chip U2. When the 3 pin is high potential, the voltage of the orange black line or the purple gray line is high output, otherwise, the low output is that the field effect tube is in a conducting or a switching-off state. The control circuit can ensure that the second field effect transistor Q2 is turned off when the first field effect transistor Q1 is turned on, and on the contrary, the first field effect transistor Q1 is turned off when the second field effect transistor Q2 is turned on. The first integrated chip U1 and the second integrated chip U2 adopt 555 time base integrated circuits, and the integrated circuits have the characteristics of convenience in use, low price, good stability and the like. The auxiliary circuit connects components such as commonly used resistors, capacitors and the like with the integrated chip to form a complete circuit, so that a specific oscillation delay effect can be completed. The design enables the control circuit to control the on-time proportion of the first field effect transistor Q1 and the second field effect transistor Q2 more accurately and stably.

In other embodiments, as shown in fig. 1 and fig. 3, the auxiliary circuit further includes a detection circuit and a third integrated chip U3, two ends of the detection circuit are respectively connected to the detection resistor R0 and the sixth pin of the third integrated chip U3 for electrical connection, and the third integrated chip U3 is electrically connected to the first integrated chip U1. When a large current flows through the detection resistor R0, the current is overlarge at the moment, the detection resistor R0 with the resistance of 0.01 ohm sends a signal through a white line to the 6 th pin of the third integrated chip U3, the control circuit receives the signal and then quickly turns off the first field effect transistor Q1 through logic judgment, and the field effect transistor is prevented from being damaged. The field effect transistor is protected by the design, damage caused by overlarge current is avoided, and the safety performance and the service life of the electric vehicle are improved.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. An electric vehicle speed regulating circuit, comprising:

an electric circuit, which comprises a power supply, a first switch S1, a motor M, a first field effect transistor Q1, a detection resistor R0 and a second diode D2, wherein one end of the detection resistor R0 is electrically connected with the negative pole of the power supply, the other end of the detection resistor R0 is electrically connected with the source pole of the first field effect transistor Q1, the drain pole of the first field effect transistor Q1 is electrically connected with the negative pole of the motor, the second diode D2 is connected with the motor in parallel, the cathode of the second diode D2 is electrically connected with the positive pole of the motor, and the anode of the second diode D2 is electrically connected with the negative pole of the motor;

the regenerative braking circuit comprises a second field effect transistor Q2 and a third diode D3, the drain electrode of the second field effect transistor Q2 is electrically connected with the positive electrode of the motor, the source electrode of the second field effect transistor Q2 is electrically connected with the negative electrode of the motor through a first inductor L1, the cathode electrode of the third diode D3 is electrically connected with the source electrode of the second field effect transistor Q2, and the anode electrode of the third diode D3 is electrically connected with the negative electrode of the power supply; and

and the field effect tube control circuit comprises a magnetic speed regulation circuit and a control circuit, and the field effect tube control circuit is respectively and electrically connected with the grid electrode and the source electrode of the first field effect tube Q1 and the grid electrode and the source electrode of the second field effect tube Q2.

2. The speed regulation circuit of an electric vehicle as claimed in claim 1, wherein: the magnetic speed regulating circuit comprises a resonant circuit, a rectifying circuit and an adjusting circuit which are sequentially connected in series.

3. The electric vehicle speed regulation circuit of claim 2, wherein: the resonance circuit comprises a first NAND gate I, a second NAND gate II, a third NAND gate III, a fourth NAND gate IV, a first capacitor C1, a first resistor R1, a second resistor R2, a second capacitor C2 and a variable inductor L2 which are separated by an integrated chip 4093, wherein the NAND gate I, the capacitor C1 and the resistor R1 form a square wave generator, and a 3-pin of the square wave generator outputs a square wave signal and passes through a series resonance circuit formed by the second resistor R2, the second capacitor C2 and the variable inductor L2.

4. The electric vehicle speed regulation circuit of claim 2, wherein: the rectifier circuit comprises a fourth diode D4, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a fourth capacitor C4 and a first triode BG1, wherein the fourth diode D4, the third resistor R3 and the fourth resistor R4 are sequentially connected in series and then connected with the base of the first triode BG1, the fourth capacitor C4 is electrically connected with the collector of the first triode BG1, the emitter of the first triode BG1 is connected with the rectifier circuit in series, the third capacitor C3 is electrically connected with one end, away from the fourth diode D4, of the third resistor R3, the fifth resistor R5 is electrically connected with one end, away from the third resistor R3, of the fourth resistor R4, and the sixth resistor R6 is electrically connected with the emitter of the first triode BG 1.

5. The electric vehicle speed regulation circuit of claim 2, wherein: the adjusting circuit comprises a seventh resistor R7 and a first voltage-regulator tube ZD1, one end of the seventh resistor R7 is electrically connected with an emitting electrode of a first triode BG1, the other end of the seventh resistor R3526 is electrically connected with the first voltage-regulator tube ZD1, and the end part, far away from the seventh resistor R7, of the first voltage-regulator tube ZD1 is electrically connected with the field-effect tube control circuit.

6. The electric vehicle speed regulation circuit of claim 4, wherein: the magnetic speed regulation circuit further comprises a zero protection circuit, the zero protection circuit is connected to the magnetic speed regulation circuit in series, the zero protection circuit comprises an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a second NAND gate II, a third NAND gate III, a fourth NAND gate IV, a second voltage regulator ZD2, a fifth capacitor C5, a sixth capacitor C6 and a second triode BG2, the input ends of the second NAND gate II are respectively connected with a sixth capacitor C6 and the twelfth resistor R12, the output end of the second NAND gate II is electrically connected with the thirteenth resistor R13, the input end of the third NAND gate III is respectively connected with the anodes of the thirteenth resistor R13 and the fifth diode D5, the output end of the third NAND gate III is respectively connected with the cathodes of the eleventh resistor R11 and the sixth diode D6, an anode of the sixth diode D6 is electrically connected to the magnetic speed regulation circuit, an output end of the fourth nand gate IV is electrically connected to a cathode of the fifth diode D5, a pin 5 of the fourth nand gate IV is connected to a tenth resistor R10, a pin 6 of the fourth nand gate IV is electrically connected to a fourth capacitor C4 and a collector of the second transistor BG2, one end of the tenth resistor R10 away from the fourth nand gate IV is electrically connected to the eighth resistor R8, one end of the eighth resistor R8 away from the tenth resistor R10 is electrically connected to a collector of the second transistor BG2, an emitter of the second transistor BG2 is electrically connected to the second voltage regulator ZD2, a base of the second transistor BG2 is electrically connected to the ninth resistor R9, and one end of the ninth resistor R9 away from the second transistor BG2 is connected to an emitter of the first transistor BG 1.

7. The electric vehicle speed regulation circuit of claim 1, wherein: control circuit includes first integrated chip U1, second integrated chip U2, fourth integrated chip U4 and auxiliary circuit, the third stitch and the first stitch of first integrated chip respectively with first field effect transistor Q1's grid and source electricity are connected, second integrated chip U2's third stitch and first stitch lead out purple line and grey line through voltage control circuit and are connected with second field effect transistor Q2's grid and source electricity, fourth integrated chip U4 control first integrated chip U1 with the signal that second integrated chip U2 sent guarantees when first field effect transistor Q1 switches on second field effect transistor Q2 is the off-state, when second field effect transistor Q2 switches on first field effect transistor Q1 is the off-state.

8. The speed regulation circuit of an electric vehicle of claim 7, wherein: the auxiliary circuit further comprises a detection circuit and a third integrated chip U3, two ends of the detection circuit are respectively connected with the detection resistor R0 and a sixth pin of the third integrated chip U3 and are electrically connected, and the third integrated chip U3 is electrically connected with the first integrated chip U1.