CN217216504U - C-band low-noise amplifier - Google Patents
C-band low-noise amplifier Download PDFInfo
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- CN217216504U CN217216504U CN202221038745.3U CN202221038745U CN217216504U CN 217216504 U CN217216504 U CN 217216504U CN 202221038745 U CN202221038745 U CN 202221038745U CN 217216504 U CN217216504 U CN 217216504U
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Abstract
The utility model relates to a microwave monolithic integrated circuit field especially involves a C wave band low noise amplifier. The amplifier includes: the circuit comprises an input circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, a first-stage bias circuit and a second-stage bias circuit; the input circuit comprises a first inductor, a first capacitor and a second inductor, wherein an input end is respectively connected with the first inductor, the second inductor and one end of the first capacitor, the other end of the first inductor is grounded, the other end of the second inductor is connected with the first-stage amplifier circuit, and the first-stage amplifier circuit, the first-stage bias circuit, the second-stage amplifier circuit and the second-stage bias circuit are sequentially connected. Through the utility model discloses can reach the effect that extends the matching bandwidth and improve the output standing wave.
Description
Technical Field
The utility model relates to a microwave monolithic integrated circuit field especially involves a C wave band low noise amplifier.
Background
With the rapid development of microwave technology in recent years, the demand for amplifiers in the fields of microwave communication, navigation, guidance, satellite communication, military electronic countermeasure, radar, and the like is increasing. Especially, due to the increasing shortage of radio communication frequency resources, the frequency intervals allocated to various communication systems are becoming more and more dense, which puts higher demands on the devices at the front end of the receiving system, especially on the low noise amplifier device, to reduce the unwanted interference factors and amplify the received useful signals. The low-noise amplifier manufactured by using the Microwave Monolithic Integrated Circuit (MMIC) has the advantages of low cost, good consistency, less parasitic effect, small volume, high reliability and the like. The monolithic low-noise amplifier manufactured by using the 0.25um GaAs phemt depletion type process has very good noise, very mature process and low manufacturing cost, but is difficult to design for designing the broadband low-noise amplifier with the C-band use frequency of 4-8 GHz.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that a C wave band low noise amplifier is provided.
The utility model provides an above-mentioned technical problem's technical scheme as follows: a C-band low noise amplifier, comprising: the circuit comprises an input circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, a first-stage bias circuit and a second-stage bias circuit;
the input circuit comprises a first inductor, a first capacitor and a second inductor, wherein an input end is respectively connected with the first inductor, the second inductor and one end of the first capacitor, the other end of the first inductor is grounded, the other end of the second inductor is connected with the first-stage amplifier circuit, and the first-stage amplifier circuit, the first-stage bias circuit, the second-stage amplifier circuit and the second-stage bias circuit are sequentially connected.
The utility model has the advantages that: the input circuit designed by the utility model can effectively expand the matching bandwidth; the first-stage amplifier circuit can realize self-bias power supply and noise matching and improve the stability of the amplifier; the first stage of biasing circuit can effectively adjust interstage matching; the second-stage amplifying circuit can realize self-bias power supply, so that the gain obtains good flatness and the stability of the amplifier is improved.
On the basis of the technical scheme, the utility model discloses can also do following improvement.
Further, the first-stage amplifier circuit specifically includes: the first transistor, the third inductor, the second resistor and the second capacitor;
one end of the first transistor is connected with the other end of the second inductor, a source electrode of the first transistor is connected with one end of the third inductor, a drain electrode of the first transistor is connected with the first bias circuit, and the other end of the third inductor is grounded through the second resistor and the second capacitor which are connected in parallel.
Further, the first stage bias circuit specifically includes: the fourth capacitor, the first resistor, the fourth inductor and the third capacitor;
one end of the fourth capacitor is connected with the drain electrode of the first transistor, the other end of the fourth capacitor is connected with the second-stage amplifier circuit, one end of the first resistor is connected with the drain electrode of the first transistor, the other end of the first resistor is connected with one end of the fourth inductor, the other end of the fourth inductor is connected with one end of the third capacitor, and the other end of the third capacitor is grounded.
Further, the second-stage amplifier circuit specifically includes: the third resistor is connected with the third capacitor;
the other end of the fourth capacitor is connected with one end of the fifth capacitor and the first stage of the grid electrode of the second transistor, the other end of the fifth capacitor is connected with one end of the fifth inductor, the other end of the fifth inductor is connected with one end of the fourth resistor, the drain electrode of the second transistor is connected with one end of the sixth inductor, the other end of the sixth inductor is connected with the second stage of the biasing circuit, and the source electrode of the second transistor is grounded through the third resistor and the sixth capacitor which are connected in parallel.
Further, the second stage bias circuit includes: a seventh inductor, a seventh capacitor and an eighth capacitor;
the other end of the fourth resistor is connected with one end of the seventh inductor and one end of the seventh capacitor respectively, the other end of the seventh inductor is connected with one end of the eighth capacitor and the other end of the fourth inductor respectively, the other end of the eighth capacitor is grounded, and the other end of the seventh capacitor is connected with the output.
Drawings
Fig. 1 is a circuit diagram provided in an embodiment of a C-band low noise amplifier of the present invention;
fig. 2 is a noise simulation diagram provided by an embodiment of the C-band low noise amplifier of the present invention;
fig. 3 is a simulation diagram of the S parameter provided by the embodiment of the C-band low noise amplifier of the present invention;
fig. 4 is a stability simulation diagram provided by an embodiment of the C-band lna of the present invention.
In the drawings, the components represented by the respective reference numerals are listed below:
l1, a first inductor, L2, a second inductor, L3, a third inductor, L4, a fourth inductor, L5, a fifth inductor, L6, a sixth inductor, L7, a seventh inductor, C1, a first capacitor, C2, a second capacitor, C3, a third capacitor, C4, a fourth capacitor, C5, a fifth capacitor, C6, a sixth capacitor, C7, a seventh capacitor, C8, an eighth capacitor, R1, a first resistor, R2, a second resistor, R3, a third resistor, R4, a fourth resistor, Q1, a first transistor, Q2, and a second transistor.
Detailed Description
The principles and features of the present invention are described below, with the examples being given only for the purpose of illustration and not for the purpose of limiting the scope of the invention.
As shown in fig. 1, a C-band low noise amplifier includes: the circuit comprises an input circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, a first-stage bias circuit and a second-stage bias circuit;
the input circuit comprises a first inductor L1, a first capacitor C1 and a second inductor L2, wherein the input end of the input circuit is respectively connected with the first inductor L1, the second inductor L2 and one end of the first capacitor C1, the other end of the first inductor L1 is grounded, the other end of the first capacitor C1 is grounded, the other end of the second inductor L2 is connected with the first-stage amplifier circuit, and the first-stage amplifier circuit, the first-stage bias circuit, the second-stage amplifier circuit and the second-stage bias circuit are sequentially connected.
In some possible embodiments, the input circuit designed by the present invention can effectively extend the matching bandwidth; the first-stage amplifier circuit can realize self-bias power supply and noise matching and improve the stability of the amplifier; the first stage of biasing circuit can effectively adjust interstage matching; the second-stage amplifying circuit can realize self-bias power supply, so that the gain obtains good flatness and the stability of the amplifier is improved.
It should be noted that the present invention includes an input circuit, a first stage amplifier circuit, a first stage bias circuit, a second stage amplifier circuit, and a second stage bias circuit.
The output end of the input circuit is connected with the input end of the first-stage amplifier circuit, the output end of the first-stage amplifier circuit is connected with the input end of the first-stage bias circuit, the output end of the first-stage bias circuit is connected with the input end of the second-stage amplifier circuit, and the direct current ends of the first-stage bias circuit and the second-stage bias circuit are connected to the power supply end Vd together.
The input circuit is composed of a first inductor L1, a first capacitor C1 and a second inductor L2. The amplifier is characterized in that the first inductor L1 and the first capacitor C1 are connected in parallel to the ground and then connected in series with the second inductor L2 to serve as output ends, and input standing waves of the amplifier can be effectively improved.
The first-stage amplifier circuit is composed of a first transistor Q1, a third inductor L3, a second resistor R2 and a second capacitor C2, and is characterized in that a source stage of the transistor is connected with the third inductor L3 in series, and then connected with the second resistor R2 and the second capacitor C2 which are connected in parallel to the third inductor L, and the first-stage amplifier circuit has a self-bias function on the transistor while amplifying signals.
The first-stage bias circuit is composed of a fourth capacitor C4, a first resistor R1, a fourth inductor L4 and a third capacitor C3, and is characterized in that the input end of the first-stage bias circuit is connected with the fourth capacitor C4 to serve as an output port of the first-stage bias circuit, the input end of the first-stage bias circuit is connected with the first resistor R1, the fourth inductor L4 and the third capacitor C3 and then is connected with a direct-current power supply port, and the structure can adjust inter-stage matching between amplifiers and simultaneously throttle signals to flow into the direct-current power supply port.
The second-stage amplifying circuit consists of a fifth capacitor C5, a fifth inductor L5, a fourth resistor R4, a sixth inductor L6, a third resistor R3 and a sixth capacitor C6, and a drain of a second transistor Q2 is connected with the sixth inductor L6 to serve as an output end; the fifth capacitor C5, the fifth inductor L5 and the fourth resistor R4 are connected in series and then connected to the input end and the output end; the third resistor R3 and the sixth capacitor C6 are connected in parallel, and then one end of the third resistor R3 and the sixth capacitor C6 are connected to the source of the second transistor Q2, and the other end of the third resistor R3 and the sixth capacitor C6 are connected to ground. The structure can adjust the gain flatness and stability of the whole link while generating a self-bias function for the transistor.
The second-stage bias circuit is composed of a seventh inductor L7, a seventh capacitor C7 and an eighth capacitor C8, the input end of the second-stage bias circuit is connected with the seventh capacitor C7 in series and then serves as the output port of the second-stage bias circuit, the input end of the second-stage bias circuit is connected with the seventh inductor L7 and the eighth capacitor C8 and then is connected with a direct-current power supply port, and the structure can adjust output matching of the amplifier and simultaneously throttle signals to flow into the direct-current power supply port.
When the amplifier works, the bias circuit provides a proper working point for the amplifier and improves the output matching of the amplifier, a signal is transmitted to the first-stage amplifier circuit through the input circuit, the first-stage amplifier circuit amplifies the signal, and the amplified signal is transmitted to the second-stage amplifier circuit through the resistance-capacitance coupling to be amplified again and then output. The input circuit, the first-stage amplifier circuit, the first-stage bias circuit, the second-stage amplifier circuit and the second-stage bias circuit can adjust S parameters and noise coefficients of signals in the process of amplifying the signals.
The abscissa of fig. 2 represents frequency and the ordinate NF represents noise figure of the circuit, and it can be seen from fig. 2 that the noise figure of the circuit is less than 1.2 in the C-band, which has good low noise characteristics. The abscissa in fig. 3 represents frequency and the ordinate represents S-parameters of the circuit, wherein the left ordinate represents S21 and the right ordinate represents S11 and S22, it can be seen from fig. 3 that the circuit has a gain of more than 25dB, a two-port return loss of less than-15 dB, and excellent high-gain, low-loss characteristics. The abscissa of fig. 4 also represents the frequency and the ordinate represents the stability factor of the low noise amplifier, from which it can be seen that the amplifier has K > 1 and Δ < 1 in the C band, indicating that the circuit achieves unconditional stability.
Preferably, in any of the above embodiments, the first-stage amplifier circuit specifically includes: the inductor comprises a first transistor Q1, a third inductor L3, a second resistor R2 and a second capacitor C2;
one end of the first transistor Q1 is connected to the other end of the second inductor L2, the source of the first transistor Q1 is connected to one end of the third inductor L3, the drain of the first transistor Q1 is connected to the first bias circuit, and the other end of the third inductor L3 is grounded through the second resistor R2 and the second capacitor C2 which are connected in parallel.
Preferably, in any of the above embodiments, the first stage bias circuit specifically includes: a fourth capacitor C4, a first resistor R1, a fourth inductor L4, and a third capacitor C3;
one end of the fourth capacitor C4 is connected to the drain of the first transistor Q1, the other end of the fourth capacitor C4 is connected to the second-stage amplifier circuit, one end of the first resistor R1 is connected to the drain of the first transistor Q1, the other end of the first resistor R1 is connected to one end of the fourth inductor L4, the other end of the fourth inductor L4 is connected to one end of the third capacitor C3, and the other end of the third capacitor C3 is grounded.
Preferably, in any of the above embodiments, the second-stage amplifier circuit specifically includes: a fifth capacitor C5, a fifth inductor L5, a fourth resistor R4, a second transistor Q2, a sixth inductor L6, a third resistor R3, and a sixth capacitor C6;
the other end of the fourth capacitor C4 is connected to the gate of the second transistor Q2 at one end of the fifth capacitor C5, the other end of the fifth capacitor C5 is connected to one end of the fifth inductor L5, the other end of the fifth inductor L5 is connected to one end of the fourth resistor R4, the drain of the second transistor Q2 is connected to one end of the sixth inductor L6, the other end of the sixth inductor L6 is connected to the second-stage bias circuit, and the source of the second transistor Q2 is grounded through the third resistor R3 and the sixth capacitor C6 which are connected in parallel.
Preferably, in any of the above embodiments, the second stage bias circuit comprises: a seventh inductor L7, a seventh capacitor, and an eighth capacitor C8;
the other end of the fourth resistor R4 is connected to one end of the seventh inductor L7 and one end of the seventh capacitor, respectively, the other end of the seventh inductor L7 is connected to one end of the eighth capacitor C8 and the other end of the fourth inductor L4, respectively, the other end of the eighth capacitor C8 is grounded, and the other end of the seventh capacitor is connected to the output.
The reader should understand that in the description of this specification, reference to the description of the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Moreover, various embodiments or examples and features of various embodiments or examples described in this specification can be combined and combined by one skilled in the art without being mutually inconsistent.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described method embodiments are merely illustrative, and for example, the division of steps into only one logical functional division may be implemented in practice in another way, for example, multiple steps may be combined or integrated into another step, or some features may be omitted, or not implemented.
The above method, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical scope of the present invention, and these modifications or replacements should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (5)
1. A C-band low noise amplifier, comprising: the circuit comprises an input circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, a first-stage bias circuit and a second-stage bias circuit;
the input circuit comprises a first inductor, a first capacitor and a second inductor, wherein an input end is respectively connected with the first inductor, the second inductor and one end of the first capacitor, the other end of the first inductor is grounded, the other end of the second inductor is connected with the first-stage amplifier circuit, and the first-stage amplifier circuit, the first-stage bias circuit, the second-stage amplifier circuit and the second-stage bias circuit are sequentially connected.
2. The C-band low noise amplifier of claim 1, wherein the first stage amplifier circuit comprises: the first transistor, the third inductor, the second resistor and the second capacitor;
one end of the first transistor is connected with the other end of the second inductor, a source electrode of the first transistor is connected with one end of the third inductor, a drain electrode of the first transistor is connected with the first-stage bias circuit, and the other end of the third inductor is grounded through the second resistor and the second capacitor which are connected in parallel.
3. The C-band low noise amplifier of claim 2, wherein the first stage bias circuit comprises: the fourth capacitor, the first resistor, the fourth inductor and the third capacitor;
one end of the fourth capacitor is connected with the drain electrode of the first transistor, the other end of the fourth capacitor is connected with the second-stage amplifier circuit, one end of the first resistor is connected with the drain electrode of the first transistor, the other end of the first resistor is connected with one end of the fourth inductor, the other end of the fourth inductor is connected with one end of the third capacitor, and the other end of the third capacitor is grounded.
4. The C-band low noise amplifier of claim 3, wherein the second stage amplifier circuit comprises: the third resistor is connected with the third capacitor;
the other end of the fourth capacitor is connected with one end of the fifth capacitor and the grid electrode of the second transistor respectively, the other end of the fifth capacitor is connected with one end of a fifth inductor, the other end of the fifth inductor is connected with one end of a fourth resistor, the drain electrode of the second transistor is connected with one end of a sixth inductor, the other end of the sixth inductor is connected with the second-stage bias circuit, and the source electrode of the second transistor is grounded through a third resistor and the sixth capacitor which are connected in parallel.
5. The C-band low noise amplifier of claim 4, wherein said second stage bias circuit comprises: a seventh inductor, a seventh capacitor and an eighth capacitor;
the other end of the fourth resistor is connected with one end of the seventh inductor and one end of the seventh capacitor respectively, the other end of the seventh inductor is connected with one end of the eighth capacitor and the other end of the fourth inductor respectively, the other end of the eighth capacitor is grounded, and the other end of the seventh capacitor is connected with the output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221038745.3U CN217216504U (en) | 2022-04-28 | 2022-04-28 | C-band low-noise amplifier |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221038745.3U CN217216504U (en) | 2022-04-28 | 2022-04-28 | C-band low-noise amplifier |
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| CN217216504U true CN217216504U (en) | 2022-08-16 |
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| CN202221038745.3U Active CN217216504U (en) | 2022-04-28 | 2022-04-28 | C-band low-noise amplifier |
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