CN217113060U - Control circuit for real-time communication - Google Patents
Control circuit for real-time communication Download PDFInfo
- Publication number
- CN217113060U CN217113060U CN202122983872.2U CN202122983872U CN217113060U CN 217113060 U CN217113060 U CN 217113060U CN 202122983872 U CN202122983872 U CN 202122983872U CN 217113060 U CN217113060 U CN 217113060U
- Authority
- CN
- China
- Prior art keywords
- circuit
- interface
- control circuit
- pin
- communication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Communication Control (AREA)
Abstract
The utility model relates to a hardware communication control technical field specifically is a control circuit of real-time communication, include: the main control circuit is used for outputting a CLK signal and inputting a DATA signal and supplying power to the lower circuit; a communication circuit, the communication circuit comprising: the Hall signal detection circuit comprises a first interface circuit, a second interface circuit, a shift register and a control circuit, wherein the first interface circuit is used for being connected with a CLK signal, a DATD signal and a power supply of the main control circuit, the second interface circuit is used for being connected with an external Hall signal, the shift register is electrically connected with the first interface circuit and the second interface circuit respectively, the shift register is communicated with the main control circuit through the first interface circuit, and the shift register detects the Hall signal through the second interface circuit.
Description
Technical Field
The utility model relates to a hardware communication control technical field specifically is a control circuit of real-time communication.
Background
In the prior art, tool products almost comprise a main board (big board) and a communication board (big board), and the two boards are connected through a connecting wire; in order to solve the problem of communication line abnormity (pressure break or line short circuit and the like), the large and small boards conventionally adopt two singlechips for communication, including serial port or PWM communication; however, because of the adoption of the single chip microcomputer, the price of the single chip microcomputer is high generally, software needs to be written, and great defects also exist in the aspect of signal instantaneity.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a control circuit of real-time communication to overcome and adopted the singlechip, the price of singlechip is high usually, but also need write software, also has very big not enough problem in the aspect of the real-time of signal.
In order to achieve the above object, the present invention is widely applicable to hardware communication control technical solution, and particularly provides the following technical solution: a control circuit for real-time communication includes;
the main control circuit is used for outputting a CLK signal and inputting a DATA signal and supplying power to the lower circuit;
a communication circuit, the communication circuit comprising:
a first interface circuit for connecting the CLK signal, the DATD signal, and the power supply of the main control circuit,
a second interface circuit for connecting an external Hall signal,
the shift register is electrically connected with the first interface circuit and the second interface circuit respectively, the shift register is communicated with the main control circuit through the first interface circuit, and the shift register detects Hall signals through the second interface circuit;
and the coding circuit is used for expanding the communication circuit or judging whether the communication between the shift register and the main control circuit is normal or not.
Preferably, the main control circuit comprises an MCU chip, a resistor R1, a triode Q1, and a first CON1 interface; the LD port of the MCU chip is electrically connected with the base of a triode Q1 through a resistor R1, the collector of the triode Q1 is externally connected with a 5V power supply, the emitter of the triode Q1 is connected with one end of a first CON1 interface, and the other port of the first CON1 interface is respectively and electrically connected with the CLK signal end and the DATD signal end of the MCU chip.
Preferably, the first interface circuit comprises a second CON1 interface, a diode D1, and an RC filter circuit; the second interface circuits are respectively connected with corresponding ports of the first CON1 interface in a one-to-one correspondence manner, one end of the diode D1 is connected with a corresponding end of the second CON1 interface, the other end of the diode D1 is connected with an RC filter circuit, and one end of the RC filter circuit is connected with a corresponding end of the second CON1 interface.
Preferably, the RC filter circuit comprises a circuit composed of a capacitor C1, a capacitor C2 and a resistor R5.
Preferably, the shift register is a 74HC165 chip.
Preferably, the second interface circuit is electrically connected to pin E, pin F, pin G, and pin H of the 74HC165 chip, respectively.
Preferably, the encoding circuit is electrically connected to the SET pin, the a pin, the B pin, the D pin, and the C pin of the 74HC165 chip, respectively.
Compared with the prior art, the beneficial effects of the utility model are that:
when the LD end of the MCU chip is at low level, the power is supplied to the 74HC165 chip through the triode Q4, the first CON1 interface and the second CON1 interface;
when the MCU chip needs to carry out signal acquisition, when the LD end of the MCU chip is at a high level, namely 2us, the 74HC165 chip acquires Hall signals through the second interface circuit and inputs the acquired Hall signals to the MCU chip
When the SET pin, the A pin, the B pin, the D pin and the C pin of the 74HC165 chip can be used for coding, and a coding circuit is required to code signals, the coding circuit cannot be all 0 or all 1, because only one data line is arranged between the 74HC165 chip and the MCU chip, if the signal of the line is high or low, the communication is normal, and the main control circuit can detect whether the communication is abnormal or not by utilizing the characteristic;
when the master control circuit requires to be connected with a plurality of communication circuits, the coding circuit can be an address code, and the lower computer is unique, so that the master control circuit can be connected with at least more than ten communication circuits; of course, the coded signal can also be defined as a product number and the like; therefore, the utility model discloses a shift register replaces the singlechip, then the cost of circuit is low, and the circuit need not software to compile and burn the procedure, gathers required signal simultaneously, and the cycle communication cycle can set up in 100 + 300Us, reaches the beneficial effect that the real-time nature strengthens greatly.
Drawings
Fig. 1 is a schematic diagram of a main control circuit of the present invention;
fig. 2 is a schematic diagram of the communication circuit, shift register, and encoding circuit of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1 and fig. 2, the present invention provides an embodiment:
a control circuit for real-time communication includes;
the main control circuit 1 is used for outputting a CLK signal and inputting a DATA signal, and providing power for a lower-level circuit;
a communication circuit, the communication circuit comprising:
a first interface circuit 2, the first interface circuit 2 is used for connecting the CLK signal, the DATD signal and the power supply of the main control circuit 1,
a second interface circuit 3, wherein the second interface circuit 3 is used for connecting an external Hall signal,
the shift register is electrically connected with the first interface circuit 2 and the second interface circuit 3 respectively, the shift register is communicated with the main control circuit 1 through the first interface circuit 2, and the shift register detects Hall signals through the first interface circuit 2;
and the coding circuit 4 is used for expanding the communication circuit or judging whether the communication between the shift register and the main control circuit 1 is normal or not.
Further, the main control circuit 1 includes an MCU chip, a resistor R1, a triode Q1, and a first CON1 interface; the LD port of the MCU chip is electrically connected with the base of a triode Q1 through a resistor R1, the collector of the triode Q1 is externally connected with a 5V power supply, the emitter of the triode Q1 is connected with one end of a first CON1 interface, and the other port of the first CON1 interface is respectively and electrically connected with the CLK signal end and the DATD signal end of the MCU chip.
Further, the first interface circuit 2 includes a second CON1 interface, a diode D1, and an RC filter circuit; the second interface circuits 3 are respectively connected with corresponding ports of the first CON1 interface in a one-to-one correspondence manner, one end of the diode D1 is connected with a corresponding end of the second CON1 interface, the other end of the diode D1 is connected with an RC filter circuit, and one end of the RC filter circuit is connected with a corresponding end of the second CON1 interface.
Further, the RC filter circuit comprises a circuit consisting of a capacitor C1, a capacitor C2 and a resistor R5.
Further, the shift register is set to be a 74HC165 chip.
Further, the second interface circuit 3 is electrically connected to pin E, pin F, pin G, and pin H of the 74HC165 chip, respectively.
Furthermore, the encoding circuit 4 is electrically connected to the SET pin, the a pin, the B pin, the D pin, and the C pin of the 74HC165 chip, respectively.
The working principle of the utility model is as follows:
when the LD end of the MCU chip is at low level, the 74HC165 chip is powered through the triode Q4, the first CON1 interface and the second CON1 interface;
when the MCU chip needs to carry out signal acquisition, when the LD end of the MCU chip is at a high level, namely 2us, the 74HC165 chip acquires Hall signals through the second interface circuit and inputs the acquired Hall signals to the MCU chip
When the SET pin, the A pin, the B pin, the D pin and the C pin of the 74HC165 chip can be used for coding, and a coding circuit is required to code signals, the coding circuit cannot be all 0 or all 1, because only one data line is provided for the 74HC165 chip and the MCU chip, if the signal of the line is high or low, the communication is normal, and the main control circuit 1 can detect whether the communication is abnormal or not by utilizing the characteristic;
when the main control circuit 1 requires to connect a plurality of communication circuits, the coding circuit can be an address code, and the lower computer is unique, so that the main control circuit 1 can be connected with at least more than ten communication circuits; of course, the code signal may be defined as a product number or the like.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (7)
1. A control circuit of real-time communication is characterized in that: the method comprises the following steps:
the main control circuit is used for outputting a CLK signal and inputting a DATA signal and supplying power to the lower circuit;
a communication circuit, the communication circuit comprising:
a first interface circuit for connecting the CLK signal, the DATD signal, and the power supply of the main control circuit,
a second interface circuit for connecting an external Hall signal,
the shift register is electrically connected with the first interface circuit and the second interface circuit respectively, the shift register is communicated with the main control circuit through the first interface circuit, and the shift register detects Hall signals through the second interface circuit;
and the coding circuit is used for expanding the communication circuit or judging whether the communication between the shift register and the main control circuit is normal or not.
2. The control circuit of claim 1, wherein: the main control circuit comprises an MCU chip, a resistor R1, a triode Q1 and a first CON1 interface; the LD port of the MCU chip is electrically connected with the base of a triode Q1 through a resistor R1, the collector of the triode Q1 is externally connected with a 5V power supply, the emitter of the triode Q1 is connected with one end of a first CON1 interface, and the other port of the first CON1 interface is respectively and electrically connected with the CLK signal end and the DATD signal end of the MCU chip.
3. The control circuit of claim 1, wherein: the first interface circuit comprises a second CON1 interface, a diode D1 and an RC filter circuit; the second interface circuits are respectively connected with corresponding ports of the first CON1 interface in a one-to-one correspondence manner, one end of the diode D1 is connected with a corresponding end of the second CON1 interface, the other end of the diode D1 is connected with an RC filter circuit, and one end of the RC filter circuit is connected with a corresponding end of the second CON1 interface.
4. The control circuit of claim 3, wherein: the RC filter circuit comprises a circuit consisting of a capacitor C1, a capacitor C2 and a resistor R5.
5. The control circuit of claim 1, wherein: the shift register is set to a 74HC165 chip.
6. The control circuit of claim 1, wherein: the second interface circuit is electrically connected with a pin E, a pin F, a pin G and a pin H of the 74HC165 chip respectively.
7. The control circuit of claim 1, wherein: the coding circuit is electrically connected with a SET pin, a pin A, a pin B, a pin D and a pin C of the 74HC165 chip respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122983872.2U CN217113060U (en) | 2021-11-30 | 2021-11-30 | Control circuit for real-time communication |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122983872.2U CN217113060U (en) | 2021-11-30 | 2021-11-30 | Control circuit for real-time communication |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217113060U true CN217113060U (en) | 2022-08-02 |
Family
ID=82589331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122983872.2U Active CN217113060U (en) | 2021-11-30 | 2021-11-30 | Control circuit for real-time communication |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217113060U (en) |
-
2021
- 2021-11-30 CN CN202122983872.2U patent/CN217113060U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104239169A (en) | Signal testing card and method | |
| CN104238396A (en) | Automatic accessory recognizing system and implementation method | |
| CN217113060U (en) | Control circuit for real-time communication | |
| CN202102275U (en) | IO port expansion circuit | |
| CN201122739Y (en) | USB concentrator with current detecting function | |
| CN202093115U (en) | Detection device for detecting connection status of chip and circuit substrate | |
| CN204287813U (en) | Multifunctional interface circuit and development board | |
| CN201837695U (en) | Mobile terminal data line detection circuit and detection device | |
| CN206162513U (en) | Device for connecting be used for communication of principal and subordinate's module | |
| CN113032321B (en) | Address extension circuit, communication interface chip and communication system | |
| CN111526358B (en) | D-PHY mapping adapter | |
| CN207657438U (en) | Protecting equipment for printing head for self-help terminal equipment | |
| CN204442339U (en) | A kind of transducer connecting circuit | |
| CN203338347U (en) | Interface circuit for computer main board failure detection device | |
| CN2256578Y (en) | Universal recorder | |
| CN206363212U (en) | A kind of dual system intelligent meeting machine device | |
| CN206557359U (en) | A kind of alarm device of analog power chip | |
| CN104965468A (en) | Universal interface module for CPCI multi-functional acquisition control device | |
| CN110568341A (en) | System for automatically testing welding state of IO (input/output) interface function of PCBA (printed circuit board assembly) mainboard | |
| CN217116095U (en) | IntL indicating signal circuit in QSFP +/QSFP28 mainboard | |
| CN217157284U (en) | Intelligent core board | |
| CN217847119U (en) | Intelligent core board and equipment | |
| CN216310796U (en) | Storage device volume production detection device | |
| CN202583799U (en) | Hot-plug master programmable logic controller (PLC) | |
| CN216210984U (en) | Chip debugger and chip debugging system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |