CN217034046U - Semiconductor chip processing testing device - Google Patents

Semiconductor chip processing testing device Download PDF

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Publication number
CN217034046U
CN217034046U CN202220491121.0U CN202220491121U CN217034046U CN 217034046 U CN217034046 U CN 217034046U CN 202220491121 U CN202220491121 U CN 202220491121U CN 217034046 U CN217034046 U CN 217034046U
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China
Prior art keywords
fixedly connected
semiconductor chip
plate
detector
chip processing
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CN202220491121.0U
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Chinese (zh)
Inventor
郭飞
陈宗廷
朱放中
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Shenzhen Jiuzhang Semiconductor Co ltd
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Shenzhen Jiuzhang Semiconductor Co ltd
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Abstract

The utility model discloses a semiconductor chip processing and testing device, which comprises: the semiconductor chip detection device comprises a mounting plate and a detector fixedly connected to the mounting plate, wherein the upper end of the detector is fixedly connected with a placing plate, the upper surface of the placing plate is provided with a plurality of grooves, the detector is used for detecting a semiconductor chip, and a clamping part comprises a pressing plate, an extrusion block and a telescopic cavity, the upper end of the telescopic cavity is fixedly connected to the mounting plate, and the pressing plate is fixedly connected to the lower end of the telescopic cavity.

Description

Semiconductor chip processing testing device
Technical Field
The utility model relates to the technical field of semiconductor detection, in particular to a semiconductor chip processing and testing device.
Background
The existing semiconductor chip is processed and tested, and the detection accuracy is reduced because the semiconductor chip is in poor contact with the detection probe and the detection equipment does not have a stable fixed structure.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the following defects in the prior art, and provides a semiconductor chip processing and testing device, which aims to solve the problem that in the processing and testing of the conventional semiconductor chip, the detection accuracy is reduced due to poor contact between the semiconductor chip and a detection probe and no stable fixed structure on detection equipment.
In order to achieve the purpose, the utility model adopts the following technical scheme:
a semiconductor chip process test apparatus, comprising:
the semiconductor chip detection device comprises a mounting plate and a detector fixedly connected with the mounting plate, wherein a placing plate is fixedly connected with the upper end of the detector, a plurality of grooves are formed in the upper surface of the placing plate, and the detector is used for detecting a semiconductor chip;
the clamping component comprises a pressing plate, extrusion blocks and a telescopic cavity, the upper end of the telescopic cavity is fixedly connected to the mounting plate, the pressing plate is fixedly connected to the lower end of the telescopic cavity, the extrusion blocks are arrayed on the pressing plate in an equidistant mode, and the clamping component is used for fixing the semiconductor chip in the groove;
the limiting component comprises a transverse plate, a push rod, a sliding block and an inclined block, wherein the transverse plate is fixedly connected between the two extrusion blocks, the push rod vertically penetrates through the pressing plate, the top end of the push rod is fixedly connected to the transverse plate, the inclined block is fixedly connected to the bottom end of the push rod, two sliding grooves are formed in the placing plate, the sliding block is arranged between the grooves and the sliding grooves, and the limiting component is used for limiting semiconductor migration.
Preferably, the clamping part still includes branch, second spring, and is a plurality of branch is the equidistance array respectively and is in on the clamp plate, two spacing rings of fixedly connected with on the branch, be equipped with two on the second spring between the spacing ring.
Preferably, the limiting component further comprises first springs, and the two first springs are respectively and fixedly connected between the two limiting rings.
Preferably, the inclined block is arranged in an isosceles trapezoid shape, and the inclined block is in sliding connection with the sliding block.
Preferably, the limiting ring is fixedly connected to the extrusion block at the lower side.
Preferably, a probe for detection is fixedly connected to the upper end of the detector.
Compared with the prior art, the utility model has the beneficial effects that:
1. make flexible chamber extension and promote the clamp plate downstream, extrude the slider when the sloping block moves down to the spout along with the clamp plate in respectively and keep away from each other to can extrude the chip through the slider, and fix the chip in the recess.
2. The continuation of clamp plate moves down, and the extrusion piece upwards promotes the extrusion piece and compresses the second spring under the spacing of chip to do benefit to the extrusion piece and have the squeezing action with the chip in the recess, can tightly attached the core and detect on the probe, because the extrusion piece does benefit to the elasticity extrusion chip of second spring, thereby can avoid the too big damage that leads to probe or chip of extrusion force.
Drawings
Fig. 1 is a schematic front view of a semiconductor chip processing and testing apparatus according to the present invention;
fig. 2 is a partially enlarged view of a in fig. 1.
In the figure: the device comprises a mounting plate 1, a placing plate 2, a detector 3, a pressing plate 4, a telescopic cavity 5, a transverse plate 6, a supporting rod 7, a first spring 8, a second spring 9, a limiting ring 10, a push rod 11, a sliding block 12, an inclined block 13, a probe 14 and an extrusion block 15.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
The terms "upper", "lower", "left", "right", "middle" and "one" used in the present invention are for clarity of description, and are not used to limit the scope of the present invention, and the relative relationship between the terms and the modifications may be regarded as the scope of the present invention without substantial technical change.
Referring to fig. 1-2, a semiconductor chip process test apparatus includes:
fixed connection's detector 3 on mounting panel 1 and the mounting panel 1, and detector 3 upper end fixedly connected with places board 2, places 2 upper surfaces of board and has seted up a plurality of recesses, and detector 3 is used for the detection to semiconductor chip, and detector 3 upper end fixedly connected with is used for the probe 14 that detects, and when the chip was placed in the recess, the lower extreme was connected with probe 14 to can reach the detection of detector 3 to the chip.
The clamping component comprises a pressing plate 4, an extrusion block 15 and a telescopic cavity 5, the upper end of the telescopic cavity 5 is fixedly connected to the mounting plate 1, the pressing plate 4 is fixedly connected to the lower end of the telescopic cavity 5, a plurality of extrusion blocks 15 are arranged on the pressing plate 4 in an equidistant mode, the clamping component also comprises a support rod 7 and a second spring 9, the support rods 7 are respectively arranged on the pressing plate 4 in an equidistant mode, two limiting rings 10 are fixedly connected to the support rods 7, the limiting ring 10 positioned at the lower side is fixedly connected to the extrusion block 15, the second spring 9 is fixedly connected between the two limiting rings 10, the limiting ring 10 positioned at the lower side is connected to the support rod 7 in a sliding mode, the limiting ring 10 positioned at the upper side is fixed on the support rod 7, therefore, the extrusion block 15 pushes the extrusion block 15 upwards under the limiting of a chip and compresses the second spring 9, and the extrusion block 15 can extrude the chip in the groove, the clamping member is used for fixing the semiconductor chip in the groove.
The limiting component comprises transverse plates 6, push rods 11, sliding blocks 12 and inclined blocks 13, wherein the two transverse plates 6 are respectively and fixedly connected between two extrusion blocks 15, the two push rods 11 respectively vertically penetrate through the pressing plate 4, the top ends of the push rods 11 are fixedly connected to the transverse plates 6, the two inclined blocks 13 are respectively and fixedly connected to the bottom ends of the push rods 11, two sliding grooves are formed in the placing plate 2, the sliding blocks 12 are respectively arranged between the grooves and the sliding grooves, the limiting component further comprises first springs 8, the two first springs 8 are respectively and fixedly connected between the two limiting rings 10, the inclined blocks 13 are arranged in an isosceles trapezoid shape, the inclined blocks 13 are in sliding connection with the sliding blocks 12, the telescopic cavity 5 extends to push the pressing plate 4 to move downwards, when the inclined blocks 13 move downwards along with the pressing plate 4 to the inside of the sliding grooves, the sliding blocks 12 are respectively extruded to realize the mutual principle, so that the chips can be extruded through the sliding blocks 12 and fixed in the grooves, the limiting component is used for limiting semiconductor offset.
In the utility model, when in use, a plurality of semiconductor chips are respectively placed in the grooves on the placing plate 2, and then the telescopic cavity 5 is connected with an external power supply, so that the telescopic cavity 5 extends and pushes the pressing plate 4 to move downwards, and when the inclined block 13 moves downwards along with the pressing plate 4 into the sliding groove, the sliding blocks 12 are respectively squeezed to be away from each other, thus the chips can be squeezed by the sliding blocks 12 and fixed in the grooves.
Along with the continuation of clamp plate 4 moves down, extrusion piece 15 upwards promotes extrusion piece 15 and compression second spring 9 under the spacing of chip to do benefit to extrusion piece 15 and have the squeezing action with the chip in the recess, can tightly attached the core and detect 14 upper ends of probe, because extrusion piece 15 does benefit to the elasticity extrusion chip of second spring 9, thereby can avoid the extrusion force too big, thereby damage probe 14 or chip.
In the present invention, the terms "mounted," "connected," "secured," and the like are to be construed broadly unless otherwise explicitly specified or limited.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and equivalent alternatives or modifications according to the technical solution of the present invention and the inventive concept thereof should be covered by the scope of the present invention.

Claims (6)

1. A semiconductor chip processing test apparatus, comprising:
the semiconductor chip detection device comprises a mounting plate (1) and a detector (3) fixedly connected to the mounting plate (1), wherein a placing plate (2) is fixedly connected to the upper end of the detector (3), a plurality of grooves are formed in the upper surface of the placing plate (2), and the detector (3) is used for detecting a semiconductor chip;
the clamping component comprises a pressing plate (4), extrusion blocks (15) and a telescopic cavity (5), the upper end of the telescopic cavity (5) is fixedly connected to the mounting plate (1), the pressing plate (4) is fixedly connected to the lower end of the telescopic cavity (5), the extrusion blocks (15) are arrayed on the pressing plate (4) in an equidistant mode, and the clamping component is used for fixing the semiconductor chips in the grooves;
the limiting component comprises a transverse plate (6), a push rod (11), a sliding block (12) and an inclined block (13), the transverse plate (6) is fixedly connected between the extrusion blocks (15) and the push rod (11) vertically penetrates through the pressing plate (4) respectively, the top end of the push rod (11) is fixedly connected onto the transverse plate (6), the inclined block (13) is fixedly connected to the bottom end of the push rod (11), two sliding grooves are formed in the placing plate (2), the sliding block (12) is arranged between the grooves and the sliding grooves respectively, and the limiting component is used for limiting semiconductor deviation.
2. The semiconductor chip processing and testing device according to claim 1, wherein the clamping member further comprises a plurality of support rods (7) and a second spring (9), the support rods (7) are respectively arranged on the pressing plate (4) in an equidistant array, two limiting rings (10) are fixedly connected to the support rods (7), and two limiting rings (10) are arranged on the second spring (9).
3. The semiconductor chip processing and testing device as claimed in claim 2, wherein said spacing member further comprises a first spring (8), and two first springs (8) are respectively fixedly connected between two spacing rings (10).
4. The semiconductor chip processing and testing device as claimed in claim 1, wherein the inclined block (13) is in the shape of an isosceles trapezoid, and the inclined block (13) is slidably connected to the sliding block (12).
5. The semiconductor chip processing test device according to claim 2, wherein the lower limiting ring (10) is fixedly connected to the pressing block (15).
6. The semiconductor chip processing and testing device as claimed in claim 1, wherein a probe (14) for detection is fixedly connected to the upper end of the detector (3).
CN202220491121.0U 2022-03-09 2022-03-09 Semiconductor chip processing testing device Active CN217034046U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220491121.0U CN217034046U (en) 2022-03-09 2022-03-09 Semiconductor chip processing testing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220491121.0U CN217034046U (en) 2022-03-09 2022-03-09 Semiconductor chip processing testing device

Publications (1)

Publication Number Publication Date
CN217034046U true CN217034046U (en) 2022-07-22

Family

ID=82454493

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202220491121.0U Active CN217034046U (en) 2022-03-09 2022-03-09 Semiconductor chip processing testing device

Country Status (1)

Country Link
CN (1) CN217034046U (en)

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