CN216980551U - Packaging substrate and packaging structure - Google Patents

Packaging substrate and packaging structure Download PDF

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Publication number
CN216980551U
CN216980551U CN202122530092.2U CN202122530092U CN216980551U CN 216980551 U CN216980551 U CN 216980551U CN 202122530092 U CN202122530092 U CN 202122530092U CN 216980551 U CN216980551 U CN 216980551U
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China
Prior art keywords
pin
sub
binding region
area
packaging
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CN202122530092.2U
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Chinese (zh)
Inventor
黄冬冬
王玲
陈凝
周舜铭
单耕野
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Ziguang Tongxin Microelectronics Co Ltd
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Ziguang Tongxin Microelectronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Lead Frames For Integrated Circuits (AREA)

Abstract

The present invention provides a packaging substrate comprising: the metal substrate comprises a plurality of metal frames, and a cutting area is arranged between every two adjacent metal frames; the metal frame includes: a binding region; a pin located outside the bonding region; wherein the pin comprises: the first sub-pin faces one side of the binding region; the second sub-pin is positioned on one side, away from the binding region, of the first sub-pin; the thickness of the first pin is greater than that of the second pin. By applying the technical scheme of the invention, the generation of burrs is reduced, and the product yield and the product quality are improved.

Description

Packaging substrate and packaging structure
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a packaging substrate and a packaging structure.
Background
With the continuous progress of science and technology, more and more electronic devices are widely applied to daily life and work of people, bring huge convenience to the daily life and work of people, and become an indispensable important tool for people at present. The main component of the electronic device for realizing various functions is a chip, and the chip needs to be packaged and protected in order to ensure the reliability and the service life of the chip and avoid damage of external factors.
The market demands for chip performance are higher and higher, but in the chip packaging process, burrs are generated by cutting a chip packaging substrate, and the quality of a chip product is further influenced. Therefore, how to reduce the generation of burrs during the cutting process of the chip package substrate and improve the yield and the product quality of the chip product becomes one of the problems to be solved by those skilled in the art.
Disclosure of Invention
In view of this, the present invention provides a package substrate, a package structure and a method for manufacturing the same, so as to reduce the generation of burrs and improve the yield and quality of products.
In order to achieve the purpose, the invention provides the following technical scheme:
a packaging substrate, comprising:
the metal substrate comprises a plurality of metal frames, and a cutting area is arranged between every two adjacent metal frames; the metal frame includes: a binding region; a pin located outside the bonding region;
wherein the pin comprises: the first sub-pin faces one side of the binding region; the second sub-pin is positioned on one side, away from the binding region, of the first sub-pin;
the thickness of the first sub-pin is larger than that of the second sub-pin.
Preferably, the area of a side surface of the first sub-pin, which faces away from the same side surface of the bonding region, is greater than 0.05 square millimeter.
Preferably, the packaging substrate further comprises: and the reinforcing ribs are positioned in the cutting area and used for reinforcing the structural strength of the cutting area.
The present invention also provides a package structure, which includes:
a metal frame, the metal frame comprising: a binding region; the pin is positioned outside the binding region and is in open circuit with the binding region; the chip is fixed in the binding region and is connected with the pins;
wherein the pin comprises: the first sub-pin faces one side of the binding region; the second sub-pin is positioned on one side, away from the binding region, of the first sub-pin; the thickness of the first sub-pin is larger than that of the second sub-pin.
Preferably, the package structure further includes: and the plastic packaging layer surrounds the metal frame, and part of the pins are exposed out of the plastic packaging layer.
Preferably, the area of a side surface of the first sub-pin, which faces away from the same side surface of the bonding region, is greater than 0.05 square millimeter.
The invention also provides a packaging method, which comprises the following steps:
providing a package substrate, wherein the package substrate comprises: the metal substrate comprises a plurality of metal frames, and a cutting area is arranged between every two adjacent metal frames; the metal frame includes: a binding region; a pin located outside the bonding region; the pin includes: the first sub-pin faces one side of the binding region; the second sub-pin is positioned on one side, away from the binding region, of the first sub-pin; the thickness of the first sub-pin is larger than that of the second sub-pin;
fixing a chip in the binding region, wherein the chip is connected with the pins;
forming a plastic packaging layer, wherein the plastic packaging layer at least covers the surface of one side, facing the binding area, of the metal frame;
and cutting the cutting area.
Preferably, the method of forming the second sub-lead includes: and half-etching the pins to form the second sub-pins.
Preferably, the area of a side surface of the first sub-pin, which faces away from the same side surface of the bonding region, is greater than 0.05 square millimeter.
Preferably, the packaging method further comprises: before the cutting area is cut, reinforcing ribs are arranged in the cutting area, and the reinforcing ribs strengthen the structural strength of the cutting area.
As can be seen from the above description, in the technical scheme provided by the invention, by setting the thickness of the first sub-pin to be greater than the thickness of the second sub-pin, the pin is retracted toward the first sub-pin, so that the encapsulation of the plastic encapsulation layer on the periphery of the pin is increased, burrs generated during cutting are reduced, and the product yield and the product quality are improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
It should be noted that the structures, proportions, sizes, and other dimensions shown in the drawings and described in the specification are only for the purpose of understanding and reading the present disclosure, and are not intended to limit the scope of the present disclosure, which is defined by the claims and their equivalents, and therefore do not have the essential meaning in the art, and any structural modifications, changes in proportions, or adjustments in size, without affecting the efficacy and attainment of the same, are intended to fall within the scope of the present disclosure.
FIG. 1 is a schematic diagram of a package structure according to the prior art;
fig. 2 is a schematic structural diagram of a package substrate according to an embodiment of the invention;
fig. 3 is a schematic structural diagram of a package structure according to an embodiment of the invention;
fig. 4 is a schematic cross-sectional view of a package structure according to an embodiment of the invention;
fig. 5-9 are cross-sectional flow diagrams illustrating a packaging method according to an embodiment of the invention.
Detailed Description
Embodiments of the present application will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the application are shown, and in which it is to be understood that the embodiments described are merely illustrative of some, but not all, of the embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, the present application is described in further detail with reference to the accompanying drawings and the detailed description.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a package structure according to the prior art. At present, in the process of forming the package structure shown in fig. 1, cutting the adjacent package structures causes burrs with larger shapes and more quantities, which affects the quality of the product. Simultaneously, at the product management and control in-process, to packaging structure's salt fog experiment, because of the existence of burr leads to the side to corrode the aggravation, influence the experimental throughput rate of salt fog, and then influence the yield of product.
The invention provides a packaging substrate, a packaging structure and a manufacturing method thereof based on the problems, which can reduce burrs generated by cutting and improve the yield and quality of products.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a package substrate 1 according to an embodiment of the invention. The embodiment of the invention provides a packaging substrate 1, wherein the packaging substrate 1 comprises: the metal substrate comprises a plurality of metal frames 2, and cutting areas 4 are arranged between the adjacent metal frames 2. The metal frame 2 includes: a binding region 3; a pin 5 located outside the bonding region 3.
Wherein the pin 5 includes: the first sub-pin 51 faces one side of the bonding region 3, and the second sub-pin 52 is located on one side of the first sub-pin 51, which faces away from the bonding region 3, and the thickness of the first sub-pin 51 is greater than that of the second sub-pin 52.
As shown in fig. 4, the metal frame 2 has a first surface 21 and a second surface 22 opposite to each other, i.e. the bonding region 3 is located on the first surface 21. The dotted line in fig. 4 is a boundary between the first sub-pin 51 and the second sub-pin 52, the pin 5 is divided into the first sub-pin 51 and the second sub-pin 52, the first sub-pin 51 is close to the bonding region 3, the second sub-pin 52 is away from the bonding region 3, the thickness of the first sub-pin 51 is greater than that of the second sub-pin 52, that is, the pin 5 is retracted toward the first sub-pin 51, and meanwhile, the metal frame 2 needs to be encapsulated and protected by the molding layer 8, so that when the cutting region 4 is cut, the encapsulation layer 8 wrapping around the pin 5 is increased, the cutting-generated burrs are reduced, the side erosion caused by the cutting burrs in the salt spray test is reduced, the level of the salt spray test of the product is improved, and the yield of the product is further improved. Meanwhile, the burr is reduced, so that the quality of the product is improved.
It should be noted that the lead 5 in fig. 4 has a retraction area, and the retraction direction is toward the first surface 21. Obviously, the lead 5 may have a plurality of retraction regions, and the retraction direction is toward the first surface 21 or the second surface 22, both of which are the thickness of the first sub-lead 51 is greater than that of the second sub-lead 52.
In the package substrate 1, an area of a side surface of the first sub-lead 51 facing away from the same side surface of the bonding region 3 is greater than 0.05 square millimeter, that is, an area of a side surface of the first sub-lead 51 facing away from the first surface 21 is greater than 0.05 square millimeter. Meanwhile, the exposed area of the pins 5 after plastic packaging is larger than 0.05 square millimeter. Generally, the length of the side surface of the first sub-lead 51 facing away from the first surface 21 is 0.25-45mm, and the width is 0.2-0.45 mm.
The area larger than 0.05 mm square is used to secure the connection of the pin 5 with other components. In the actual optimization design process, under the condition that the pin design is not changed, the retraction of the pin 5 towards the first sub-pin 51 inevitably leads to a reduction in the exposed surface area of the pin 5, which means that the bonding area of the connection wire of the pin 5 is reduced, and the connection of the pin 5 with other components is affected. Therefore, in the actual process, the length and width of the side surface of the first sub-lead 51 away from the first surface 21 need to be increased, so as to ensure that the exposed area of the lead 5 is greater than 0.05 square millimeter, and ensure the connection between the lead 5 and other components.
In the above package substrate 1, the package substrate 1 further includes: and reinforcing ribs 6 positioned in the cutting area 4, wherein the reinforcing ribs 6 are used for reinforcing the structural strength of the cutting area 4. Meanwhile, the reinforcing ribs 6 improve the flatness of the package substrate 1.
Referring to fig. 5, the second sub-lead 52 is half-etched to obtain the inner shrinking region, and in an actual process, the cutting region 4 is also half-etched based on an operation requirement, so that the flatness and the structural stability of the package substrate 1 are affected. According to the invention, the reinforcing ribs 6 are added in the cutting area 4, so that the flatness of the packaging substrate 1 is improved, the structural strength of the cutting area 4 is enhanced, and the structural stability of the packaging substrate 1 is further enhanced.
Based on the above embodiments, another embodiment of the present invention further provides a package structure, referring to fig. 3 to fig. 4, fig. 3 is a schematic structural diagram of the package structure provided in the embodiments of the present application, and fig. 4 is a schematic cross-sectional diagram of the package structure provided in the embodiments of the present application. The package structure includes:
a metal frame 2, the metal frame 2 comprising: a binding region 3; a pin 5 located outside the bonding region 3, the pin 5 being disconnected from the bonding region 3; and the chip 7 is fixed on the binding region 3, and the chip 7 is connected with the pin 5.
Wherein the pin 5 includes: a first sub-pin 51 facing one side of the bonding region 3; the second sub-pin 52 is positioned on one side of the first sub-pin 51, which is far away from the binding region 3; the thickness of the first sub-lead 51 is greater than that of the second sub-lead 52.
As shown in fig. 4, the metal frame 2 has the first surface 21 and the second surface 22 opposite to each other, and the bonding region 3 is located on the first surface 21. The dotted line in fig. 4 is a boundary between the first sub-pin 51 and the second sub-pin 52, the pin 5 is divided into the first sub-pin 51 and the second sub-pin 52, the first sub-pin 51 is close to the bonding region 3, the second sub-pin 52 is away from the bonding region 3, the thickness of the first sub-pin 51 is greater than that of the second sub-pin 52, that is, the pin 5 is retracted toward the first sub-pin 51, and meanwhile, the metal frame 2 needs to be encapsulated and protected by the molding layer 8, so that when the cutting region 4 is cut, the encapsulation layer 8 wrapping around the pin 5 is increased, the cutting-generated burrs are reduced, the side erosion caused by the cutting burrs in the salt spray test is reduced, the level of the salt spray test of the product is improved, and the yield of the product is further improved. Meanwhile, the passing rate of the salt spray resistance test is improved, so that special management and control in the management and control process are reduced, and the cost of a single product is reduced. The reduction of the number of burrs also improves the product quality.
In the above package structure, the package structure further includes: the recessed structures 9 are located on the second surface 22, the recessed structures 9 are used for filling the plastic package layer 8, the contact area of the pins 5 and the plastic package layer 8 and the contact area of the metal frame 2 and the plastic package layer 8 are increased, the connection of the metal frame 2 and the pins 5 is ensured, and the pins 5 are prevented from falling off.
In addition, in the actual process, the second surface 22 has a film, which is also used to ensure the connection between the metal frame 2 and the leads 5, and prevent the leads 5 from falling off.
In the above package structure, the package structure further includes: and a plastic encapsulation layer 8 surrounding the metal frame 2 and the chip 7, wherein the plastic encapsulation layer 8 exposes a part of the pins 5. As shown in fig. 4, the molding compound layer 8 exposes a side surface of the first sub-lead 51 facing the second surface 22 and a side surface of the second sub-lead 52 facing away from the bonding region 3. The exposed part of the pin 5 is used for connecting with other devices. In addition, the molding layer 8 may be an insulating resin or the like to protect the package structure.
When the pin 5 is connected with other devices, it is necessary to ensure that the exposed part of the pin 5 satisfies a certain area. Therefore, the area of the surface of the first sub-lead 51 on the side facing away from the same side surface of the bonding region 3 is greater than 0.05 square millimeter, that is, the area of the surface of the first sub-lead 51 on the side facing away from the first surface 21 is greater than 0.05 square millimeter. Meanwhile, the exposed area of the pins 5 after plastic packaging is larger than 0.05 square millimeter. Generally, the length of the side surface of the first sub-lead 51 facing away from the first surface 21 is 0.25-45mm, and the width is 0.2-0.45 mm.
In the actual optimization design process, under the condition that the design of the pins is not changed, the inward shrinkage of the pins 5 towards the first sub-pins 51 inevitably results in the reduction of the exposed surface area of the pins 5, which means that the bonding area of the connecting wires of the pins 5 is reduced, and the connection of the pins 5 and other components is affected. Therefore, in the actual process, the length and width of the side surface of the first sub-lead 51 away from the first surface 21 need to be increased, so as to ensure that the exposed area of the lead 5 is greater than 0.05 square millimeter, and ensure the connection between the lead 5 and other components.
It should be noted that the packaging structure effectively improves the effect of salt spray corrosion resistance of the surface of the product, and meets the standard of QFN/DFN industrial level salt spray test 240H-10 level.
Based on the foregoing embodiments, another embodiment of the present invention further provides a packaging method for packaging the package structure described in the foregoing embodiments, and the packaging method refers to fig. 5-9, and fig. 5-9 are cross-sectional flow charts of a packaging method provided in an embodiment of the present invention, where the packaging method includes:
step S1: referring to fig. 5 and 2, a package substrate 1 is provided, where the package substrate 1 includes: the metal substrate comprises a plurality of metal frames 2, and cutting areas 4 are arranged between the adjacent metal frames 2; the metal frame 2 includes: a binding region 3; a pin 5 located outside the bonding region 3; the pin 5 includes: a first sub-pin 51 facing one side of the bonding region 3; a second sub-pin 52 located on a side of the first sub-pin 51 facing away from the bonding region 3; the thickness of the first sub-lead 51 is greater than the thickness of the second sub-lead 52. The second sub-lead 52 is located between the first sub-lead 21 and the cutting region 4, and is connected to the cutting region 4.
Wherein the package substrate 1 further has: a recessed structure 9 located on said second surface 22. The recessed structure 9 can prevent the lead 5 from falling off due to cutting the cutting region 4. Meanwhile, the second surface 22 is further provided with a film, and the film can also prevent the pins 5 from falling off due to cutting of the cutting area 4.
Step S2: referring to fig. 6 and 7, a chip 7 is fixed to the bonding region 3, and the chip 7 is connected to the leads 5. Wherein, the binding region 3 can fix one or more chips 7.
In general, the package substrate 1 is generally a large-sized copper sheet, and the chip 7 cannot be directly fixed on the large-sized copper sheet. Therefore, the bonding area 3 has a silver plating layer on a surface thereof facing away from the second surface 22, and the chip 7 is fixed on the package substrate 1 through the silver plating layer.
The chip 7 is connected with the pin 5 to realize communication with an external circuit, and the chip 7 is connected with the pin 5 in a metal routing mode.
Step S3: as shown in fig. 8, a molding layer 8 is formed, and the molding layer 8 covers at least a surface of the metal frame 2 facing the bonding area 3. And performing glue injection plastic package on the basis of the first surface 21 or the second surface 22, wherein the plastic package layer 8 covers the first surface 21 and fills the concave structure 9.
The plastic package layer 8 fills the concave structure 9, so that the contact area between the pin 5 and the plastic package layer 8 and the contact area between the metal frame 2 and the plastic package layer 8 are increased, the connection between the metal frame 2 and the pin 5 is ensured, and the pin 5 is prevented from falling off.
In addition, in the actual process, the second surface 22 has a film, which is also used to ensure the connection between the metal frame 2 and the leads 5, and prevent the leads 5 from falling off.
It should be noted that the method for forming the molding layer 8 includes single-side filling, and further includes: after forming the first molding compound layer on the basis of the second surface 22, a second molding compound layer is formed on the basis of the first surface 21.
In addition, with reference to fig. 8 and 2, gaps exist among the plurality of pins 5, and plastic package glue can enter the inward shrinking areas of the pins 5 facing the first sub-pins 51 based on the gaps, so that the plastic package layer 8 can be formed through one-time plastic package.
Step S4: the cutting area 4 is cut, and the package structure after cutting is as shown in fig. 9, wherein the lead 5 is connected and fixed with the metal frame 2 through the molding layer 8, and the lead 5 is disconnected from the metal frame 2.
In addition, the cutting area 4 is generally cut by means of laser cutting or blade cutting.
In the above packaging method, the method of forming the second sub-lead 52 includes: and half-etching the pin 5 to form the second sub-pin 52. Wherein the half etching is based on the second surface 22, and the etching direction is towards the first surface 21.
In addition, the lead 5 in fig. 4 has a recessed area, and the recessed direction is toward the first surface 21. Obviously, the lead 5 may have a plurality of retraction regions, and the retraction direction is toward the first surface 21 or the second surface 22, both of which are the thickness of the first sub-lead 51 is greater than that of the second sub-lead 52.
The pins 5 are provided with a plurality of retraction areas, so that the wrapping of the plastic package layer on the pins 5 is further increased, the area of a tangent plane is further reduced, and burrs generated by cutting are reduced.
In the above packaging method, an area of a side surface of the first sub-lead 51 facing away from the same side surface of the bonding region 3 is greater than 0.05 square millimeter, that is, an area of a side surface of the first sub-lead 51 facing away from the first surface 21 is greater than 0.05 square millimeter. Meanwhile, the exposed area of the pins 5 after plastic packaging is larger than 0.05 square millimeter. Generally, the length of the side surface of the first sub-lead 51 facing away from the first surface 21 is 0.25-45mm, and the width is 0.2-0.45 mm.
In the actual optimization design process, under the condition that the pin design is not changed, the inward shrinkage of the pin 5 towards the first sub-pin 51 inevitably results in a reduction in the exposed surface area of the pin 5, which means that the bonding area of the connection wire of the pin 5 is reduced, and the connection of the pin 5 with other components is affected. Therefore, in the actual process, the length and width of the side surface of the first sub-lead 51 away from the first surface 21 need to be increased, so as to ensure that the exposed area of the lead 5 is greater than 0.05 square millimeter, and ensure the connection between the lead 5 and other components.
In addition, the packaging method further includes: before the cutting area 4 is cut, reinforcing ribs 6 are arranged on the cutting area 4, and the reinforcing ribs 6 strengthen the structural strength of the cutting area 4. Meanwhile, the reinforcing ribs 6 improve the flatness of the package substrate 1.
Referring to fig. 5, the second sub-lead 52 is half-etched to obtain the inner shrinking region, and in an actual process, the cutting region 4 is also half-etched based on an operation requirement, so that the flatness and the structural stability of the package substrate 1 are affected. According to the invention, the reinforcing ribs 6 are added in the cutting area 4, so that the flatness of the packaging substrate 1 is improved, the structural strength of the cutting area 4 is enhanced, and the structural stability of the packaging substrate 1 is further enhanced.
It should be noted that the cutting region 4 may not need to be half-etched, and the retracted region may be formed by half-etching the second surface 22 without providing the reinforcing rib 6. According to the packaging substrate, the packaging structure and the manufacturing method thereof provided by the embodiment of the invention, by setting the thickness of the first sub-pin to be larger than that of the second sub-pin, the pins are retracted towards the first sub-pin, the plastic packaging layer wrapping around the pins is increased, and burrs generated by cutting are reduced, so that the side erosion caused by cutting the burrs in a salt spray test is reduced, the grade of the salt spray resistance test of a product is improved, and the yield and the quality of the product are improved. Meanwhile, the passing rate of the salt spray resistance test is improved, so that special management and control in the management and control process are reduced, and the cost of a single product is reduced.
The embodiments in the present specification are described in a manner of combining progression and parallelization, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
It should be noted that in the description of the present application, it is to be understood that the terms "upper", "lower", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only used for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be configured and operated in a specific orientation, and thus, should not be construed as limiting the present application. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (6)

1. A packaging substrate, comprising:
the metal substrate comprises a plurality of metal frames, and a cutting area is arranged between every two adjacent metal frames; the metal frame includes: a binding region; a pin located outside the bonding region;
wherein the pin comprises: the first sub-pin faces one side of the binding region; the second sub-pin is positioned on one side, away from the binding region, of the first sub-pin;
the thickness of the first sub-pin is larger than that of the second sub-pin.
2. The package substrate of claim 1, wherein a side surface of the first sub-lead facing away from a same side surface of the bonding region has an area greater than 0.05 square millimeters.
3. The packaging substrate of claim 1, further comprising: and the reinforcing ribs are positioned in the cutting area and used for reinforcing the structural strength of the cutting area.
4. A package structure, comprising:
a metal frame, the metal frame comprising: a binding region; the pin is positioned outside the binding region and is in open circuit with the binding region; the chip is fixed in the binding region and is connected with the pins;
wherein the pin comprises: the first sub-pin faces one side of the binding region; the second sub-pin is positioned on one side, away from the binding region, of the first sub-pin; the thickness of the first sub-pin is larger than that of the second sub-pin.
5. The package structure of claim 4, further comprising: and the plastic packaging layer surrounds the metal frame, and part of the pins are exposed out of the plastic packaging layer.
6. The package structure of claim 4, wherein an area of a side surface of the first sub-lead facing away from a same side surface of the bonding region is greater than 0.05 square millimeters.
CN202122530092.2U 2021-10-20 2021-10-20 Packaging substrate and packaging structure Active CN216980551U (en)

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