CN216979193U - Rectifier state detection circuit under intermediate frequency power supply static state - Google Patents
Rectifier state detection circuit under intermediate frequency power supply static state Download PDFInfo
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- CN216979193U CN216979193U CN202122704744.XU CN202122704744U CN216979193U CN 216979193 U CN216979193 U CN 216979193U CN 202122704744 U CN202122704744 U CN 202122704744U CN 216979193 U CN216979193 U CN 216979193U
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Abstract
The utility model provides a rectifier state detection circuit under an intermediate frequency power supply static state, wherein a T + end of a chip U1 is connected with a START end; one input end of the AND gate U2 is connected with the T-terminal of the chip U1 and the T-terminal of the chip U1 respectively
End connection; the other input end of the AND gate U2 is respectively connected with one end of a resistor R2; the other end of the resistor R2 is connected with the START end; the output end of the AND gate U2 is connected with the CHECK end and the third input end of the AND gate U5 respectively; the DC test end is respectively connected with the negative input end of the comparator U3 and the positive input end of the comparator U4; the output end of the comparator U3 is connected with a first input end of an AND gate U5; comparisonThe output end of the device U4 is connected with the second input end of the AND gate U5; the output of the and gate U5 is connected to the DC-OK terminal. The method has the advantages that the quality of the silicon controlled rectifier is detected before starting by a simple circuit; the circuit is simple, the reliability is high, the detection is flexible, and the safety of the rectifier main loop is ensured.
Description
Technical Field
The present invention relates to a detection circuit, and more particularly, to a rectifier status detection circuit under a quiescent state of an if power supply.
Background
As the industry has developed, the power requirements for the intermediate frequency power supply have also increased. The power of the intermediate frequency power supply ranges from thousands of kilowatts to tens of thousands of kilowatts. As power increases, the ac inlet line voltage also increases, from 380VAC to 1650VAC, and even higher. If the rectification silicon controlled rectifier has problems, serious consequences can be caused after the intermediate frequency power supply is started to work.
The better improvement of the safety is a major subject faced by the intermediate frequency power supply. The improvement of safety and reliability for high power if power supplies faces many problems, one of which is to detect the rectifier state before starting and to confirm that all thyristors are good.
The existing intermediate frequency power supply basically has no device for detecting the quality of the silicon controlled rectifier before starting; the equipment with the detection device has poor detection flexibility due to the use of a heavy reactor and a high-voltage capacitor.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the problem of providing a rectifier state detection circuit under the static state of an intermediate frequency power supply, which realizes the detection of the quality of the silicon controlled rectifier before starting by a simple circuit; the circuit is simple, the reliability is high, the detection is flexible, and the safety of the rectifier main loop is ensured; the defects in the prior art are overcome.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, including: the circuit comprises a chip U1, an AND gate U2, a comparator U3, a comparator U4, an AND gate U5, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a resistor R6; the T + end of the chip U1 is connected with the START end; and gate U2
One input end of the T-shaped switch is respectively connected with the T-end of the chip U1 and the Q-end of the chip U1; the other input end of the AND gate U2 is respectively connected with one end of a resistor R2; the other end of the resistor R2 is connected with the START end; the output end of the AND gate U2 is connected with the CHECK end and the third input end of the AND gate U5 respectively; one end of the resistor R3 is connected with the + V end, and the other end of the resistor R3 is connected with the positive input end of the comparator U3; one end of the resistor R4 is grounded GND, and the other end is connected with the positive input end of the comparator U3; the DC test end is respectively connected with the negative input end of the comparator U3 and the positive input end of the comparator U4; one end of the resistor R5 is connected with the + V end, and the other end of the resistor R5 is connected with the negative input end of the comparator U4; one end of the resistor R6 is grounded GND, and the other end of the resistor R6 is connected with the negative input end of the comparator U4; the output end of the comparator U3 is connected with a first input end of an AND gate U5; the output end of the comparator U4 is connected with the second input end of the AND gate U5; the output of the and gate U5 is connected to the DC-OK terminal.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which has the following characteristics: the capacitor C1 and the resistor R1 are also included; the G terminal of the chip U1 is grounded GND; one end of the capacitor C1 is connected with the G end of the chip U1, and the other end of the capacitor C1 is connected with the RC end of the chip U1; one end of the resistor R1 is connected with the RC end of the chip U1, and the other end is connected with the + V end.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: also included is diode D1; the other input end of the AND gate U2 is also connected with the anode of a diode D1; the cathode of diode D1 is connected to the START terminal.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: also included is a resistor R7; one end of the resistor R7 is connected with the + V end, and the other end is connected with the output end of the comparator U3.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: also included is a resistor R8; one end of the resistor R8 is connected with the + V end, and the other end is connected with the output end of the comparator U4.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: the model of the chip U1 is CD4538, and the model of the AND gate U2 is CD 4081; the comparator U3 and the comparator U4 are LM293, and the AND gate U5 is CD 4073.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: and the DC test end receives the voltage between the two silicon controlled rectifiers to be tested.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: when the START terminal is high and CHECK is high, the DC test terminal receives the signal.
The utility model provides a rectifier state detection circuit under the intermediate frequency power supply static state, which can also have the following characteristics: and when the DC-OK end is at a high level, the two silicon controlled rectifiers to be tested can work normally.
Drawings
Fig. 1 is a rectifier main loop circuit diagram.
Fig. 2 is a circuit diagram of a rectifier state detection circuit in a static state of an intermediate frequency power supply in an embodiment.
The specific implementation mode is as follows:
the utility model is further described below with reference to the following figures and specific examples.
As shown in fig. 1, in the conventional rectifier main loop, S1 to S6 are thyristors, and constitute a three-phase rectifier. RL1 to RL6 are high-voltage relays.
As shown in fig. 2, the rectifier state detection circuit in the intermediate frequency power supply static state includes: the circuit comprises a chip U1, an AND gate U2, a comparator U3, a comparator U4, an AND gate U5, a capacitor C1, a resistor R1, a resistor R2, a diode D1, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and a resistor R8.
The T + terminal of chip U1 is connected to the START terminal. The G terminal of the chip U1 is grounded GND. One end of the capacitor C1 is connected with the G terminal of the chip U1, and the other end is connected with the RC terminal of the chip U1. One end of the resistor R1 is connected with the RC end of the chip U1, and the other end is connected with the + V end.
ˉ
And one input end of the AND gate U2 is respectively connected with the T-end of the chip U1 and the Q-end of the chip U1. The other input end of the and gate U2 is connected to one end of the resistor R2 and the anode of the diode D1, respectively. The other end of the resistor R2 is connected to the START terminal. The cathode of diode D1 is connected to the START terminal. The output end of the AND gate U2 is connected with the CHECK end and the third input end of the AND gate U5 respectively.
One end of the resistor R3 is connected to the + V end, and the other end is connected to the positive input end "+" of the comparator U3. One end of the resistor R4 is connected to the ground GND, and the other end is connected to the positive input "+" of the comparator U3.
The DC test terminals are connected to the negative input terminal "-" of the comparator U3 and the positive input terminal "+" of the comparator U4, respectively.
One end of the resistor R5 is connected with the + V end, and the other end is connected with the negative input end of the comparator U4. One end of the resistor R6 is connected to the ground GND, and the other end is connected to the negative input "+" of the comparator U4.
The output of comparator U3 is connected to a first input of and gate U5. The output of comparator U4 is connected to a second input of and gate U5. The output of the and gate U5 is connected to the DC-OK terminal.
One end of the resistor R7 is connected with the + V end, and the other end is connected with the output end of the comparator U3. One end of the resistor R8 is connected with the + V end, and the other end is connected with the output end of the comparator U4.
In this embodiment, the chip U1 has a model of CD4538, and the and gate U2 has a model of CD 4081. The comparator U3 and the comparator U4 are LM293, and the AND gate U5 is CD 4073.
The working principle of the rectifier state detection circuit under the medium-frequency power supply static state is as follows:
as shown in fig. 2, the START terminal is a START detection signal, and detection STARTs when the START terminal is at a high level. When the START terminal is high, of the chip U1
The terminal outputs a low level pulse with a width of about R1 × C1. The effect of resistor R2 is to add delay to the signal on the line, i.e. when START is high, the input to and gate U2 is not immediately high. Diode D1 functions: when START is low, the input to and gate U2 is immediately low, removing the effect of the signal delay caused by resistor R2 on the input to and gate U2. The CHECK terminal goes high for about R1 × C1 when START is high, and goes low immediately when START is low. CHECK is a signal for confirming the signal of the rectifier status detection circuit in the intermediate frequency power supply static state after about R1 × C1 time starts to be detected.
As shown in FIG. 1, the silicon controlled rectifier S1 and the silicon controlled rectifier S4 in the main loop of the rectifier are tested for good or bad. And the DC test end of the rectifier state detection circuit in the intermediate frequency power supply static state is connected with the DC1 end of the rectifier main loop.
When the detection is started, namely the START end is in a high level, the high-voltage relay RL1-RL6 is closed, and the signal at the DC1 end is the voltage between the thyristor S1 and the thyristor S4 of the main loop of the rectifier of the figure 1 and is connected with the DC input end of the figure 2. The positive input "+" of the comparator U3 is the voltage V/(R3+ R4) × R4, and when the voltage of DC1 is less than V/(R3+ R4) × R4, the + V terminal pulls up the U3 output to high level through R7. The negative input "-" of the comparator U4 is inputted with a voltage V/(R5+ R6) × R6, and when the voltage at the DC1 terminal is greater than V/(R5+ R6) × R6, + V pulls up the output of the comparator U4 to a high level through the resistor R8. When V/(R5+ R6) × R6< DC1 voltage < V/(R3+ R4) × R4, and CHECK is high, the inputs to U5 are all high, and DC-OK is high.
And measuring a signal of a DC-OK end after about R1C 1 time from the START of the START detection, namely CHECK is immediately high, and if the DC-OK end is high, a signal of a DC1 end is normal, namely a thyristor of a main loop, a thyristor S1 and a thyristor S4 are good.
Similarly, the DC test terminal of the rectifier state detection circuit in the intermediate frequency power supply static state of fig. 2 is connected with the signals of the DC2 terminal and the DC3 terminal of the rectifier main loop, and if the signals of the DC1, the DC2 and the DC3 are all normal, the thyristors S1 to S6 of the rectifier are all good.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and equivalent alternatives or modifications according to the technical solution of the present invention and the inventive concept thereof should be covered by the scope of the present invention.
Claims (9)
1. A rectifier state detection circuit under intermediate frequency power supply static state which characterized in that: the circuit comprises a chip U1, an AND gate U2, a comparator U3, a comparator U4, an AND gate U5, a resistor R2, a resistor R3, a resistor R4, a resistor R5 and a resistor R6;
the T + end of the chip U1 is connected with the START end;
and gate U2One input terminal is connected with the T-terminal of the chip U1 and the T-terminal of the chip U1 respectively
End connection; the other input end of the AND gate U2 is respectively connected with one end of a resistor R2; the other end of the resistor R2 is connected with the START end; the output end of the AND gate U2 is connected with the CHECK end and the third input end of the AND gate U5 respectively;
one end of the resistor R3 is connected with the + V end, and the other end of the resistor R3 is connected with the positive input end of the comparator U3; one end of the resistor R4 is grounded GND, and the other end is connected with the positive input end of the comparator U3;
the DC test end is respectively connected with the negative input end of the comparator U3 and the positive input end of the comparator U4;
one end of the resistor R5 is connected with the + V end, and the other end of the resistor R5 is connected with the negative input end of the comparator U4; one end of the resistor R6 is grounded GND, and the other end of the resistor R6 is connected with the negative input end of the comparator U4;
the output end of the comparator U3 is connected with a first input end of an AND gate U5; the output end of the comparator U4 is connected with the second input end of the AND gate U5; the output terminal of the and gate U5 is connected to the DC-OK terminal.
2. The rectifier condition sensing circuit of claim 1, wherein: the circuit also comprises a capacitor C1 and a resistor R1;
the G terminal of the chip U1 is grounded GND; one end of the capacitor C1 is connected with the G end of the chip U1, and the other end of the capacitor C1 is connected with the RC end of the chip U1; one end of the resistor R1 is connected with the RC end of the chip U1, and the other end is connected with the + V end.
3. The rectifier condition detection circuit of claim 1, wherein: further includes a diode D1;
the other input end of the AND gate U2 is also connected with the anode of a diode D1; the cathode of diode D1 is connected to the START terminal.
4. The rectifier condition detection circuit of claim 1, wherein: also included is a resistor R7;
one end of the resistor R7 is connected with the + V end, and the other end is connected with the output end of the comparator U3.
5. The rectifier condition sensing circuit of claim 1, wherein: also included is a resistor R8;
one end of the resistor R8 is connected with the + V end, and the other end is connected with the output end of the comparator U4.
6. The rectifier condition detection circuit of claim 1, wherein: the model of the chip U1 is CD4538, and the model of the AND gate U2 is CD 4081; the comparator U3 and the comparator U4 are LM293, and the AND gate U5 is CD 4073.
7. The rectifier condition detection circuit of claim 1, wherein: and the DC test end receives the voltage between the two silicon controlled rectifiers to be tested.
8. The rectifier condition sensing circuit of claim 7, wherein: when the START terminal is high and CHECK is high, the DC test terminal receives the signal.
9. The rectifier condition sensing circuit of claim 8, wherein: when the DC-OK end is at high level, the two silicon controlled rectifiers to be tested can work normally.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122704744.XU CN216979193U (en) | 2021-11-05 | 2021-11-05 | Rectifier state detection circuit under intermediate frequency power supply static state |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122704744.XU CN216979193U (en) | 2021-11-05 | 2021-11-05 | Rectifier state detection circuit under intermediate frequency power supply static state |
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| Publication Number | Publication Date |
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| CN216979193U true CN216979193U (en) | 2022-07-15 |
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| CN202122704744.XU Active CN216979193U (en) | 2021-11-05 | 2021-11-05 | Rectifier state detection circuit under intermediate frequency power supply static state |
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2021
- 2021-11-05 CN CN202122704744.XU patent/CN216979193U/en active Active
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