CN216956856U - Special mainboard for machine vision system - Google Patents
Special mainboard for machine vision system Download PDFInfo
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- CN216956856U CN216956856U CN202220233676.5U CN202220233676U CN216956856U CN 216956856 U CN216956856 U CN 216956856U CN 202220233676 U CN202220233676 U CN 202220233676U CN 216956856 U CN216956856 U CN 216956856U
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Abstract
The utility model discloses a special mainboard for a machine vision system, which comprises a mainboard body, wherein a processor plug-in, a control assembly and a connecting port are arranged on the mainboard body; the connection port comprises a display interface, a first network interface, a POE interface, a low-speed signal interface and a high-speed signal interface, and the control component comprises a chip set and a first network card chip; the display interface is connected with the processor plug-in, the processor plug-in is respectively connected with the chipset and the high-speed signal interface, the chipset is connected with the POE interface, and the first network card chip is respectively connected with the chipset and the first network interface; the main board body is also provided with an expansion card pin, the low-speed signal interface is connected with the expansion card pin, and the low-speed signal interface is connected with the expansion card pin. The utility model improves the function of the special main board interface of the machine vision system so as to meet the application of the special main board interface in the field of machine vision.
Description
Technical Field
The utility model relates to the technical field of machine vision, in particular to a mainboard special for a machine vision system.
Background
The machine vision system features that the machine is used to replace human eye for measurement and judgment to raise the production flexibility and automation. The machine vision system is particularly suitable for dangerous working environments of manual operation or occasions where the requirements of manual vision are difficult to meet, and the machine vision has the advantage over the manual vision. Meanwhile, in the process of mass repetitive industrial production, the machine vision detection method can greatly improve the production efficiency and the automation degree. The product can be measured, guided, detected and identified on the fastest production line, and the production task can be finished with guaranteed quality and quantity.
The machine vision field needs to provide direct current power supply for some IP-based terminals (such as IP phones, wireless local area network Access Points (APs), network cameras, etc.) while transmitting data signals, and needs to have various expansion interfaces, needs to perform high-speed signal expansion and low-speed signal expansion while performing flexible PCI-E interface, and solves the problem of compatibility in mechanical structure caused by expansion.
However, network interfaces on the existing motherboard are mainly LAN interfaces, which can only transmit signals and cannot meet the requirements of the machine vision on IP-based terminals.
SUMMERY OF THE UTILITY MODEL
The utility model mainly aims to provide a mainboard special for a machine vision system, aiming at improving the function of a mainboard interface special for the machine vision system so as to meet the application of the mainboard interface in the field of machine vision.
In order to achieve the purpose, the utility model provides a mainboard special for a machine vision system, which comprises a mainboard body, wherein a processor plug-in, a control assembly and a connection port are arranged on the mainboard body;
the connection port comprises a display interface, a first network interface, a POE interface, a low-speed signal interface and a high-speed signal interface, and the control component comprises a chip set and a first network card chip;
the processor plug-in is respectively connected with the chipset, the high-speed signal interface and the display interface, the chipset is connected with the POE interface, and the first network card chip is respectively connected with the chipset and the first network interface;
the main board body is further provided with an expansion card inserting needle, and the expansion card inserting needle is connected with the low-speed signal interface and the chip set respectively.
Optionally, the control component further includes a second network card chip, the connection port further includes a second network interface, and the second network card chip is connected to the chipset and the second network interface respectively.
Optionally, the control component further includes a sound card chip, the connection port further includes an audio output interface and a microphone interface, and the sound card chip is connected to the chipset, the audio output interface and the microphone interface, respectively.
Optionally, the display interface includes a VGA interface and an HDMI interface.
Optionally, the connection port further includes a PCI-E gold finger, and the PCI-E gold finger is connected to the chipset.
Optionally, the connection port further includes a Mini PCI-E interface and an SIM interface, the chipset is connected to the Mini PCI-E interface, and the Mini PCI-E interface is connected to the SIM interface.
Optionally, the control component further includes a TPM chip, and the TPM chip is connected to the chipset.
Optionally, the connection port further includes a SATA interface, and the SATA interface is connected to the chipset.
Optionally, the control component further includes an input/output chip, and the input/output chip is connected to the chipset and the low-speed signal interface, respectively.
Optionally, a COM interface, a fan pin and a GPIO pin are disposed on the input/output chip.
The main board body is provided with a processor plug-in, a control assembly and a connecting port, wherein the connecting port comprises a display interface, a first network interface, a POE interface, a low-speed signal interface and a high-speed signal interface; processor plug-in components configuration treater, the expansion card needle of inserting is used for expanding low-speed signal interface, high-speed signal interface is used for handling high-speed signal, low-speed signal interface is used for handling low-speed signal, first network interface is used for connecting network equipment, the POE interface is the POE function of first network interface equipment configuration, satisfy the data transmission of some terminals based on IP, the display port is used for handling video signal, show in display device, the signal of treater and chipset will be handled exports to the external display equipment who is connected with the display port at last. Compared with the mainboard special for the machine vision system in the background technology, the function of the mainboard interface special for the machine vision system is improved so as to meet the application of the mainboard interface special for the machine vision system in the field of machine vision.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a motherboard dedicated to a machine vision system according to an embodiment of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name(s) |
| 10 | Processor plug-in | 101 | |
| 102 | High |
11 | Chip group |
| 111 | |
112 | |
| 113 | PCI-E |
114 | Mini PIC- |
| 115 | SIM interface | 12 | First |
| 121 | |
13 | |
| 131 | Low |
14 | Second |
| 141 | |
15 | Input/ |
| 16 | TPM chip | 17 | Sound card chip |
| 171 | |
172 | Microphone interface |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides a mainboard special for a machine vision system, which is suitable for the field of machine vision.
The network interface on the existing mainboard is single, lacks the POE function, and the structure is stiff, can not satisfy the user demand in the machine vision field.
Referring to fig. 1, in an embodiment of the present invention, the motherboard dedicated to the machine vision system includes a motherboard body, and the motherboard body is provided with a processor plug-in 10, a control component, and a connection port;
the connection port comprises a display interface 101, a first network interface 121, a POE interface 111, a low-speed signal interface 131 and a high-speed signal interface 102, and the control component comprises a chipset 11 and a first network card chip 12;
the processor plug-in 10 is respectively connected to the chipset 11, the high-speed signal interface 102 and the display interface 101, the chipset 11 is connected to the POE interface 111, and the first network card chip 12 is respectively connected to the chipset 11 and the first network interface 121;
an expansion card pin 13 is further arranged on the main board body, and the expansion card pin 13 is connected with the low-speed signal interface 131 and the chip set 11 respectively.
In the embodiment, the processor card 10 is configured with a processor, and is connected with the high-speed signal interface 102 for processing high-speed signals in the field of machine vision, and the processor card 10 can be optionally configured with Intel 6, 7, 8 and 9 generations of processors. The processor plug-in 10 can be loaded with Intel SkyLake, KabyLake, WhiskeyLake and CoffeeLake processors, and can meet the high-speed data processing requirement in the field of machine vision.
The chipset 11 is used for processing low-speed signals, the chipset 11 is provided with a low-speed signal interface 131, the expansion card pin 13 is used for expanding the low-speed signal interface 131, one signal interface on the chipset 11 can be expanded into a plurality of signal interfaces, and the signal interfaces are used as the low-speed signal interface 131 of the motherboard to meet the requirements of the motherboard in actual use, and the low-speed signals include SMBUS, TTL, USB, GPIO, COM, and the like. The pin 13 of the expansion card can be freely arranged, and expansion is realized when a low-speed interface cannot be used satisfactorily.
The display interface 101 is used for connecting with an external display device, the display interface 101 is used for processing a video signal and then outputting the video signal to the display device, and the chip set 11 and the processor finally output the processed signal in the form of an image signal and display the processed signal by the external display device.
In the working principle of the embodiment, the processor provided by the processor plug-in 10 is used for processing high-speed signals, the chipset 11 is used for processing low-speed signals, and the processed result is output to an external display device through the display port and displayed in the display device. The low-speed signal interface 131 is expanded by setting the expansion card pin 13, actual use requirements are met, the POE interface 111 is set to be equipped with POE functions for the first network interface 121, high-voltage direct current is provided for a network port, and data transmission of some terminals based on IP is met.
During operation, processor plug-in 10 configuration treater, expansion card contact pin 13 is used for expanding low-speed signal interface 131, high-speed signal interface 102 is used for handling high-speed signal, low-speed signal interface 131 is used for handling low-speed signal, first network interface 121 is used for connecting network equipment, POE interface 111 is equipped with the POE function for first network interface 121, satisfy the data transmission of some terminals based on IP, the display port is used for handling video signal, show in display device, processor and chipset 11 export the signal of handling to the external display equipment who is connected with the display port at last.
The utility model sets up the body of the mother board, there are processor plug-in 10, control assembly and connection port on the body of the mother board, the connection port includes the display interface 101, the first network interface 121, POE interface 111, low-speed signal interface 131, the high-speed signal interface 102, the control assembly includes chip set 11 and first network card chip 12, the display interface 101 is connected with processor plug-in 10, the processor plug-in 10 is connected with chip set 11 and high-speed signal interface 102 separately, chip set 11 is connected with POE interface 111, the first network card chip 12 is connected with chip set 11 and first network interface 121 separately, POE interface 111 is connected with first network interface 121, still have expansion card pin 13 on the body of the mother board, the low-speed signal interface 131 is connected with expansion card pin 13; the processor plug-in unit 10 is configured with a processor, the expansion card pin 13 is used for expanding the low-speed signal interface 131, the high-speed signal interface 102 is used for processing a high-speed signal, the low-speed signal interface 131 is used for processing a low-speed signal, the first network interface 121 is used for connecting network equipment, the POE interface 111 is used for providing POE functions for the first network interface 121, data transmission of some IP-based terminals is met, the display port is used for processing a video signal and displaying the video signal in the display equipment, and the processor and the chipset 11 finally output the processed signal to external display equipment connected with the display port. Compared with the special main board for the machine vision system in the background technology, the function of the special main board interface for the machine vision system is improved, so that the application of the special main board interface in the field of machine vision is met.
Referring to fig. 1, in an embodiment, the control component further includes a second network card chip 14, the connection port further includes a second network interface 141, and the second network card chip 14 is connected to the chipset 11 and the second network interface 141 respectively.
It should be noted that, because the traffic of the internet is dynamic, if the network interface powered by the POE controller is used for connecting to the internet, the traffic of the internet and the bandwidth of the POE interface 111 may conflict with each other, which affects the stability of the signal bandwidth of the POE interface 111.
In this embodiment, the motherboard is further provided with a second network interface 141 connected to the second network card chip 14 for connecting to the internet, so as to implement communication between the large data storage network security motherboard and the internet.
Referring to fig. 1, in an embodiment, the control component further includes a sound card chip 17, the connection port further includes an audio output interface 171 and a microphone interface 172, and the sound card chip 17 is connected to the chipset 11, the audio output interface 171, and the microphone interface 172 respectively.
In this embodiment, the sound card chip 17 is used for processing an audio signal, the audio output interface 171 and the microphone interface 172 are used for connecting an audio device and outputting the audio signal, and the audio output interface 171 and the microphone interface 172 meet different playing requirements of different users on multimedia without switching between the two, and can be used simultaneously.
Referring to fig. 1, in an embodiment, the display interface 101 includes a VGA interface and an HDMI interface.
In this embodiment, the VGA is a Video Graphics Array (Video image Array), which can be implemented; HDMI is an abbreviation of High Definition Multimedia Interface (High Definition Multimedia Interface), and can transmit uncompressed High Definition video and multi-channel audio data with High quality, with a maximum data transmission speed of 10 Gbps; 1200P and 4K refer to the resolution of the display, i.e., 1920 × 1200 and 4096 × 2160 pixels, which refers to the number of pixels that can be displayed by the display, and determines the fineness of the image details; the SuperIO chip is a superinput Output (superinput-Output) chip 15, and can process a low-speed signal of a low-speed device and communicate with a high-speed device through a system bus.
Referring to fig. 1, in an embodiment, the connection port further includes a PCI-E gold finger 113, and the PCI-E gold finger 113 is connected to the chipset 11.
In this embodiment, the number of the PCI-E gold fingers 113 is 1, which can be extended to a PCI-E slot and a PCI slot, the PCI-E gold fingers 113 adopt a PCI-E16X signal channel, a PCI-E4X signal channel, a PCI-E1X signal channel and a USB 2.0 signal channel, and the PCI-E16X signal and the PCI-E slot are selected as alternatives, and the gold fingers can be installed on the mechanical structure in a vertical or direct insertion manner. When the chipset 11 selects the PCI-E16X signal channel to connect with the PCI-E gold finger 113, the chipset 11 will not select the PCIE-E slot to work, and conversely, when the PCIE-E slot is selected to work, the PCI-E gold finger 113 will not be selected. The requirement of flexible expansion of the machine vision field is realized by setting the PCI-E golden finger 113.
Referring to fig. 1, in an embodiment, the connection port further includes a Mini PIC-E interface 114 and a SIM interface 115, the chipset 11 is connected to the Mini PIC-E interface 114, and the Mini PIC-E interface is connected to the SIM interface 115.
In this embodiment, the number of the Mini PIC-E interfaces 114 is 1, the Mini PIC-E interfaces 114 use the mSATA signals or the WIFI and 4G signals, wherein the WIFI signals and the PCI-E1X signal channels in the PCI-E gold finger 113 are selected as alternatives, when the chipset 11 selects the WIFI signals to work in connection with the Mini PIC-E interface 114, the south bridge chip does not select the PCI-E1X signal channels to work in connection with the PCI-E gold finger 113, and otherwise, when the PCI-E gold finger 113 is selected to work, the Mini PIC-E interfaces 114 are not selected.
Referring to fig. 1, in an embodiment, the control component further includes a TPM chip 16, and the TPM chip 16 is connected to the chipset 11.
In the present embodiment, the TPM chip 16 is mounted and used exclusively for encrypting and decrypting data, and data encrypted by the TPM chip 16 can only be decrypted by the TPM chip 16. The purpose is to effectively protect the PC and prevent illegal user access.
Referring to fig. 1, in an embodiment, the connection port further includes a SATA interface 112, and the SATA interface 112 is connected to the chipset 11.
In this embodiment, the SATA interface 112 is configured to be connected to an external hard disk, so as to meet a requirement of a user for storing data, and the external hard disk transmits data with a motherboard through a SATA protocol.
Referring to fig. 1, in an embodiment, the control component further includes an input/output chip 15, and the input/output chip 15 is connected to the chipset 11 and the low-speed signal interface 131 respectively.
In this embodiment, the input/output chip 15 can process the low-speed signal of the low-speed device and communicate with the high-speed device through the system bus.
Referring to fig. 1, in an embodiment, the input/output chip 15 is provided with a COM interface, a fan pin, and a GPIO pin.
In the embodiment, the fan interface is connected with the heat dissipation fan, so that the heat dissipation design requirement of a user can be met; the COM interface is designed to be connected with the low-speed equipment, so that the use requirement of the low-speed equipment of a user can be met; and the user controls the input and the output of the GPIO pin voltage by controlling the corresponding register so as to meet the requirements of a control device or a programmable device.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications and equivalents of the technical solutions of the present invention, which are made by using the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. The mainboard special for the machine vision system is characterized by comprising a mainboard body, wherein a processor plug-in, a control assembly and a connection port are arranged on the mainboard body;
the connection port comprises a display interface, a first network interface, a POE interface, a low-speed signal interface and a high-speed signal interface, and the control component comprises a chip set and a first network card chip;
the processor plug-in is respectively connected with the chipset, the high-speed signal interface and the display interface, the chipset is connected with the POE interface, and the first network card chip is respectively connected with the chipset and the first network interface;
the main board body is further provided with an expansion card inserting needle, and the expansion card inserting needle is connected with the low-speed signal interface and the chip set respectively.
2. A machine-vision-system-specific motherboard as recited in claim 1 wherein said control component further comprises a second network card chip, said connection port further comprising a second network interface, said second network card chip being connected to said chipset and said second network interface, respectively.
3. A machine-vision-system-specific motherboard as recited in claim 1 wherein said control component further comprises a sound card chip, said connection port further comprising an audio output interface and a microphone interface, said sound card chip being connected to said chipset, said audio output interface and said microphone interface, respectively.
4. A machine-vision-system-specific motherboard as recited in claim 1 wherein said display interface comprises a VGA interface and an HDMI interface.
5. A machine-vision-system-specific motherboard as recited in claim 1 wherein said connection port further comprises a PCI-E gold finger, said PCI-E gold finger being connected to said chipset.
6. A machine-vision-system-specific motherboard as recited in claim 1, wherein said connection port further comprises a Mini PCI-E interface and a SIM interface, said chipset being connected to said Mini PCI-E interface, said Mini PCI-E interface being connected to said SIM interface.
7. A machine-vision-system-specific motherboard as recited in claim 1 wherein said control component further comprises a TPM chip, said TPM chip being coupled to said chipset.
8. A machine vision system dedicated motherboard as recited in claim 1 wherein said connection port further comprises a SATA interface, said SATA interface being connected with said chipset.
9. The machine-vision-system-specific motherboard of claim 1, wherein the control component further comprises an input-output chip, the input-output chip being connected to the chipset and the low-speed signal interface, respectively.
10. A motherboard dedicated to a machine vision system as recited in claim 9, wherein said input/output chip is provided with a COM interface, a fan pin and a GPIO pin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220233676.5U CN216956856U (en) | 2022-01-27 | 2022-01-27 | Special mainboard for machine vision system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220233676.5U CN216956856U (en) | 2022-01-27 | 2022-01-27 | Special mainboard for machine vision system |
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| Publication Number | Publication Date |
|---|---|
| CN216956856U true CN216956856U (en) | 2022-07-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220233676.5U Active CN216956856U (en) | 2022-01-27 | 2022-01-27 | Special mainboard for machine vision system |
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|---|---|
| CN (1) | CN216956856U (en) |
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- 2022-01-27 CN CN202220233676.5U patent/CN216956856U/en active Active
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