CN216904662U - Circuit for power supply loop anti-electromagnetic interference - Google Patents
Circuit for power supply loop anti-electromagnetic interference Download PDFInfo
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- CN216904662U CN216904662U CN202220316381.4U CN202220316381U CN216904662U CN 216904662 U CN216904662 U CN 216904662U CN 202220316381 U CN202220316381 U CN 202220316381U CN 216904662 U CN216904662 U CN 216904662U
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- 239000003990 capacitor Substances 0.000 claims abstract description 40
- 230000001629 suppression Effects 0.000 claims abstract description 7
- 230000001419 dependent effect Effects 0.000 claims description 22
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- 230000033228 biological regulation Effects 0.000 abstract description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 208000025274 Lightning injury Diseases 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000740 bleeding effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The utility model discloses a circuit for power supply loop anti-electromagnetic interference, which comprises an overload protection circuit, a voltage clamping circuit, a bleeder circuit and a common mode suppression circuit, wherein the overload protection circuit comprises a power supply loop and a common mode suppression circuit; the common mode suppression circuit comprises a common mode inductor T1, a safety regulation capacitor CY1 and a safety regulation capacitor CY2, wherein the common mode inductor T1 is connected in parallel to the positive electrode and the negative electrode of the external power supply 1; the safety capacitor CY1 and the safety capacitor CY2 are connected in series between the pin 1 and the pin 2 of the common-mode inductor T1 and the external ground PGND respectively. When the utility model is used, the power supply circuit can be protected, and the electromagnetic interference problem caused by factors such as lightning surge and the like can be reduced.
Description
Technical Field
The utility model belongs to the technical field of high-voltage switch equipment and control equipment, and particularly relates to an anti-electromagnetic interference circuit for a power supply loop.
Background
The power equipment has complex operating environment and more peripheral interference factors, and the equipment is easy to damage when suffering from lightning stroke, so that the equipment is required to have certain anti-electromagnetic interference capability.
Disclosure of Invention
The utility model aims to provide a circuit for resisting electromagnetic interference of a power supply loop, which can meet the requirement of stable operation of distribution network equipment in a complex environment.
The utility model is realized in this way, comprising an overload protection circuit, a voltage clamping circuit, a bleeder circuit and a common mode suppression circuit; the common mode suppression circuit comprises a common mode inductor T1, a safety regulation capacitor CY1 and a safety regulation capacitor CY2, wherein the common mode inductor T1 is connected in parallel to the positive electrode and the negative electrode of an external power supply; the safety capacitor CY1 and the safety capacitor CY2 are respectively connected in series between a pin 1 and a pin 2 of the common-mode inductor T1 and an external ground PGND.
Preferably, one end of the overload protection circuit is connected to the positive electrode of the external power supply, and the other end of the overload protection circuit is connected to the voltage clamping circuit.
Preferably, the voltage clamping circuit comprises a voltage dependent resistor MY1, a voltage dependent resistor MY2 and a voltage dependent resistor MY3, the voltage dependent resistor MY2 is connected in parallel between the outlet end of the overload protection circuit and the negative pole of the external power supply, and the voltage dependent resistor MY1 and the voltage dependent resistor MY3 are connected in series and then connected in parallel between the outlet end of the overload protection circuit and the negative pole of the external power supply.
Preferably, the piezoresistors MY1, MY2 and MY3 are radial lead type piezoresistors.
Preferably, the bleeder circuit comprises a discharge tube DS1, one end of the discharge tube DS1 is connected between the piezoresistor MY1 and the piezoresistor MY3, and the other end is connected with an external ground PGND.
Preferably, the device further comprises a filter circuit; the filter circuit comprises a diode D1, a diode D2 and an inductor L1, wherein one end of the diode D1 and the diode D2 are connected in parallel and then connected with the common-mode inductor T1, the other end of the diode D1 and one end of the inductor L1 are connected, and the other end of the inductor L1 is connected with the anode of an internal power supply.
Preferably, the filter circuit further includes a capacitor C2 and a capacitor C4, the capacitor C2 is connected in parallel between pin 1 and pin 4 of the common mode inductor T1, and the capacitor C4 is connected in parallel between the positive pole and the negative pole of the internal power supply.
Preferably, the capacitor C2 and the capacitor C4 are lead type aluminum electrolytic capacitors.
Preferably, the common mode inductor T1 is a plug-in common mode inductor.
Preferably, the discharge tube DS1 is an axial lead type gas discharge tube.
The utility model has the beneficial effects that: when the utility model is used, the power circuit can be protected, and the problem of electromagnetic interference caused by factors such as lightning surge and the like is reduced.
Drawings
Fig. 1 is a schematic diagram of a circuit for power supply loop anti-electromagnetic interference according to the present invention.
Fig. 2 is a flowchart of a circuit for power supply loop anti-electromagnetic interference according to the present invention.
In the figure: 1. an external power supply; 2. an overload protection circuit; 3. a voltage clamp circuit; 4. a bleeding circuit; 5. a filter circuit; 6. a common mode rejection circuit; 7. an internal power source.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1 and 2, a circuit for power supply circuit to resist electromagnetic interference includes an external power supply 1, an overload protection circuit 2, a voltage clamp circuit 3, a bleeder circuit 4, a filter circuit 5, a common mode rejection circuit 6, and an internal power supply 7, where in fig. 1, the upper part is the position of the external power supply 1, and the lower part is the position of the internal power supply 7.
The overload protection circuit 2 is preferably a lead-wire fast-melting fuse Fu1, one end of the lead-wire fast-melting fuse Fu1 is connected to the positive input end of the external power supply 1, and the other end of the lead-wire fast-melting fuse Fu1 is connected to the voltage clamping circuit 3, so that the fuse can be quickly cut off when the circuit is overloaded, the safety of the whole power supply circuit is guaranteed, and a rear-stage circuit is protected.
The voltage clamping circuit 3 comprises a voltage dependent resistor MY1, a voltage dependent resistor MY2 and a voltage dependent resistor MY3, wherein the voltage dependent resistor MY2 is connected between the outgoing line end of the overload protection circuit 2 and the negative pole of an external power supply in parallel, the voltage dependent resistor MY1 and the voltage dependent resistor MY3 are connected between the outgoing line end of the overload protection circuit 2 and the negative pole of the external power supply in series and then connected between the outgoing line end of the overload protection circuit 2 and the negative pole of the external power supply in parallel, the voltage dependent resistor MY2 connected between the outgoing line end of the overload protection circuit 2 and the negative pole of the external power supply in parallel can absorb instant high voltage caused by lightning surge, the circuit is protected, the voltage dependent resistor MY1 and the voltage dependent resistor MY3 are connected in series to improve the threshold value of continuous working voltage and control voltage, and the circuit is protected together with the voltage dependent resistor MY 2. In this embodiment, the piezoresistors MY1, MY2 and MY3 are preferably radial lead type piezoresistors.
Bleeder circuit 4 comprises a gas discharge tube DS1, gas discharge tube DS1 is preferably an axial lead type gas discharge tube, and gas discharge tube DS1 is connected at one end between piezoresistors MY1 and MY3, and at the other end is connected to external ground PGND. The voltage rises suddenly when the lightning surge occurs, the impedance of the piezoresistor becomes low, the generated surge current needs to be discharged quickly, and the instantaneous overvoltage is clamped to protect the stability of a post-stage circuit.
The filter circuit 5 comprises a capacitor C2, a capacitor C4, a diode D1, a diode D2 and an inductor L1, wherein the capacitor C2 and the capacitor C4 are preferably lead type aluminum electrolytic capacitors, the diode D1 and the diode D2 are preferably plug type common diodes, and the inductor L1 is preferably a patch type inductor. The capacitor C2 is connected in parallel between the 1 pin and the 4 pin of the common-mode inductor T1 and absorbs high-frequency signals. The capacitor C4 is connected in parallel at the positive and negative ends of the internal power supply 7 to absorb high-frequency signals. After the diode D1 and the diode D2 are connected in parallel, one end is connected to the common mode inductor T1, the other end is connected to one end of the inductor L1, and the other end of the inductor L1 is connected to the positive electrode of the internal power supply 7 to absorb the residual high frequency signal.
The common mode suppression circuit 6 comprises a common mode inductor T1, a safety capacitor CY1 and a safety capacitor CY2, wherein the common mode inductor T1 is preferably a plug-in type common mode inductor, and the safety capacitor CY1 and the safety capacitor CY2 are preferably radial lead type safety capacitors. The common mode inductor T1 is connected in parallel to the positive and negative electrodes of the external power supply 11, common mode and differential mode components of electromagnetic interference are suppressed, and the safety capacitor CY1 and the safety capacitor CY2 are respectively connected in series between the pin 1 and the pin 2 of the common mode inductor T1 and the external ground PGND, and absorb the common mode component to be discharged to the ground.
When the utility model is used, the power circuit can be protected, and the problem of electromagnetic interference caused by factors such as lightning surge and the like is reduced.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.
Claims (10)
1. A circuit for power supply loop anti-electromagnetic interference is characterized by comprising an overload protection circuit (2), a voltage clamping circuit (3), a bleeder circuit (4) and a common mode suppression circuit (6);
the common mode rejection circuit (6) comprises a common mode inductor T1, a safety capacitor CY1 and a safety capacitor CY2, and the common mode inductor T1 is connected in parallel to the positive pole and the negative pole of the external power supply (1);
the safety capacitor CY1 and the safety capacitor CY2 are respectively connected in series between a pin 1 and a pin 2 of the common-mode inductor T1 and an external ground PGND.
2. A circuit for power supply loop anti-electromagnetic interference according to claim 1, characterized in that the overload protection circuit (2) is connected to the positive pole of the external power supply (1) at one end and to the voltage clamp circuit (3) at the other end.
3. A circuit for power supply loop anti-electromagnetic interference according to claim 2, characterized in that the voltage clamp circuit (3) comprises a voltage dependent resistor MY1, a voltage dependent resistor MY2 and a voltage dependent resistor MY3, the voltage dependent resistor MY2 is connected in parallel between the outlet terminal of the overload protection circuit (2) and the negative pole of the external power supply (1), and the voltage dependent resistor MY1 and the voltage dependent resistor MY3 are connected in series and then connected in parallel between the outlet terminal of the overload protection circuit (2) and the negative pole of the external power supply (1).
4. A circuit for power supply loop anti-electromagnetic interference as claimed in claim 3, wherein said piezoresistor MY1, myresistor MY2 and myresistor MY3 are radial lead type piezoresistors.
5. A circuit for power supply loop anti-electromagnetic interference according to claim 4, characterized in that the bleeder circuit (4) comprises a discharge tube DS1, one end of the discharge tube DS1 is connected between the piezoresistor MY1 and the piezoresistor MY3, and the other end is connected with an external ground PGND.
6. A circuit for power supply loop anti-electromagnetic interference according to claim 1, characterized by further comprising a filter circuit (5); the filter circuit (5) comprises a diode D1, a diode D2 and an inductor L1, wherein one end of the diode D1 and the diode D2 are connected in parallel and then connected with the common-mode inductor T1, the other end of the diode D1 and one end of the inductor L1 are connected, and the other end of the inductor L1 is connected with the anode of the internal power supply (7).
7. A circuit for power supply loop anti-electromagnetic interference according to claim 6, characterized in that, the filter circuit (5) further comprises a capacitor C2 and a capacitor C4, the capacitor C2 is connected in parallel between pin 1 and pin 4 of the common mode inductor T1, and the capacitor C4 is connected in parallel between the positive and negative poles of the internal power supply (7).
8. The circuit of claim 7, wherein the capacitor C2 and the capacitor C4 are lead-type aluminum electrolytic capacitors.
9. The circuit of claim 1, wherein the common mode inductor T1 is a plug-in common mode inductor.
10. The circuit of claim 5, wherein the discharge tube DS1 is an axial lead type gas discharge tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220316381.4U CN216904662U (en) | 2022-02-16 | 2022-02-16 | Circuit for power supply loop anti-electromagnetic interference |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220316381.4U CN216904662U (en) | 2022-02-16 | 2022-02-16 | Circuit for power supply loop anti-electromagnetic interference |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216904662U true CN216904662U (en) | 2022-07-05 |
Family
ID=82184390
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220316381.4U Active CN216904662U (en) | 2022-02-16 | 2022-02-16 | Circuit for power supply loop anti-electromagnetic interference |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216904662U (en) |
-
2022
- 2022-02-16 CN CN202220316381.4U patent/CN216904662U/en active Active
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