CN216852325U - Circuit system and voice device for sound pickup and echo cancellation - Google Patents

Circuit system and voice device for sound pickup and echo cancellation Download PDF

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Publication number
CN216852325U
CN216852325U CN202220180451.8U CN202220180451U CN216852325U CN 216852325 U CN216852325 U CN 216852325U CN 202220180451 U CN202220180451 U CN 202220180451U CN 216852325 U CN216852325 U CN 216852325U
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analog
digital
digital converter
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schmitt trigger
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宋振伟
黄敬宁
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New Line Technology Co ltd
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New Line Technology Co ltd
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Abstract

The circuit system comprises a cascade analog-to-digital converter, a plurality of groups of microphones, a loudspeaker and a voltage division circuit, wherein the cascade analog-to-digital converter consists of at least two stages of analog-to-digital converters, and the first stage of analog-to-digital converter of the cascade analog-to-digital converter receives a differential analog voice signal and outputs a digital voice signal; any middle analog-to-digital converter of the cascade analog-to-digital converters simultaneously receives the differential analog voice signal and the digital voice signal output by the last analog-to-digital converter of any middle analog-to-digital converter and outputs the digital voice signal; a last-stage analog-to-digital converter of the cascade analog-to-digital converter simultaneously receives an echo cancellation reference signal and a digital voice signal output by a last-stage analog-to-digital converter of the last-stage analog-to-digital converter; the multiple groups of microphones are respectively and electrically connected to each level of analog-to-digital converter of the cascade analog-to-digital converter; the first end of the voltage division circuit is electrically connected to the loudspeaker, and the other end of the voltage division circuit is electrically connected to the last-stage analog-to-digital converter.

Description

Circuit system and voice device for sound pickup and echo cancellation
Technical Field
The application relates to the field of intelligent interactive panels, in particular to a circuit system and a voice device for sound pickup and echo elimination.
Background
At present, the digital microphones are used for realizing the recording function of the microphones of the television and the interactive flat panel, because the analog microphones have poor long-distance and multi-channel transmission effects and have certain application limitations.
The microphone of the tv is usually located far away from the audio processing module, and to prevent interference, a digital microphone is usually used. However, when the product needs to realize a long-distance and high-sensitivity conference call, the requirement on the sound quality of the whole system is high, and the realization difficulty of the digital microphone is high.
SUMMERY OF THE UTILITY MODEL
The application provides a circuit system and a voice device for sound pickup and echo cancellation, which are used for solving the problem that an analog microphone is poor in long-distance and multi-channel transmission effect.
According to an aspect of the present application, a circuit system for sound pickup and echo cancellation is provided, the circuit system includes a cascaded analog-to-digital converter composed of at least two stages of analog-to-digital converters, a plurality of sets of microphones, a speaker, and a voltage dividing circuit, wherein: a first-stage analog-to-digital converter of the cascade analog-to-digital converter receives the differential analog voice signal and outputs a digital voice signal; any middle analog-to-digital converter of the cascade analog-to-digital converters simultaneously receives a differential analog voice signal and a digital voice signal output by a last analog-to-digital converter of the middle analog-to-digital converter and outputs the digital voice signal; the last stage of analog-to-digital converter of the cascade analog-to-digital converter simultaneously receives an echo cancellation reference signal and a digital voice signal output by a last stage of analog-to-digital converter of the last stage of analog-to-digital converter; the plurality of groups of microphones are respectively and electrically connected to each level of analog-to-digital converter of the cascade analog-to-digital converter; the first end of the voltage division circuit is electrically connected to the loudspeaker, and the other end of the voltage division circuit is electrically connected to the last-stage analog-to-digital converter, so that an echo cancellation reference signal output by the loudspeaker is transmitted to the last-stage analog-to-digital converter.
According to some embodiments, the circuit system further comprises at least one schmitt trigger, the at least one schmitt trigger comprises a first schmitt trigger, a first end of the first schmitt trigger is electrically connected to the first stage analog-to-digital converter, and a second end of the first schmitt trigger is electrically connected to a first analog-to-digital converter of the cascaded analog-to-digital converters, wherein the first schmitt trigger receives the clock signal output by the first stage analog-to-digital converter and fans out the received clock signal into two clock signals, one of which is transmitted to the first analog-to-digital converter.
According to some embodiments, the at least one schmitt trigger further comprises a second schmitt trigger having a first end electrically connected to the first schmitt trigger and a second end electrically connected to a second analog-to-digital converter of the cascaded analog-to-digital converter, wherein: and the second Schmitt trigger receives the clock signal output by the first Schmitt trigger, fans out the received clock signal into two paths of clock signals, and transmits one path of clock signals to the second analog-to-digital converter.
According to some embodiments, the circuitry further comprises a digital voice processing chip that receives the digital voice signal output by the last stage analog-to-digital converter.
According to some embodiments, the digital voice processing chip further receives a clock signal output by a last schmitt trigger of the at least one schmitt trigger.
According to some embodiments, the circuit system includes at least one clock source, wherein a clock source farthest from the digital voice processing chip is selected as a master clock source, the master clock source is electrically connected to the first-stage analog-to-digital converter through a master clock schmitt trigger, the master clock schmitt trigger fans out a master clock signal output by the master clock source into two master clock signals, and transmits one of the master clock signals to the first-stage analog-to-digital converter.
According to some embodiments, the first schmitt trigger receives another master clock signal output by the master clock schmitt trigger.
According to some embodiments, the digital speech processing chip and the respective stage analog-to-digital converters are connected by an I2C bus.
According to an aspect of the present application, there is provided a speech apparatus, including: circuitry as claimed in any one of the preceding claims.
According to some example embodiments of the present application, a plurality of cascaded analog-to-digital converters convert a differential analog voice signal into a digital voice signal, and the digital voice signal is transmitted to a next-stage analog-to-digital converter in a cascaded manner, so that one-stage transmission of the digital voice signal is realized, and the problem of poor transmission effect of an analog microphone in a long distance and multiple channels is solved.
According to other embodiments, the digital voice signal and the echo cancellation reference signal are transmitted to the digital voice signal chip together, so that the functions of pickup of the multi-path analog voice signal and echo cancellation are realized, the multi-path analog voice signal chip can be applied to long-distance transmission, and the sensitivity is high.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without exceeding the protection scope of the present application.
Fig. 1 shows a block diagram of a circuit system of a cascaded analog-to-digital converter for sound pickup and echo cancellation according to an exemplary embodiment of the present application.
Fig. 2 shows a block diagram of a circuit system for sound pickup and echo cancellation according to an example embodiment of the present application.
Fig. 3 shows a circuit diagram for sound pickup and echo cancellation according to an example embodiment of the present application.
Fig. 4 shows a time-division multiplexing diagram.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus, a repetitive description thereof will be omitted.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the embodiments of the disclosure can be practiced without one or more of the specific details, or with other means, components, materials, devices, or operations. In such cases, well-known structures, methods, devices, implementations, materials, or operations are not shown or described in detail.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Because analog microphones have poor transmission effects over long distances and multiple channels, digital microphones are commonly used for television sets and interactive flat panel microphones to perform recording functions. However, when a long-distance and high-sensitivity conference call is required, the digital microphone is difficult to meet the requirement of the system on the sound quality. Therefore, the circuit system and the voice device for sound pickup and echo cancellation convert an analog microphone into a digital voice signal through a plurality of cascaded analog-to-digital converters, and transmit the digital voice signal to a next-stage analog-to-digital converter in a cascading mode, so that one-stage transmission of the digital voice signal is realized, and the problem that the analog microphone has poor transmission effect in long distance and multiple channels is solved.
According to other embodiments, by transmitting the digital voice signal and the echo cancellation reference signal to the digital voice signal chip together, the multi-path analog voice signal pickup and echo cancellation functions are realized, and the multi-path analog voice signal pickup and echo cancellation chip can be applied to long-distance transmission and has high sensitivity.
Fig. 1 shows a block diagram of a circuit system of a cascaded analog-to-digital converter for sound pickup and echo cancellation according to an exemplary embodiment of the present application. A detailed description of the circuitry of a cascaded analog-to-digital converter for sound pickup and echo cancellation according to an embodiment of the present application is provided below with reference to fig. 1.
The circuit system shown in fig. 1 is a cascaded analog-to-digital converter according to an embodiment of the present application, and includes a first-stage analog-to-digital converter 101, an intermediate-stage analog-to-digital converter 103, and a last-stage analog-to-digital converter 105.
According to some embodiments, the cascaded analog-to-digital converter comprises two analog-to-digital converters, i.e. a first stage analog-to-digital converter and a last stage analog-to-digital converter.
According to some embodiments, the cascaded analog-to-digital converter comprises three or more analog-to-digital converters.
According to some embodiments of the present application, a first stage analog-to-digital converter receives a differential analog voice signal from a microphone, converts the differential analog voice signal to a digital voice signal, and transmits the digital voice signal to a next stage analog-to-digital converter. For example, the first stage analog-to-digital converter 101 converts the received differential analog voice signal into a digital voice signal and transmits the digital voice signal to the intermediate stage analog-to-digital converter 103.
According to some embodiments of the present application, the intermediate stage analog-to-digital converter 103 comprises one analog-to-digital converter. The intermediate-stage analog-to-digital converter 103 receives the differential analog voice signal and the digital voice signal output by the previous-stage analog-to-digital converter at the same time, and converts the differential analog voice signal into a digital voice signal. And transmitting the converted digital voice signal and the received digital voice signal output by the last-stage analog-to-digital converter to the next-stage analog-to-digital converter by using a Time-Division Multiplexing (TDM) protocol. For example, the intermediate-stage a/d converter 103 receives the differential analog voice signal and the digital voice signal transmitted by the first-stage a/d converter 101 at the same time, converts the received differential analog voice signal into a digital voice signal, and synthesizes the digital voice signal converted from the differential analog voice signal and the received digital voice signal into a time division multiplexing digital voice signal by using the TDM protocol, and sends the time division multiplexing digital voice signal to the last-stage a/d converter 105.
According to other embodiments, the intermediate-stage analog-to-digital converter 103 includes at least two analog-to-digital converters, and for each analog-to-digital converter in the intermediate-stage analog-to-digital converter 103, the differential analog voice signal and the digital voice signal output by the analog-to-digital converter in the previous stage are received simultaneously, the received differential analog voice signal is converted into a digital voice signal, and then the digital voice signal converted from the differential analog voice signal and the received digital voice signal are synthesized into a time division multiplexing digital voice signal by using a TDM protocol and sent to the analog-to-digital converter in the next stage.
According to some example embodiments of the present application, the last stage analog-to-digital converter receives the echo cancellation reference signal and the digital voice signal output by the last stage analog-to-digital converter at the same time, where the digital voice signal output by the last stage analog-to-digital converter is a time division multiplexing signal synthesized by the digital voice signals output by the first stage analog-to-digital converter and the middle stage analog-to-digital converters using the TDM protocol.
For example, the last stage adc 105 receives the echo cancellation reference signal and the digital speech signal transmitted by the middle stage adc 103 at the same time.
For another example, the cascaded analog-to-digital converter shown in fig. 1 includes only the first stage analog-to-digital converter 101 and the last stage analog-to-digital converter 105, and the last stage analog-to-digital converter 105 receives the echo cancellation reference signal and the digital voice signal transmitted by the first stage analog-to-digital converter 101 at the same time.
According to some embodiments, the echo cancellation reference signal received by the last stage analog-to-digital converter is from a loudspeaker.
According to some embodiments, after the voice signal output by the loudspeaker is subjected to voltage division through the voltage division circuit, the voice signal is transmitted to the last-stage analog-to-digital converter to serve as an echo cancellation reference signal, so that the sound of the large screen is cancelled, and only external sound is recorded during recording.
According to some embodiments, for a cascaded analog-to-digital converter comprising two analog-to-digital converters, the digital speech signal of the differential analog speech signal output by the first stage analog-to-digital converter is received directly by the last stage analog-to-digital converter, since no intermediate stage analog-to-digital converter is present.
According to some embodiments, the differential analog speech signal is an analog speech signal from a microphone.
According to some embodiments of the present application, at least two stages of the modular converters form a cascade circuit on the digital signal link, and the digital voice signals output by the mode converters of each stage are transmitted on the digital signal link by using a time division multiplexing protocol.
For example, the first stage a/d converter 101 converts the received differential analog voice signal into a digital voice signal and transmits the digital voice signal to the middle stage a/d converter 103 by using a time division multiplexing protocol, and the middle stage a/d converter 103 converts the received differential analog voice signal into a digital voice signal and transmits the digital voice signal and the received digital voice signal from the first stage a/d converter 101 to the last stage a/d converter 105 by using the time division multiplexing protocol.
According to some embodiments, a schmitt trigger is also included between the two stages of analog-to-digital converters. The Schmitt trigger is used for conducting fan-out processing on the clock signal so as to reduce signal interference and crosstalk and optimize signal quality, and therefore accuracy and stability of remote transmission of audio data are guaranteed.
For example, the circuit system of the cascaded analog-to-digital converter includes a first schmitt trigger, and a first end of the first schmitt trigger is electrically connected to the first-stage analog-to-digital converter 101, and a second end of the first schmitt trigger is electrically connected to a first analog-to-digital converter in the middle analog-to-digital converter 103, wherein the first analog-to-digital converter is any one of the middle-stage analog-to-digital converters 103. The first Schmitt trigger receives a clock signal output by the first-stage analog-to-digital converter and fans out the received clock signal into two paths of clock signals, wherein one path of clock signals is transmitted to the first analog-to-digital converter, and the other path of clock signals is transmitted to the second Schmitt trigger connected with the first Schmitt trigger or a next-stage circuit connected with the first Schmitt trigger, such as a digital processing voice chip.
As another example, circuitry to cascade the analog-to-digital converter includes a first schmitt trigger and a second schmitt trigger. The first schmitt trigger receives a clock signal output by the first-stage analog-to-digital converter and fans out the received clock signal into two paths of clock signals, wherein one path is transmitted to the first analog-to-digital converter, and the other path is transmitted to the second schmitt trigger. The first terminal of the second schmitt trigger is electrically connected to the first schmitt trigger, and the second terminal is electrically connected to the second or last stage of the analog-to-digital converter 105 in the middle analog-to-digital converter 103. The second schmitt trigger receives the clock signal output from the first schmitt trigger and fans out two paths of clock signals, wherein one path of clock signal is sent to the second analog-to-digital converter or the last-stage analog-to-digital converter 105, and the other path of clock signal is sent to a third schmitt trigger connected with the second schmitt trigger or a next-stage circuit connected with the second schmitt trigger, such as a digital processing voice chip. The first and second analog-to-digital converters are any two of the intermediate analog-to-digital converters 103, and the first analog-to-digital converter is closer to the first stage analog-to-digital converter than the second analog-to-digital converter. According to some embodiments, the clock signal comprises a serial clock signal, a left channel clock signal, and/or a right channel clock signal.
According to some embodiments, the schmitt trigger is a one-to-two buffer.
According to some embodiments of the present application, the circuitry shown in FIG. 1 also includes a digital speech processing chip. The last stage of analog-to-digital converter 105 converts the received echo cancellation reference signal into a digital echo cancellation reference signal, and synthesizes a digital voice signal with the received digital voice signal output by the analog-to-digital converter from the last stage thereof by adopting a time division multiplexing protocol, and sends the digital voice signal to the digital voice processing chip so that the digital voice processing chip can carry out pickup and echo cancellation processing to eliminate the sound of the large screen per se and ensure that only external sound is recorded during recording.
According to some embodiments, the digital voice processing chip further comprises an automatic gain control to automatically adjust the gain according to the magnitude of the external sound; noise suppression, such as recording only human voice, filtering out other sounds; reverberation cancellation functions, such as the glasshouse, are relatively open and require cancellation of the ambient echo.
According to some embodiments, a clock synchronization signal generated by a clock source farthest from the digital voice processing chip, for example, an active crystal oscillator, is used as a master clock signal of the time division multiplexing signal transmitted in the circuit system shown in fig. 1, so that the digital voice signals received by the analog-to-digital converters at each stage are kept synchronized, and the problem of clock drift after the clock signals are transmitted to the digital voice processing chip for a long distance is prevented.
For example, a master clock schmitt trigger is adopted, and a clock synchronization signal generated by a clock source farthest from the digital voice processing chip, such as an active crystal oscillator, fans out two paths of the same clock signals, and inputs the same clock signals into the first-stage analog-to-digital converter 101 and the intermediate-stage analog-to-digital converter 103 or respectively inputs the same clock signals into the first-stage analog-to-digital converter 101 and the digital voice processing chip as a master clock of the digital signal link. It should be noted that, the master clock schmitt trigger and the first schmitt trigger, the second schmitt trigger, or the third schmitt trigger may all belong to the same type of schmitt trigger, and therefore, the master clock schmitt trigger is used to be named and distinguished from the first schmitt trigger, the second schmitt trigger, or the third schmitt trigger, and in fact, there is no difference in function between them, and only the placement position is different, the master clock schmitt trigger is placed between the master clock and the first stage of analog-to-digital converter, and the other schmitt triggers are placed between the cascaded stages of analog-to-digital converters.
According to some embodiments, the digital speech processing chip and the respective stage analog-to-digital converters are connected using an I2C bus. The function of each analog-to-digital converter is determined by configuring each analog-to-digital converter with a different I2C address, using the I2C address to read and write the internal registers of each analog-to-digital converter.
For example, the first-stage analog-to-digital converter 101 only processes the differential analog voice signal, the middle-stage analog-to-digital converter 103 processes the differential analog voice signal and the digital voice signal transmitted by the first-stage analog-to-digital converter 101, the last-stage analog-to-digital converter 105 converts the received echo cancellation reference signal into a digital echo cancellation reference signal, and transmits the digitized echo cancellation signal and the digital voice signals from the first-stage analog-to-digital converter 101 and the middle-stage analog-to-digital converter 103 to the digital voice processing chip, thereby realizing first-stage return of the analog voice signal.
According to the embodiment shown in fig. 1, the differential analog voice signal is converted into a digital voice signal by a plurality of cascaded analog-to-digital converters, and the digital voice signal is transmitted to the next-stage analog-to-digital converter in a cascaded manner, so that one-stage transmission of the digital voice signal is realized.
According to other embodiments, by transmitting the digital voice signal and the echo cancellation reference signal to the digital voice signal chip together, the multi-path analog voice signal pickup and echo cancellation functions are realized, and the multi-path analog voice signal pickup and echo cancellation chip can be applied to long-distance transmission and has high sensitivity.
Fig. 2 is a block diagram of a circuit system for sound pick-up and echo cancellation according to an example embodiment of the present application. A circuit system for sound pickup and echo cancellation according to an exemplary embodiment of the present application will be described in detail below with reference to fig. 2.
The circuitry shown in FIG. 2 includes a plurality of cascaded ADC chips, e.g., ES7210, and a digital signal processing chip SOC, e.g., RK 3308. Each ADC chip converts MIC analog voice signals into TDM signals and transmits the TDM signals to the next ADC chip, and therefore simultaneous transmission of multiple MIC voice signals is achieved. The last stage ADC transmits the received TDM signals and echo cancellation reference signals to a digital signal processing chip SOC, and the TDM signals and the echo cancellation reference signals are converted into USB signals to be output after sound pickup and echo cancellation processing of the digital signal processing chip SOC.
According to some embodiments of the present application, the circuit system shown in fig. 2 further includes a plurality of sets of microphones, a speaker, and a voltage divider circuit, wherein the plurality of sets of microphones are electrically connected to the analog-to-digital converters of the cascaded ADC chips, respectively; the first end of the voltage division circuit is electrically connected to the loudspeaker, and the other end of the voltage division circuit is electrically connected to the last stage ADC, so that the echo cancellation reference signal output by the loudspeaker is transmitted to the last stage analog-to-digital converter.
According to some embodiments, after the voice signal output by the loudspeaker is subjected to voltage division through the voltage dividing resistor, the voice signal is transmitted to the last stage ADC chip to be used as an echo cancellation reference signal, so that the sound of the large screen is cancelled, and only the external sound is recorded during recording.
Defining the ADC chip far away from the digital signal processing chip SOC as the first stage ADC chip, and the ADC chip connected with the digital signal processing chip SOC as the last stage ADC chip,
as shown in fig. 2, the first stage ADC chip and the middle stage ADC chip receive MIC signals, the middle stage ADC chip also receives digital voice signals sent by a TDM protocol from the previous stage, and the last stage ADC chip receives digital voice signals and echo cancellation reference signals sent by a TDM protocol from the previous stage ADC chip, and transmits the received digital voice signals and echo cancellation reference signals to the digital signal processing chip SOC in a TDM protocol. The digital signal processing chip SOC is used for converting the received digital voice signal into a USB signal for outputting after sound pickup and echo elimination are carried out on the received digital voice signal.
As shown in fig. 2, the digital signal processing chip SOC is also connected to external storage devices DDR and FLASH.
According to some embodiments, each ADC chip supports multiple analog MICs, for example, 4, the ADC chip converts received multiple analog voice signals of the MIC into digital voice signals, and transmits the digital voice signals to the second stage ADC chip using TDM time division multiplexing protocol, and the second stage ADC chip processes analog voice data output by the multiple MICs and digital voice signals output by the previous stage, and transmits the processed analog voice data and digital voice signals to the next stage ADC module using TDM protocol. By adopting the mode, the primary return of the voice signal is realized, so that the pickup function of multi-path analog MIC is realized.
The last stage ADC chip collects echo eliminating reference signals and digital voice signals output by the last stage ADC chip, the echo eliminating reference signals and the digital voice signals are transmitted to the digital signal processing chip SOC through a TDM protocol, and the digital signal processing chip SOC is converted into USB signals to be output after sound pickup and echo elimination processing, so that sound pickup and echo elimination functions are achieved.
According to some embodiments, in order to keep the digital voice signals using the TDM protocol synchronized, the master clock of the digital voice signals is generated by the clock source farthest from the digital signal processing chip SOC, e.g., an active crystal oscillator. The clock signal generated by the clock source is fanned out into two paths of same clock signals by using the master clock Schmitt trigger, and the two paths of same clock signals are used as the master clock of the TDM signal link of the whole cascade circuit, so that the problem of clock drift after the clock output from the digital signal processing chip SOC passes through a long line is prevented, and the influence caused by the attenuation of the digital voice signal transmitted in a long distance is corrected.
According to some embodiments, if the ADCs of each stage are far from each other, and the clock signal of the TDM signal link reaches the front of the next stage, the main board where the ADC of each stage is located fans out two paths of clock signals by using the schmitt trigger, so as to reduce signal interference and crosstalk, optimize signal quality, and ensure accuracy and stability of remote transmission of audio data.
According to other embodiments, the schmitt trigger may be disposed only on the ADC motherboard that is far away, and the other ADC motherboard may not be provided with the schmitt trigger.
For example, the cascaded ADC only includes one schmitt trigger, and the schmitt trigger receives the clock signal output from the first stage ADC, and divides the received clock signal into two paths of clock signals to be respectively sent to the ADC and the digital processing chip SOC on the same motherboard.
For another example, the cascaded ADC includes at least two cascaded schmitt triggers, where the first schmitt trigger receives the clock signal output from the first ADC, and divides the received clock signal into two paths of clock signals to be respectively sent to the ADC and the second schmitt trigger on the same motherboard; the second-stage Schmitt trigger receives the clock signal output by the first-stage Schmitt trigger, and divides the received clock signal into two paths of clock signals, wherein one path of clock signals is sent to an ADC (analog to digital converter) of the same mainboard as the second-stage Schmitt trigger, and the other path of clock signals is sent to the third-season Schmitt trigger. According to some embodiments, the cascaded Schmitt trigger includes only two stages of Schmitt triggers, the second stage of Schmitt triggers sending the other to the digital processing chip SOC.
According to other embodiments, the schmitt trigger is utilized to fan out the clock signal generated by the clock source into two paths of same clock signals, and the two paths of same clock signals are respectively transmitted to the ADC on the same mainboard as the schmitt trigger and the schmitt trigger or the digital processing chip SOC on the next stage thereof, and are used as the main clock of the TDM signal link of the whole cascade circuit, so as to prevent the clock output from the digital signal processing chip SOC from drifting after passing through a long line, and to correct the influence caused by the attenuation of the digital voice signal transmitted over a long distance.
According to some embodiments, the digital speech processing chip SOC and each stage of the ADC chip are connected using an I2C bus. Each ADC chip is configured with a different I2C address, and the I2C address is used to read and write the internal registers of each ADC to determine the function of each ADC. For example, the first stage ADC chip only processes MIC voice signals, the second stage ADC chip processes MIC voice signals and digital voice signals transmitted by the previous stage ADC chip, and so on, and the last group of ADC chips processes digital voice signals and echo cancellation signals output by the previous stages of ADC chips, thereby implementing first-stage feedback of analog voice signals.
According to the audio system shown in fig. 2, the analog voice signals of the microphone are returned one level at one level by using the cascaded multi-level ADC chips and are transmitted to the digital voice signal chip SOC together with the echo cancellation reference signal, so that the functions of picking up multiple paths of analog voice signals and canceling echoes are realized, and the audio system can be applied to long-distance transmission and has high sensitivity.
Fig. 3 shows a circuit diagram for sound pickup and echo cancellation according to an example embodiment of the present application. A circuit diagram for sound pickup and echo cancellation according to an exemplary embodiment of the present application will be described in detail below with reference to fig. 3.
The audio circuit shown in fig. 3 includes a plurality of ADC chips, such as ADC1, ADC2, …, ADCn, digital processing chip SOC. The ADC1, the ADC2 and the intermediate stage ADCs not shown are respectively connected with the 4 MIC circuits, and receive analog voice signals output by the MIC circuits. The last ADCn stage is connected with a voltage division circuit, and the voltage division circuit is connected with a loudspeaker. The last stage ADCn is connected with the digital signal processing chip SOC. The ADC1 and the intermediate stage ADCs convert the received analog voice signal from the MIC output to a digital voice signal and output the TDM signal DATA to the next stage ADC using the TDM protocol. The digital signal processing chip SOC receives the digital voice signal DATAn-1 sent by the last stage ADCn.
It should be noted that, the connection of each stage of ADC and 4 MICs is merely an example, and other numbers of MICs may be included.
As shown in fig. 3, the digital voice signal is transmitted in the cascade link shown in fig. 3 by using the time division multiplexing method, and the principle of the time division multiplexing is shown in fig. 4. The master clock of the digital voice signal is generated by an active crystal oscillator on the MIC board farthest from the digital signal processing chip SOC. The clock signal generated by the active crystal oscillator by using the master clock Schmitt trigger is fanned out into two main clock signals MCLK0 and MCLK1 which are respectively sent to ADC1 and the one-to-two BUFFER between ADC2 and ADC 1. One-to-two BUFFER between the ADC2 and the ADC1 fans out the received clock signal MCLK1 into two main clock signals MCLK2 and BUF _ MCLK2 in one-to-two mode, and sends the two main clock signals MCLK2 and BUF _ MCLK2 to the next stage ADC3 of the ADC2 and the ADC2 respectively, and so on, one-to-two BUFFER before ADCn fans out the received clock signal MCLKn-1 into two main clock signals MCLKn and BUF _ MCLKn in one-to-two mode, so that synchronization of digital voice signals is achieved.
As shown in fig. 3, each stage of ADC fans out the clock signals, such as serial clock signal SCLK, left and right channel clock signals LRCLK, into two clock signals by one-to-two BUFFER before receiving the clock signal sent by the previous stage.
For example, fanning out the clock signal SCLK1 out two-way clock signal SCLK2 and the clock signal BUF _ SCLK2 or, fanning out the clock signal LRCLK1 out two-way clock signals LRCLK2 and BUF _ LRCLK 2.
The last stage of ADCn receives the echo cancellation reference signal output by the voltage division circuit, and transmits the echo cancellation reference signal and the previous stages of transmission to the digital voice signal and sends the digital voice signal to the digital processing chip SOC, so that the digital processing chip SOC can carry out pickup and echo cancellation processing on the digital voice signal and convert the digital voice signal into a USB signal for output.
As shown in fig. 3, the digital speech processing chip SOC and each stage of the ADC chip are connected by an I2C bus. Each ADC chip is configured with a different I2C address, and the I2C address is used to read and write the internal registers of each ADC to determine the function of each ADC. For example, the first stage ADC chip only processes MIC voice signals, the second stage ADC chip processes MIC voice signals and digital voice signals transmitted by the previous stage ADC chip, and so on, and the last group of ADC chips processes digital voice signals and echo cancellation signals output by the previous stages of ADC chips, thereby implementing first-stage feedback of analog voice signals.
Fig. 4 shows a time-division multiplexing diagram. As shown in fig. 4, SCLK is a serial clock signal, and LRCLK is a left and right channel clock signal, which are used to synchronize the digital voice signals output by the analog-to-digital converters of each stage.
The specific situations of 1# SDOUT, 2# SDOUT, 3# SDOUT and 4# SDOUT are respectively that voice signals generated by 16 microphones are transmitted on a time division multiplexing link after being processed by digitalization. As shown in fig. 4, the voice signals do not interfere with each other, and synchronous transmission on the time division multiplexing link is realized.
According to some embodiments of the present application, an electronic device includes circuitry as shown in fig. 1.
According to some example embodiments of the present application, a speech apparatus includes circuitry as shown in fig. 1, a plurality of microphones and a loudspeaker, wherein the plurality of microphones are connected to respective analog-to-digital converters in a cascade of analog-to-digital converters, and the loudspeaker is connected to a last-stage analog-to-digital converter.
According to some example embodiments of the present application, a speech apparatus includes a circuit system as shown in fig. 1, a plurality of microphones and loudspeakers, and a voltage divider circuit, wherein the plurality of microphones are connected to respective analog-to-digital converters in a cascade of analog-to-digital converters, one end of the voltage divider circuit is connected to the loudspeakers, and the other end of the voltage divider circuit is connected to a last-stage analog-to-digital converter.
According to some example embodiments of the present application, an analog microphone is converted into a digital voice signal by a plurality of cascaded analog-to-digital converters, and the digital voice signal is transmitted to a digital voice signal chip together with an echo cancellation reference signal, so that multiple analog voice signal pickup and echo cancellation functions are realized, and the digital voice signal pickup and echo cancellation chip can be applied to long-distance transmission and has high sensitivity.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the description of the embodiments is only intended to facilitate the understanding of the methods and their core concepts of the present application. Meanwhile, a person skilled in the art should, according to the idea of the present application, change or modify the embodiments and applications of the present application based on the scope of the present application. In view of the above, the description should not be taken as limiting the application.

Claims (9)

1. A circuit system for sound pickup and echo cancellation, the circuit system comprising at least two stages of cascaded analog-to-digital converters, a plurality of sets of microphones, a speaker, and a voltage dividing circuit, wherein:
a first-stage analog-to-digital converter of the cascade analog-to-digital converter receives the differential analog voice signal and outputs a digital voice signal;
any middle analog-to-digital converter of the cascade analog-to-digital converters simultaneously receives a differential analog voice signal and a digital voice signal output by a last analog-to-digital converter of the middle analog-to-digital converter and outputs the digital voice signal;
the last stage of analog-to-digital converter of the cascade analog-to-digital converter simultaneously receives an echo cancellation reference signal and a digital voice signal output by a last stage of analog-to-digital converter of the last stage of analog-to-digital converter;
the plurality of groups of microphones are respectively and electrically connected to each level of analog-to-digital converter of the cascade analog-to-digital converter;
the first end of the voltage division circuit is electrically connected to the loudspeaker, and the other end of the voltage division circuit is electrically connected to the last-stage analog-to-digital converter, so that an echo cancellation reference signal output by the loudspeaker is transmitted to the last-stage analog-to-digital converter.
2. The circuitry of claim 1, further comprising at least one Schmitt trigger comprising a first Schmitt trigger having a first end electrically connected to the first stage analog-to-digital converter and a second end electrically connected to a first analog-to-digital converter of the cascaded analog-to-digital converters, wherein,
the first Schmitt trigger receives the clock signal output by the first-stage analog-to-digital converter and fans out the received clock signal into two paths of clock signals, wherein one path of clock signals is transmitted to the first analog-to-digital converter.
3. The circuitry of claim 2, wherein the at least one schmitt trigger further comprises a second schmitt trigger having a first end electrically connected to the first schmitt trigger and a second end electrically connected to a second analog-to-digital converter of the cascaded analog-to-digital converter, wherein:
and the second Schmitt trigger receives the clock signal output by the first Schmitt trigger, fans out the received clock signal into two paths of clock signals, and transmits one path of clock signals to the second analog-to-digital converter.
4. The circuitry of claim 3, wherein:
the circuitry also includes a digital voice processing chip,
and the digital voice processing chip receives the digital voice signal output by the last-stage analog-to-digital converter.
5. The circuitry of claim 4, wherein the digital voice processing chip further receives a clock signal output by a last Schmitt trigger of the at least one Schmitt trigger.
6. The circuit system of claim 4, wherein the circuit system comprises at least one clock source, and wherein a clock source farthest from the digital voice processing chip is selected as a master clock source, the master clock source is electrically connected to the first stage analog-to-digital converter through a master clock Schmitt trigger, and the master clock Schmitt trigger fans out a master clock signal output by the master clock source into two master clock signals and transmits one of the master clock signals to the first stage analog-to-digital converter.
7. The circuitry of claim 6, wherein the first Schmitt trigger receives another master clock signal output by the master clock Schmitt trigger.
8. The circuitry of claim 4, wherein:
the digital voice processing chip is connected with each level of analog-to-digital converter by an I2C bus.
9. A speech device, characterized in that the speech device comprises:
the circuitry of any of claims 1-8.
CN202220180451.8U 2022-01-21 2022-01-21 Circuit system and voice device for sound pickup and echo cancellation Active CN216852325U (en)

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