CN216852261U - Wireless microphone receiver control circuit with power saving function - Google Patents
Wireless microphone receiver control circuit with power saving function Download PDFInfo
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- CN216852261U CN216852261U CN202220152533.1U CN202220152533U CN216852261U CN 216852261 U CN216852261 U CN 216852261U CN 202220152533 U CN202220152533 U CN 202220152533U CN 216852261 U CN216852261 U CN 216852261U
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Abstract
The utility model discloses a wireless microphone receiver control circuit with economize on electricity function, including steady voltage chip U1, main control chip U2, receiving chip U3, triode Q1, triode Q2, triode Q3, polarity electric capacity C1, polarity electric capacity C2 and polarity electric capacity C3, steady voltage chip U1's third pin pass through resistance R1 with main control chip U2's nineteenth pin is connected, steady voltage chip U1's third pin is connected triode Q1's projecting pole, triode Q1's collector is connected main control chip U2's eighth pin, triode Q1's base pass through resistance R4 with main control chip U2's nineteenth pin is connected. The utility model discloses receiving chip U3 intermittent type work under the condition that the transmitter was closed, and can make receiving chip U3 work always under the condition that the transmitter was opened, make the receiver reach energy-conserving purpose, improve the live time of relying on battery powered receiver.
Description
Technical Field
The utility model relates to a wireless microphone technical field, concretely relates to wireless microphone receiver control circuit with economize on electricity function.
Background
A wireless microphone system is generally composed of a wireless microphone transmitter and a wireless microphone receiver, and is characterized in that a microphone converts a sound signal into an audio electric signal, the audio electric signal is modulated to a transmitting circuit, a radio frequency signal is radiated to a space by an antenna, the receiver demodulates the audio electric signal after receiving the radio frequency signal of the space, and then the audio electric signal is sent to a next processing device for recording or sound amplification. The emitter and the receiver both need a power supply to work, the emitter is usually operated by a user, the switch of the power supply is easy to control, the receiver is usually far away from the user, the switch of the power supply cannot be controlled in time, and even if the emitter stops working, the receiver still consumes power as often, so that the purpose of energy conservation cannot be achieved, and particularly, the service time of the receiver can be reduced for the receiver powered by a battery. Therefore, there is a need for improvements in the prior art to avoid the disadvantages of the prior art.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome the shortcoming and not enough among the prior art, provide a wireless microphone receiver control circuit with economize on electricity function.
The utility model discloses a realize through following technical scheme:
a wireless microphone receiver control circuit with a power saving function comprises a voltage stabilizing chip U1, a main control chip U2, a receiving chip U3, a triode Q1, a triode Q2, a triode Q3, a polar capacitor C1, a polar capacitor C2 and a polar capacitor C3, wherein a first pin of the voltage stabilizing chip U1 is connected with a power supply BATT1 through a switch SW1, a third pin of the voltage stabilizing chip U1 is connected with a nineteenth pin of the main control chip U2 through a resistor R1, a third pin of the voltage stabilizing chip U1 is connected with an emitter of the triode Q1, a collector of the triode Q1 is connected with an eighth pin of the main control chip U2, a base of the triode Q1 is connected with a nineteenth pin of the main control chip U2 through a resistor R4, a collector of the triode Q1 is connected with the third pin of the receiving chip U3, a third pin of the main control chip U2 is connected with a ninth pin of the receiving chip U3, the receiving ANTENNA ANTENNA1 is connected to the first pin of the receiving chip U3, the output interface J1 is connected to the fourth pin of the receiving chip U3, the fourth pin of the receiving chip U3 is connected to the collector of the triode Q3, the emission set of the collector of the triode Q3 is grounded, the base of the triode Q3 is connected with the collector of the triode Q2 through a resistor R3, the base of the triode Q3 is connected with the eleventh pin of the main control chip U2 through a resistor R5, the base of the triode Q3 is connected with the eleventh pin of the main control chip U2 through a resistor R5, and the emitter of the triode Q3 is connected with the third pin of the voltage stabilizing chip U1.
Further, the LED lamp also comprises an indicator light LED1, the collector of the triode Q1 is connected with the anode of the indicator light LED1, and the cathode of the LED1 is grounded through a resistor R6.
Further, the first pin of the voltage regulation chip U1 is connected to the positive connection of the polarity capacitor C1, and the negative electrode of the polarity capacitor C1 is grounded.
Further, a third pin of the voltage regulation chip U1 is connected to the positive connection of the polarity capacitor C2, and the negative electrode of the polarity capacitor C2 is grounded.
Further, the eighth pin of the main control chip U2 is grounded through a capacitor C3.
Further, a tenth pin of the main control chip U2 is grounded, a fifth pin of the receiving chip U3 is grounded, and a second pin of the voltage stabilizing chip U1 is grounded.
Further, the model of the voltage stabilizing chip U1 is 7805, and the model of the main control chip U2 is STC15W408 AS.
Compared with the prior art, the utility model discloses a set up the switch of triode Q1, resistance R1 and resistance R4 control power for the power consumption supply and the shutoff of control receiving chip U3, when the nineteenth pin (P1.0 end) of main control chip U2 exports the low level, triode Q1 switches on, and receiving chip U3 supplies power; on the contrary, when the nineteenth pin (P1.0 end) of the main control chip U2 outputs a high level, the transistor Q1 is disconnected, the receiving chip U3 is powered off, the transistor Q2, the transistor Q3, the resistor R2, the resistor R3 and the resistor R5 are arranged to form an output mute circuit, which is used to eliminate the noise output by the circuit when the power supply state of the receiving chip U3 changes, when the eleventh pin (P3.0 end) of the main control chip U2 outputs a low level, the transistor Q2 is turned on, and then the transistor Q3 is turned on, and the mute is output, on the contrary, when the eleventh pin (P3.0 end) of the main control chip U2 outputs a high level, the mute is not generated, so that the receiving chip U3 can work intermittently under the condition that the transmitter is turned off, thereby achieving the power saving effect, and the receiving chip U3 can work all the time under the condition that the transmitter is turned on, so that the receiver achieves the energy saving purpose, especially for the receiver powered by the battery, the service time of the receiver can be prolonged, and the service life of the battery can be prolonged.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a schematic diagram of the circuit connection of the wireless microphone receiver control circuit with power saving function of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
As shown in fig. 1, the control circuit of a wireless microphone receiver with power saving function of the present invention comprises a voltage stabilizing chip U1, a main control chip U2, a receiving chip U3, a transistor Q1, a transistor Q2, a transistor Q3, a polar capacitor C1, a polar capacitor C2 and a polar capacitor C3, wherein the first pin of the voltage stabilizing chip U1 is connected to a power supply BATT1 through a switch SW1, the third pin of the voltage stabilizing chip U1 is connected to the nineteenth pin of the main control chip U2 through a resistor R1, the third pin of the voltage stabilizing chip U1 is connected to the emitter of the transistor Q1, the collector of the transistor Q1 is connected to the eighth pin of the main control chip U1, the base of the transistor Q1 is connected to the nineteenth pin of the main control chip U1 through a resistor R1, the collector of the transistor Q1 is connected to the third pin of the receiving chip U1, the ninth pin of the main control chip 1 is connected to the ninth pin of the receiving chip U1, the second pin of the ANTENNA1, and the receiving chip na1 is connected to the receiving chip 1, the fourth pin of the receiving chip U3 is connected to the output interface J1, the fourth pin of the receiving chip U3 is connected to the collector of the transistor Q3, the emitter and the collector of the transistor Q3 are grounded, the base of the transistor Q3 is connected to the collector of the transistor Q2 through the resistor R3, the base of the transistor Q3 is connected to the eleventh pin of the main control chip U2 through the resistor R5, the base of the transistor Q3 is connected to the eleventh pin of the main control chip U2 through the resistor R5, and the emitter of the transistor Q3 is connected to the third pin of the regulator chip U1. The power supply is controlled to be switched on and off by arranging the triode Q1, the resistor R1 and the resistor R4, the power supply and the power supply of the receiving chip U3 are controlled to be switched off, when a nineteenth pin (P1.0 end) of the main control chip U2 outputs low level, the triode Q1 is switched on, and the power supply of the receiving chip U3 is realized; on the contrary, when the nineteenth pin (P1.0 end) of the main control chip U2 outputs a high level, the transistor Q1 is disconnected, the receiving chip U3 is powered off, the transistor Q2, the transistor Q3, the resistor R2, the resistor R3 and the resistor R5 are arranged to form an output mute circuit, which is used to eliminate the noise output by the circuit when the power supply state of the receiving chip U3 changes, when the eleventh pin (P3.0 end) of the main control chip U2 outputs a low level, the transistor Q2 is turned on, and then the transistor Q3 is turned on, and the mute is output, on the contrary, when the eleventh pin (P3.0 end) of the main control chip U2 outputs a high level, the mute is not generated, so that the receiving chip U3 can work intermittently under the condition that the transmitter is turned off, thereby achieving the power saving effect, and the receiving chip U3 can work all the time under the condition that the transmitter is turned on, so that the receiver achieves the energy saving purpose, especially for the receiver powered by the battery, the service time of the receiver can be prolonged, and the service life of the battery can be prolonged.
The LED voltage stabilizer further comprises an indicator light LED1, the collector of the triode Q1 is connected with the anode of the indicator light LED1, the cathode of the LED1 is grounded through a resistor R6, and the indicator light LED1 displays the power supply condition of the voltage stabilizing chip U1.
The first pin of the voltage stabilizing chip U1 is connected with the positive electrode of the polar capacitor C1, and the negative electrode of the polar capacitor C1 is grounded, so that the level stability of the voltage stabilizing chip U1 is ensured.
The third pin of the voltage stabilizing chip U1 is connected with the positive electrode of the polar capacitor C2, and the negative electrode of the polar capacitor C2 is grounded, so that the level stability of the voltage stabilizing chip U1 is ensured.
The eighth pin of the main control chip U2 is grounded through a capacitor C3, which ensures the level stability of the main control chip U2.
The tenth pin ground connection of main control chip U2 guarantees main control chip U2's level stability, and receiving chip U3's fifth pin ground connection guarantees receiving chip U3's level stability, and voltage regulation chip U1's level stability is guaranteed to voltage regulation chip U1's second pin ground connection.
As a specific implementation manner, the model of the voltage regulation chip U1 is 7805, and the model of the main control chip U2 is STC15W408AS, so that power supply and control are more stable.
The second pin (SM output end) of the receiving chip U3 reflects whether the receiving circuit receives a valid rf signal, and outputs a high level when the receiving circuit receives a valid rf signal, and outputs a low level when the receiving circuit does not receive a valid rf signal (the valid rf signal is an rf signal having the same receiving frequency and is large enough to enable the audio signal demodulated by the receiving circuit to meet the minimum sound quality requirement).
The working principle is as follows:
when the switch SW1 is disconnected, all circuits are in a power-off state and do not work;
when the switch SW1 is switched on, the voltage stabilizing chip U1 outputs a stable voltage to the main control chip U2, the main control chip U2 works, and the working procedure steps are as follows:
1. the master control chip U2 outputs low level from the eleventh pin (P3.0 end) to mute audio output;
2. the master control chip U2 outputs low level from the nineteenth pin (P1.0 end) to enable the receiving circuit to work by electrifying;
3. judging whether the ninth pin (P5.5 terminal) of the main control chip U2 is high:
if the low level is kept, the transmitter does not transmit, the eleventh pin (P3.0 end) outputs low level for muting, the nineteenth pin (P1.0 end) outputs high level after 0.5 second, so that the receiving circuit is powered off and stops working, and the step 2 is repeated after 3 seconds;
if the high level appears within 0.5 second, which indicates that the emitter emits light, the nineteenth pin (P1.0 end) always outputs the low level to enable the receiving circuit to be electrified and work, the eleventh pin (P3.0 end) outputs the high level without silence, and the step 3 is repeated after 3 seconds;
therefore, the receiving circuit can work intermittently under the condition that the transmitter is closed, the power-saving effect is achieved, and the receiving circuit can work constantly under the condition that the transmitter is opened.
The times described above may all be varied according to specific design requirements.
The above description is only a preferred embodiment of the present invention, and should not be taken as limiting the invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. A wireless microphone receiver control circuit with power saving, characterized by: the high-frequency ANTENNA comprises a voltage stabilizing chip U1, a main control chip U2, a receiving chip U3, a triode Q1, a triode Q2, a triode Q3, a polar capacitor C1, a polar capacitor C2 and a polar capacitor C3, wherein a first pin of the voltage stabilizing chip U1 is connected with a power supply BATT1 through a switch SW1, a third pin of the voltage stabilizing chip U1 is connected with a nineteenth pin of the main control chip U2 through a resistor R1, a third pin of the voltage stabilizing chip U1 is connected with an emitter of the triode Q1, a collector of the triode Q1 is connected with an eighth pin of the main control chip U1, a base of the main control chip Q1 is connected with a nineteenth pin of the main control chip U1 through a resistor R1, a collector of the triode Q1 is connected with a third pin of the receiving chip U1, a ninth pin of the main control chip U1 is connected with a second pin of the receiving chip U1, and a first pin of the receiving chip 1 is connected with an ANTENNA1, the fourth pin of the receiving chip U3 is connected with the output interface J1, the fourth pin of the receiving chip U3 is connected with the collector of the triode Q3, the emitting set of the collector of the triode Q3 is grounded, the base of the triode Q3 is connected with the collector of the triode Q2 through a resistor R3, the base of the triode Q3 is connected with the eleventh pin of the main control chip U2 through a resistor R5, the base of the triode Q3 is connected with the eleventh pin of the main control chip U2 through a resistor R5, and the emitter of the triode Q3 is connected with the third pin of the voltage stabilizing chip U1.
2. The wireless microphone receiver control circuit with power saving function according to claim 1, characterized in that: the LED lamp also comprises an indicator light LED1, the collector of the triode Q1 is connected with the anode of an indicator light LED1, and the cathode of the LED1 is grounded through a resistor R6.
3. The wireless microphone receiver control circuit with power saving function according to claim 1, characterized in that: the first pin of the voltage stabilizing chip U1 is connected to the positive electrode of the polarity capacitor C1, and the negative electrode of the polarity capacitor C1 is grounded.
4. The wireless microphone receiver control circuit with power saving function according to claim 1, characterized in that: the third pin of the voltage stabilizing chip U1 is connected to the positive electrode of the polarity capacitor C2, and the negative electrode of the polarity capacitor C2 is grounded.
5. The wireless microphone receiver control circuit with power saving function according to claim 1, characterized in that: the eighth pin of the main control chip U2 is grounded through a capacitor C3.
6. The wireless microphone receiver control circuit with power saving function according to claim 1, characterized in that: the tenth pin of the main control chip U2 is grounded, the fifth pin of the receiving chip U3 is grounded, and the second pin of the voltage stabilizing chip U1 is grounded.
7. The wireless microphone receiver control circuit with power saving function according to claim 1, characterized in that: the model of the voltage stabilizing chip U1 is 7805, and the model of the main control chip U2 is STC15W408 AS.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220152533.1U CN216852261U (en) | 2022-01-20 | 2022-01-20 | Wireless microphone receiver control circuit with power saving function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220152533.1U CN216852261U (en) | 2022-01-20 | 2022-01-20 | Wireless microphone receiver control circuit with power saving function |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216852261U true CN216852261U (en) | 2022-06-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220152533.1U Active CN216852261U (en) | 2022-01-20 | 2022-01-20 | Wireless microphone receiver control circuit with power saving function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216852261U (en) |
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- 2022-01-20 CN CN202220152533.1U patent/CN216852261U/en active Active
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