CN216774719U - Power amplifier direct current bias circuit - Google Patents
Power amplifier direct current bias circuit Download PDFInfo
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- CN216774719U CN216774719U CN202123399709.8U CN202123399709U CN216774719U CN 216774719 U CN216774719 U CN 216774719U CN 202123399709 U CN202123399709 U CN 202123399709U CN 216774719 U CN216774719 U CN 216774719U
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Abstract
The utility model discloses a power amplifier direct current bias circuit which comprises a first power supply, a voltage inversion module, a grid bias module, a second power supply, an energy storage capacitor bank module, a negative voltage power-up time sequence control module and a power amplifier drain electrode power-up control module. The bias circuit can control the drain electrode power supply of the power amplifier through the combination of a plurality of modules and has high reliability. The bias circuit ensures the power-on and power-off time sequence safety of the power amplifier by the matching use of the negative-pressure power-on time sequence control module and the power amplifier drain electrode power-on control module.
Description
Technical Field
The utility model relates to a direct current bias circuit of a power amplifier, belonging to the technical field of power amplifiers.
Background
The existing high-power radar transmitter mostly adopts a power synthesis implementation mode of power amplifier components, and each power amplifier component also adopts a multi-module power synthesis implementation mode.
The high-power radar transmitter usually includes a plurality of expensive high-power amplifiers, and if the absolute safety of the power-up timing sequence and the output working index are not guaranteed to be normal, the safety and reliability of the transmitter operation are affected. Meanwhile, ripples brought by a voltage inverter circuit or noise waves brought by a power supply often appear in an internal circuit of the power amplifier, and the pulse waveform jacking problem of the solid-state power amplifier affects the working stability of the power amplifier.
The information disclosed in this background section is only for enhancement of understanding of the general background of the utility model and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the defects in the prior art and provide a power amplifier direct current bias circuit which can control the drain electrode of a power amplifier to supply power and ensure the safety and reliability of the power-on time sequence of the power amplifier.
In order to achieve the purpose, the utility model is realized by adopting the following technical scheme:
the utility model provides a power amplifier direct current bias circuit, which comprises,
a first power supply for providing a first positive voltage signal;
the voltage inversion module generates a negative voltage signal according to the first positive voltage signal;
the grid electrode bias module is used for providing a bias voltage signal according to the negative voltage signal and generating a grid electrode signal of the power amplifier;
a second power supply for providing a second positive voltage signal;
the energy storage capacitor bank module outputs a third positive voltage signal according to the second positive voltage signal;
the negative voltage power-up time sequence control module generates a control signal according to the negative voltage signal;
and the power amplifier drain electrode heating control module generates a power amplifier drain electrode signal according to the third positive voltage signal and the control signal.
Further, the bias circuit includes a power-up state and a power-down state,
the power amplifier drain electrode power-on control module comprises a triode and a drain electrode switch;
when the bias circuit is in a power-on state, the negative voltage power-on time sequence control module generates a control signal to control the triode and the drain switch to be in a conducting state;
when the bias circuit is in a power-down state, the negative-pressure power-on time sequence control module generates a control signal to control the triode and the drain switch to be in a disconnection state.
Furthermore, the negative voltage power-up timing control module comprises a voltage stabilizing diode, a MOFET driver, an RC delay circuit and an AND gate,
when the bias circuit is in a power-up state, the voltage stabilizing diode generates two paths of low-level voltage signals according to a negative voltage signal, two paths of high-level voltage signals are generated through the MOFET driver, one path of high-level voltage signal is directly connected with the signal input end of the AND gate, and the other path of high-level voltage signal is connected with the signal input end of the AND gate through the RC delay circuit;
and the AND gate generates a control signal according to the two high-level voltage signals to control the triode and the drain switch to be in a conducting state.
Furthermore, when the bias circuit is in a power-down state, the voltage stabilizing diode generates two paths of low-level voltage signals in a pull-up state according to the negative voltage signal, so that one path of high-level voltage signal directly connected with the signal input end of the AND gate of the MOFET driver is converted into different high-level voltage signals,
and the AND gate generates a control signal according to the two paths of different high-level voltage signals so as to control the triode and the drain switch to be in a disconnected state.
Furthermore, the negative voltage power-on timing sequence control module further comprises a third clutter filtering unit for filtering out clutter signals in the negative voltage power-on timing sequence control module.
Further, the voltage inversion module comprises a voltage inverter and a ripple filtering unit,
the voltage inverter generates a negative voltage signal according to the first positive voltage signal; the ripple filtering unit is used for filtering ripple signals in the negative voltage signals.
Further, the gate bias module comprises a bias voltage unit and a second clutter filtering unit,
the bias voltage unit is used for providing a bias voltage signal and generating a power amplifier grid signal according to the negative voltage signal; the second clutter filtering unit is used for filtering clutter signals in the grid signals of the power amplifier.
Furthermore, the power amplifier drain electrode heating control module further comprises a fourth clutter filtering unit for filtering out clutter signals in the power amplifier drain electrode signals.
Compared with the prior art, the utility model has the following beneficial effects:
the bias circuit can control the drain electrode power supply of the power amplifier through the combination of a plurality of modules and has high reliability. The bias circuit ensures the power-on and power-off time sequence safety of the power amplifier by the matching use of the negative-pressure power-on time sequence control module and the power amplifier drain electrode power-on control module.
Meanwhile, an energy storage capacitor bank module is additionally arranged, the problem of the top drop of the pulse working output power of the power amplifier is solved, and the instantaneous output load of a drain power supply is reduced.
The bias circuit is provided with the filtering units at multiple positions, ripples brought by the voltage inversion module and clutter brought by the power supply can be well filtered, the working stability is ensured, and the output stray suppression index is improved.
Drawings
FIG. 1 is a block diagram of the components of a power amplifier DC bias circuit;
fig. 2 is a schematic diagram of a power amplifier dc bias circuit.
Detailed Description
The utility model is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
Examples
The present embodiment provides a power amplifier dc bias circuit, as shown in fig. 1, the bias circuit includes,
a first power supply for providing a first positive voltage signal;
the voltage inversion module generates a negative voltage signal according to the first positive voltage signal;
the grid bias module is used for generating a grid signal of the power amplifier according to the negative voltage signal and providing a bias voltage signal;
a second power supply for providing a second positive voltage signal;
the energy storage capacitor bank module outputs a third positive voltage signal according to the second positive voltage signal;
the negative voltage power-up time sequence control module generates a control signal according to the negative voltage signal;
and the power amplifier drain electrode heating control module generates a power amplifier drain electrode signal according to the third positive voltage signal and the control signal.
The technical concept of the utility model is that stable and clean grid bias voltage of the power amplifier is provided by matching the voltage inversion module and the grid bias module, so that the grid working point of the power amplifier is ensured to be stable, and meanwhile, a proper bias voltage signal can be configured according to the actual working requirement of the power amplifier. Through the cooperation of the negative-pressure power-up time sequence control module and the power amplifier drain electrode power-up control module, the power supply of the drain electrode of the power amplifier can be controlled, and the power-up and power-down time sequence safety is ensured.
As shown in fig. 2, the first power supply includes a first power supply terminal and a first spur filtering unit, the first power supply terminal outputs a +5V power supply voltage signal, and the first spur filtering unit, which is composed of capacitors C10 and C13, filters out spurs brought by the power supply voltage signal and outputs a first positive voltage signal.
The voltage inversion module comprises a voltage inverter N4 and a ripple filtering unit, the first positive voltage signal is inverted into a negative voltage signal through the voltage inverter N4, and the ripple signal in the negative voltage signal is filtered through the ripple filtering unit consisting of capacitors C10 and C13.
The negative voltage signal is divided into two paths, one path is connected with the grid biasing module, and the other path is connected with the negative voltage power-up time sequence control module.
The grid bias module comprises a bias voltage unit N5 and a second clutter filtering unit, a bias voltage signal is introduced into a negative voltage signal through the bias voltage unit N5 to generate a power amplifier grid signal, and the clutter signal in the power amplifier grid signal is filtered through the second clutter filtering unit consisting of capacitors C21, C22, C23 and C24, so that stable and clean power amplifier grid bias voltage is provided, a proper bias voltage signal can be adjusted and configured according to the actual working requirement of the power amplifier, and the application range is wide.
The negative voltage power-on time sequence control module comprises a voltage stabilizing diode V4, a MOFET driver N2, an RC delay circuit and an AND gate N3, and the drain power-on control module of the power amplifier comprises a triode Q1 and a drain switch Q2;
the bias circuit includes two states, a power-up state and a power-down state.
When the bias circuit is in a power-up state, the voltage-stabilizing diode V4 generates two paths of low-level voltage signals according to a negative voltage signal, and generates two paths of high-level voltage signals through the MOFET driver N2, wherein one path of high-level voltage signal is directly connected with the signal input end of the AND gate N3, and the other path of high-level voltage signal is connected with the signal input end of the AND gate N3 through an RC delay circuit consisting of a resistor R12 and a capacitor C14;
and the AND gate generates control signals according to the two high-level voltage signals to control the triode Q1 and the drain switch Q2 to be in a conducting state, and finally, the negative voltage of the gallium nitride solid-state power amplifier is prior to the drain voltage power-up time sequence.
When the bias circuit is in a power-down state, a low-level voltage signal generated by the voltage-stabilizing diode V4 is pulled up instantaneously, so that one path of high-level voltage signal directly connected with the signal input end of the AND gate N3 of the MOFET driver N2 is pulled up instantaneously and converted into different high-level voltage signals,
and the AND gate generates a control signal according to the two paths of different high-level voltage signals so as to control the triode and the drain switch to be in a disconnected state and close the whole drain power-on circuit.
It should be emphasized that transistor Q1 is a high voltage high speed transistor, drain switch Q2 is a drain controllable MOSFET switch, and a latest 80A large rated current drive capability mature device is used, which greatly improves product expansibility and reliability compared with the original 40A device.
The negative voltage power-up timing control module further comprises a third clutter filtering unit consisting of capacitors C7 and C9, and the third clutter filtering unit is used for filtering out clutter signals in the negative voltage power-up timing control module.
The power amplifier drain electrode heating control module also comprises a fourth clutter filtering unit consisting of capacitors C8 and C11, and the fourth clutter filtering unit is used for filtering clutter signals in the power amplifier drain electrode signals.
The power-up and power-down time sequence of the whole bias circuit completely meets the recommended requirements of gallium nitride power amplifier tube manufacturers, the performance of the bias circuit is verified in a high-power gallium nitride solid-state power amplifier assembly newly developed by the company, and the high reliability characteristic of the bias circuit is verified through a large number of rigorous experiments.
The energy storage capacitor bank improves the top drop problem of the pulse working output power of the power amplifier, and simultaneously reduces the instantaneous output load of the drain power supply. The bias circuit realizes the controllability of power supply of the drain electrode of the power amplifier, ensures the safety of power-on and power-off time sequences of the power amplifier, improves the inter-pulse noise of the power amplifier during pulse operation, and improves the index of the improvement factor of the radar transmitter.
The filtering units at all places adopt a large number of ceramic capacitors with low ESR and high-reliability tantalum capacitors, ripples brought by an inverter circuit and clutter brought by a power supply can be well filtered, the working point of the power amplifier is guaranteed to be stable, and stray suppression indexes output by the power amplifier assembly are improved.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (8)
1. A power amplifier DC bias circuit is characterized in that the bias circuit comprises,
a first power supply for providing a first positive voltage signal;
the voltage inversion module generates a negative voltage signal according to the first positive voltage signal;
the grid electrode bias module is used for providing a bias voltage signal according to the negative voltage signal and generating a grid electrode signal of the power amplifier;
a second power supply for providing a second positive voltage signal;
the energy storage capacitor bank module outputs a third positive voltage signal according to the second positive voltage signal;
the negative voltage power-up time sequence control module generates a control signal according to the negative voltage signal;
and the power amplifier drain electrode heating control module generates a power amplifier drain electrode signal according to the third positive voltage signal and the control signal.
2. The power amplifier DC bias circuit of claim 1, wherein the bias circuit includes a power-up state and a power-down state,
the power amplifier drain electrode power-on control module comprises a triode and a drain electrode switch;
when the bias circuit is in a power-on state, the negative voltage power-on time sequence control module generates a control signal to control the triode and the drain switch to be in a conducting state;
when the bias circuit is in a power-down state, the negative-pressure power-on time sequence control module generates a control signal to control the triode and the drain switch to be in a disconnection state.
3. The power amplifier DC bias circuit of claim 2, wherein the negative voltage power-up timing control module comprises a voltage regulator diode, a MOFET driver, an RC delay circuit and an AND gate,
when the bias circuit is in a power-up state, the voltage stabilizing diode generates two paths of low-level voltage signals according to a negative voltage signal, two paths of high-level voltage signals are generated through the MOFET driver, one path of high-level voltage signal is directly connected with the signal input end of the AND gate, and the other path of high-level voltage signal is connected with the signal input end of the AND gate through the RC delay circuit;
and the AND gate generates a control signal according to the two high-level voltage signals to control the triode and the drain switch to be in a conducting state.
4. The power amplifier DC bias circuit of claim 3,
when the bias circuit is in a power-down state, the voltage stabilizing diode generates two paths of low-level voltage signals in a pull-up state according to the negative voltage signal, so that one path of high-level voltage signals directly connected with the signal input end of the AND gate of the MOFET driver is converted into different high-level voltage signals,
and the AND gate generates a control signal according to the two paths of different high-level voltage signals so as to control the triode and the drain switch to be in a disconnected state.
5. The power amplifier dc bias circuit of claim 1, wherein the negative power-on timing control module further comprises a third clutter filtering unit for filtering out clutter signals in the negative power-on timing control module.
6. The power amplifier DC bias circuit of claim 1, wherein the voltage inverting module comprises a voltage inverter and a ripple filtering unit,
the voltage inverter generates a negative voltage signal according to the first positive voltage signal; the ripple filtering unit is used for filtering ripple signals in the negative voltage signals.
7. The power amplifier DC bias circuit of claim 1, wherein the gate bias module includes a bias voltage unit and a second spur filtering unit,
the bias voltage unit is used for providing a bias voltage signal and generating a power amplifier grid signal according to the negative voltage signal; the second clutter filtering unit is used for filtering clutter signals in the grid-level signals of the power amplifier.
8. The power amplifier dc bias circuit of claim 1, wherein the power amplifier drain heating control module further comprises a fourth spur filtering unit for filtering out a spur signal in the power amplifier drain signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123399709.8U CN216774719U (en) | 2021-12-30 | 2021-12-30 | Power amplifier direct current bias circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123399709.8U CN216774719U (en) | 2021-12-30 | 2021-12-30 | Power amplifier direct current bias circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216774719U true CN216774719U (en) | 2022-06-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123399709.8U Active CN216774719U (en) | 2021-12-30 | 2021-12-30 | Power amplifier direct current bias circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216774719U (en) |
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2021
- 2021-12-30 CN CN202123399709.8U patent/CN216774719U/en active Active
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