CN216774622U - Dynamic adjustable power supply voltage output circuit and electronic equipment - Google Patents
Dynamic adjustable power supply voltage output circuit and electronic equipment Download PDFInfo
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- CN216774622U CN216774622U CN202123448106.2U CN202123448106U CN216774622U CN 216774622 U CN216774622 U CN 216774622U CN 202123448106 U CN202123448106 U CN 202123448106U CN 216774622 U CN216774622 U CN 216774622U
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Abstract
The utility model provides a dynamically adjustable power supply voltage output circuit and electronic equipment, comprising: the voltage-reducing circuit comprises a voltage-reducing circuit, a first voltage-regulating circuit, a second voltage-regulating circuit, a controller, a first resistance network and a second resistance network; the input end of the voltage reduction circuit is used for being connected with a power supply, the output end of the voltage reduction circuit is electrically connected with the input end of a first resistance network, the output end of the first resistance network is electrically connected with the sampling end of the controller, the control end of the first voltage regulation circuit and the control end of the second voltage regulation circuit are electrically connected with the output end of the controller, the output end of the first voltage regulation circuit and the output end of the second voltage regulation circuit are electrically connected with the output end of the first resistance network, and the second resistance network is electrically connected with the input end of the controller; the problem of the unable memory power supply of the different models of adaptation of power output of current electronic equipment is solved.
Description
Technical Field
The utility model relates to the field of electronic circuits, in particular to a dynamically adjustable power supply voltage output circuit and electronic equipment.
Background
For electronic equipment (such as a notebook computer mainboard or a desktop computer mainboard) with multi-path and multi-value voltage specification input requirements, the electronic equipment needs various voltage output specifications such as 5V,3.3V,1.8V,1.2V,1.1V,1.05V,0.6V and the like, and the output schemes of different power supplies are selected to cause material difference, so that the materials are various, the design is different, and the electronic equipment cannot be standardized, fast transplanted and popularized in mass production of mature schemes. Specifically, for example: two different types of LPDDR4 and LPDDR4X in the memory pellet design, wherein only one VDDQ voltage value difference (LPDDR4, VDDQ 1.1V, LPDDR4X, VDDQ 0.6V) are commonly used, and the design requirements of these 2 types of memory pellets are supported by PCBs with different voltage design output values, and the design and development cycle is long and the development difficulty is high.
In view of this, the present application is proposed.
SUMMERY OF THE UTILITY MODEL
The utility model discloses a dynamically adjustable power supply voltage output circuit and electronic equipment, and aims to solve the problem that the power supply output of the conventional electronic equipment cannot be adapted to the power supply of memories of different types.
A first embodiment of the present invention provides a dynamically adjustable power supply voltage output circuit, including: the voltage-reducing circuit comprises a voltage-reducing circuit, a first voltage-regulating circuit, a second voltage-regulating circuit, a controller, a first resistance network and a second resistance network;
the input end of the voltage reduction circuit is used for being connected with a power supply, the output end of the voltage reduction circuit is electrically connected with the input end of a first resistance network, the output end of the first resistance network is electrically connected with the sampling end of the controller, the control end of the first voltage regulation circuit and the control end of the second voltage regulation circuit are electrically connected with the output end of the controller, the output end of the first voltage regulation circuit and the output end of the second voltage regulation circuit are electrically connected with the output end of the first resistance network, and the second resistance network is electrically connected with the input end of the controller;
preferably, the step-down circuit includes: the voltage reduction circuit comprises a voltage reduction chip, a first capacitor, a second capacitor and an inductor;
the input end of the voltage reduction chip is connected to the power supply through the first capacitor, the BST pin of the voltage reduction chip is electrically connected with the SW pin of the voltage reduction chip through the second capacitor, the first end of the inductor is electrically connected with the SW pin of the voltage reduction chip, and the second end of the inductor is electrically connected with the input end of the first resistance network.
Preferably, the first resistive network comprises: a first resistor and a second resistor;
the FB end of the voltage reduction chip is electrically connected to the first end of the first resistor, the second end of the first resistor is grounded, the first end of the first resistor is electrically connected to the first end of the second resistor, and the second end of the second resistor is electrically connected to the second end of the inductor.
Preferably, the first voltage regulating circuit includes: the first MOS tube and the third resistor;
the G pole of the first MOS tube is electrically connected with the output end of the controller, the S pole of the first MOS tube is grounded, the D pole of the first MOS tube is electrically connected with the first end of the third resistor, and the second end of the third resistor is electrically connected with the second end of the first resistor.
Preferably, the second voltage regulating circuit includes: the second MOS tube and the fourth resistor;
the G pole of the second MOS tube is electrically connected with the output end of the controller, the S pole of the second MOS tube is electrically connected with the first end of the second resistor, and the D pole of the second MOS tube is electrically connected with the second end of the second resistor through the fourth resistor.
Preferably, the second resistor network comprises a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;
the first end of the fifth resistor is electrically connected with the first end of the sixth resistor, the second end of the fifth resistor is grounded through the seventh resistor, the second end of the sixth resistor is grounded through the eighth resistor, the second ends of the fifth resistor and the sixth resistor are electrically connected with the input end of the controller, and the first end of the fifth resistor and the first end of the sixth resistor are electrically connected with the power supply.
A second embodiment of the present invention provides an electronic device, comprising a power supply and the dynamically adjustable power supply voltage output circuit as described above, wherein the power supply is electrically connected to an input terminal of the voltage reduction circuit.
Based on the dynamically adjustable power supply voltage output circuit and the electronic equipment provided by the utility model, the controller acquires the access condition of the memory through the second resistance network, generating an enable signal to the voltage reduction circuit and judging the voltage required by the accessed memory according to the access condition, by collecting the output voltage of the first resistance network and judging whether the output voltage meets the voltage required by the accessed memory, when the output voltage is judged to be lower than the preset value, a first control signal is output to the first voltage regulating circuit to increase the output of the first resistance network, when the output voltage is judged to be higher than the preset value, a second control signal is output to the second voltage regulating circuit, the problem that the power output of the existing electronic equipment cannot be matched with the power supplies of memories of different models is solved by reducing the output of the first resistance network.
Drawings
FIG. 1 is a schematic diagram of a dynamically adjustable power supply voltage output circuit according to a first embodiment of the present invention;
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings of the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
The following detailed description of specific embodiments of the utility model refers to the accompanying drawings.
The utility model discloses a dynamically adjustable power supply voltage output circuit and electronic equipment, and aims to solve the problem that the power supply output of the conventional electronic equipment cannot be adapted to the power supply of memories of different types.
Referring to fig. 1, a first embodiment of the present invention provides a dynamically adjustable power supply voltage output circuit, including: the voltage-reducing circuit comprises a voltage-reducing circuit, a first voltage-regulating circuit, a second voltage-regulating circuit, a controller, a first resistance network and a second resistance network;
the input end of the voltage reduction circuit is used for being connected with a power supply, the output end of the voltage reduction circuit is electrically connected with the input end of a first resistance network, the output end of the first resistance network is electrically connected with the sampling end of the controller, the control end of the first voltage regulation circuit and the control end of the second voltage regulation circuit are electrically connected with the output end of the controller, the output end of the first voltage regulation circuit and the output end of the second voltage regulation circuit are electrically connected with the output end of the first resistance network, and the second resistance network is electrically connected with the input end of the controller;
it should be noted that, in the existing electronic device (for example, a notebook motherboard or a desktop motherboard), it needs multiple voltage output specifications such as 5V,3.3V,1.8V,1.2V,1.1V,1.05V,0.6V, etc., and the type selection of the output schemes of different power supplies leads to material differences, which leads to multiple material types, and the design has differences, and thus, it is impossible to perform standardized fast transplantation and mass production popularization of a mature scheme. For example: two different types of LPDDR4 and LPDDR4X in the memory grain design, wherein only one VDDQ voltage value difference (LPDDR4, VDDQ 1.1V, LPDDR4X, VDDQ 0.6V) are provided, in the prior art, the 2 types of memory grains are supported by designing PCBs with different output voltages, and the design and development period is long and the development difficulty is high.
In one possible embodiment of the present invention, the second resistor network comprises a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;
the first end of the fifth resistor is electrically connected with the first end of the sixth resistor, the second end of the fifth resistor is grounded through the seventh resistor, the second end of the sixth resistor is grounded through the eighth resistor, the second ends of the fifth resistor and the sixth resistor are electrically connected with the input end of the controller, and the first end of the fifth resistor and the first end of the sixth resistor are electrically connected with the power supply.
In this embodiment, the controller collects the access condition of the memory through the second resistor network, for example, determines whether the model of the memory is LPDDR4 or LPDDR4X, specifically, in this embodiment, determines the combination of high and low pins (00, 01, 10, 11) accessed by the second resistor network, determines that the accessed memory LPDDR4 has a required voltage value of 1.1V when it is determined that MEM _ I D0/MEM _ I D1 is 00, determines that the accessed memory LPDDR4X has a required voltage value of 0.6V when it is determined that MEM _ I D0/MEM _ I D1 is 01, starts operating by outputting an enable signal to the voltage reduction circuit, collects the output voltage of the first resistor network in real time, determines whether the output voltage meets the required voltage of the accessed memory, and if not, performs adjustment through the first voltage adjustment circuit and the second voltage adjustment circuit, and the sampling voltage value infinitely approaches the required set output voltage value.
In this embodiment, the model of the controller may be STM32F103, however, in other embodiments, other types of chips may also be used, which is not specifically limited herein, but these schemes are within the protection scope of the present invention.
The controller acquires an access signal of the second resistance network and generates an enable signal to the voltage reduction circuit according to the access signal;
the controller collects a voltage value of the output end of the first resistance network and judges whether the voltage value meets preset output or not according to the access signal;
and when the controller judges that the voltage value does not meet the preset output, the controller outputs a first control signal to the first voltage regulating circuit or outputs a second control signal to the second voltage regulating circuit so as to regulate the output voltage of the first resistance network.
Specifically, in this embodiment, when it is determined that the voltage value is lower than the preset value, a first control signal is output to the first voltage regulating circuit to increase the output voltage of the first resistor network;
and when the voltage value is judged to be higher than the preset value, outputting a second control signal to the second voltage regulating circuit so as to reduce the output voltage of the first resistance network.
In one possible embodiment of the present invention, the step-down circuit includes: the voltage reduction circuit comprises a voltage reduction chip, a first capacitor, a second capacitor and an inductor;
the input end of the voltage reduction chip is connected to the power supply through the first capacitor, the BST pin of the voltage reduction chip is electrically connected with the SW pin of the voltage reduction chip through the second capacitor, the first end of the inductor is electrically connected with the SW pin of the voltage reduction chip, and the second end of the inductor is electrically connected with the input end of the first resistance network.
It should be noted that the first capacitor, the second capacitor, and the inductor form a filter circuit for filtering noise before the power is input to the voltage reduction circuit and noise output to a subsequent loop after voltage reduction, and in other embodiments, the filter circuit may also be formed by connecting other electronic components, which is not specifically limited herein, but these solutions are within the protection scope of the present invention.
In one possible embodiment of the utility model, the first resistance network comprises: a first resistor and a second resistor;
the FB end of the buck chip is electrically connected to the first end of the first resistor, the second end of the first resistor is grounded, the first end of the first resistor is electrically connected to the first end of the second resistor, and the second end of the second resistor is electrically connected to the second end of the inductor.
The first resistor and the second resistor form a set resistor network for designing an external output voltage value, + V _ OUT ═ Vfb (1+ R1/R2), where Vfb is an output sampling value collected by the FB pin of the buck chip.
In one possible embodiment of the present invention, the first voltage regulating circuit includes: the first MOS tube and the third resistor;
the G pole of the first MOS tube is electrically connected with the output end of the controller, the S pole of the first MOS tube is grounded, the D pole of the first MOS tube is electrically connected with the first end of the third resistor, and the second end of the third resistor is electrically connected with the second end of the first resistor.
In one possible embodiment of the present invention, the second voltage regulating circuit includes: the second MOS tube and the fourth resistor;
the G pole of the second MOS tube is electrically connected with the output end of the controller, the S pole of the second MOS tube is electrically connected with the first end of the second resistor, and the D pole of the second MOS tube is electrically connected with the second end of the second resistor through the fourth resistor.
It should be noted that the sampling end of the controller collects the level voltage value of + V _ OUT in real time, and compares the level voltage value with the design requirement setting value (1.1 and 0.6), and meanwhile, the controller runs a predetermined PWM width adjustment program (if the sampled voltage output value is smaller than the design requirement setting value, the PWM duty ratio width of PWM _ OUT can be increased, and if the sampled voltage output value is larger than the design requirement setting value, the PWM duty ratio width of PWM _ OUT can be decreased), and dynamically adjusts the PWM _ OUT duty ratio width to accurately match the set output voltage value of the design requirement. Specifically, in the present embodiment:
a) the + V _ OUT ═ Vfb (1+ R2/Rb), in which Q1 is dynamically turned on and off, and a variable R3 dynamic variable resistance value is introduced to be connected in parallel with the R1 resistance of the original line design to generate a new calculated equivalent value Rb, so that incremental voltage value adjustment (voltage value increase) in the large direction of the + V _ OUT ═ Vfb (1+ R2/Rb) of the reference design voltage value can be realized.
b) And + V _ OUT ═ Vfb (1+ Ra/R1), wherein Q2 is dynamically turned on and off, and a variable R4 dynamic variable resistance value is introduced to be connected in parallel with the R2 resistance of the original line design to generate a new calculated equivalent value Ra, so that the decrement voltage value adjustment (voltage value reduction) in the direction towards the small direction of the + V _ OUT ═ Vfb (1+ Ra/R1) of the reference design voltage value can be realized.
A second embodiment of the present invention provides an electronic device, comprising a power supply and the dynamically adjustable power supply voltage output circuit as described above, wherein the power supply is electrically connected to an input terminal of the voltage reduction circuit.
Based on the dynamically adjustable power supply voltage output circuit and the electronic equipment provided by the utility model, the controller acquires the access condition of the memory through the second resistance network, generating an enable signal to the voltage reduction circuit and judging the voltage required by the accessed memory according to the access condition, by collecting the output voltage of the first resistance network and judging whether the output voltage meets the voltage required by the accessed memory, when the output voltage is judged to be lower than the preset value, a first control signal is output to the first voltage regulating circuit to increase the output of the first resistance network, when the output voltage is judged to be higher than the preset value, a second control signal is output to the second voltage regulating circuit, the problem that the power output of the existing electronic equipment cannot be matched with the power supplies of memories of different models is solved by reducing the output of the first resistance network.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention.
Claims (7)
1. A dynamically adjustable supply voltage output circuit, comprising: the voltage-reducing circuit comprises a voltage-reducing circuit, a first voltage-regulating circuit, a second voltage-regulating circuit, a controller, a first resistance network and a second resistance network;
wherein, the input of step-down circuit is used for connecting the power, the output of step-down circuit and the input electrical connection of first resistance network, the output of first resistance network with the sampling end electrical connection of controller, the control end of first voltage regulating circuit with the control end of second voltage regulating circuit with the output electrical connection of controller, the output of first voltage regulating circuit with the output of second voltage regulating circuit with the output electrical connection of first resistance network, the second resistance network with the input electrical connection of controller.
2. The dynamically adjustable power supply voltage output circuit of claim 1, wherein the voltage reduction circuit comprises: the voltage reduction circuit comprises a voltage reduction chip, a first capacitor, a second capacitor and an inductor;
the input end of the voltage reduction chip is connected to the power supply through the first capacitor, the BST pin of the voltage reduction chip is electrically connected with the SW pin of the voltage reduction chip through the second capacitor, the first end of the inductor is electrically connected with the SW pin of the voltage reduction chip, and the second end of the inductor is electrically connected with the input end of the first resistance network.
3. A dynamically adjustable supply voltage output circuit as claimed in claim 2, wherein said first resistor network comprises: a first resistor and a second resistor;
the FB end of the buck chip is electrically connected to the first end of the first resistor, the second end of the first resistor is grounded, the first end of the first resistor is electrically connected to the first end of the second resistor, and the second end of the second resistor is electrically connected to the second end of the inductor.
4. A dynamically adjustable supply voltage output circuit as recited in claim 3, wherein said first voltage regulator circuit comprises: the first MOS tube and the third resistor;
the G pole of the first MOS tube is electrically connected with the output end of the controller, the S pole of the first MOS tube is grounded, the D pole of the first MOS tube is electrically connected with the first end of the third resistor, and the second end of the third resistor is electrically connected with the second end of the first resistor.
5. A dynamically adjustable supply voltage output circuit as claimed in claim 3, wherein said second voltage regulator circuit comprises: the second MOS tube and the fourth resistor;
the G pole of the second MOS tube is electrically connected with the output end of the controller, the S pole of the second MOS tube is electrically connected with the first end of the second resistor, and the D pole of the second MOS tube is electrically connected with the second end of the second resistor through the fourth resistor.
6. The dynamically adjustable power supply voltage output circuit of claim 3, wherein the second resistor network comprises a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;
the first end of the fifth resistor is electrically connected with the first end of the sixth resistor, the second end of the fifth resistor is grounded through the seventh resistor, the second end of the sixth resistor is grounded through the eighth resistor, the second ends of the fifth resistor and the sixth resistor are electrically connected with the input end of the controller, and the first end of the fifth resistor and the first end of the sixth resistor are electrically connected with the power supply.
7. An electronic device comprising a power supply and a dynamically adjustable power supply voltage output circuit as claimed in any one of claims 1 to 6, wherein said power supply is electrically connected to an input of said voltage step-down circuit.
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Cited By (1)
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CN115756133A (en) * | 2022-11-03 | 2023-03-07 | 南京微智新科技有限公司 | Output power supply circuit and electronic equipment that intelligence switches |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN115756133A (en) * | 2022-11-03 | 2023-03-07 | 南京微智新科技有限公司 | Output power supply circuit and electronic equipment that intelligence switches |
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