CN216772783U - Drive circuit and display device - Google Patents
Drive circuit and display device Download PDFInfo
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- CN216772783U CN216772783U CN202220373216.2U CN202220373216U CN216772783U CN 216772783 U CN216772783 U CN 216772783U CN 202220373216 U CN202220373216 U CN 202220373216U CN 216772783 U CN216772783 U CN 216772783U
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Abstract
The utility model discloses a drive circuit and a display device, wherein the drive circuit comprises: a power supply circuit that supplies a first power supply voltage; the charge pump circuit receives an input voltage and outputs a second power supply voltage; the power supply end of the first operational amplification circuit receives a first power supply voltage, the first input end of the first operational amplification circuit receives a second power supply voltage, the second input end of the first operational amplification circuit is connected with the output end of the first operational amplification circuit, and the output end of the first operational amplification circuit outputs a third power supply voltage; and the driving unit receives the third power supply voltage as a power supply voltage to output a driving signal for driving the display panel. The utility model can provide stable power supply voltage, thereby enhancing the driving capability and the loading capability of the driving circuit of the display panel and being beneficial to improving the stability of the driving circuit and the display quality of the display panel.
Description
Technical Field
The utility model relates to the technical field of display, in particular to a driving circuit and a display device.
Background
With the popularization of electronic products, display devices are becoming more diversified. In compliance with the desire of consumers to protect personal privacy, display devices with narrow viewing angle displays have been developed in the display field. In order to satisfy both the demands of consumers for high-quality display and privacy protection, the development of Hybrid View Angle (HVA) display technology is becoming more and more important. The display device with the mixed visual angle display technology can be switched between a wide visual angle display mode and a narrow visual angle display mode to meet the peep-proof requirement of consumers in the narrow visual angle mode, can experience high-quality picture display in the wide visual angle mode, and meets the peep-proof requirement of people in different occasions. For realizing wide and narrow visual angles, in the prior art, the wide and narrow visual angles are controlled by using double liquid crystal boxes, wherein one liquid crystal box (a dimming box) is used for adjusting the visual angle, the other liquid crystal box (a display box) is used for controlling the gray scale, and the purpose of switching the wide visual angle and the narrow visual angle is realized by adjusting the brightness of a large visual angle.
As shown in fig. 1, the conventional display device 100 includes a display panel 110 and a power circuit 120, a pixel array 111 is disposed on the display panel 110, and a driving unit 112 for driving the display panel 110 to display a picture, and the driving unit 112 is connected to the pixel array 111 to provide driving signals such as a scan signal, a data signal, and a common voltage signal required for display to the pixel array 111. The power supply circuit 120 is connected to the driving unit 112 in the display panel 110 to supply the positive power supply voltage AVDD and the negative power supply voltage to the driving unit 112. Meanwhile, the display panel 110 is further provided with a dimming box, and the dimming box is used for switching the wide and narrow viewing angles of the display panel. The positive and negative power supply voltages required for normal operation of the driving unit 112 and the light box driving circuit in the conventional display device 100 are usually provided by a dedicated power supply circuit 120 in the display device 100.
However, in practical applications, when the driving circuit of the light-adjusting box switches the positive and negative polarities to implement the liquid crystal deflection driving on the display panel, the output voltage AVDD of the power circuit 120 is extracted, so that the voltage AVDD output by the power circuit 120 is pulled down to cause the voltage AVDD to drop, and referring to fig. 2, the stability of the voltage AVDD is seriously affected. Meanwhile, the unstable voltage AVDD also causes the gamma voltage generated based on the voltage AVDD, such as V1, to suddenly drop, so that the output signal of the source circuit, such as Data1, is unstable, which causes the display panel to have water ripples and picture crosstalk during displaying, thereby seriously affecting the display effect and causing the product competitiveness to drop.
Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.
SUMMERY OF THE UTILITY MODEL
In order to solve the above technical problems, the present invention provides a driving circuit and a display device, which can provide a stable power supply voltage, thereby enhancing the driving capability and the loading capability of the driving circuit of a display panel, and facilitating to improve the stability of the driving circuit and the display quality of the display panel.
According to a first aspect of the present disclosure, there is provided a driving circuit comprising: a power supply circuit that supplies a first power supply voltage;
the charge pump circuit receives an input voltage and outputs a second power supply voltage;
a power supply end of the first operational amplifier circuit is connected with an output end of the charge pump circuit and receives the second power supply voltage, a first input end of the first operational amplifier circuit is connected with an output end of the power supply circuit and receives the first power supply voltage, a second input end of the first operational amplifier circuit is connected with an output end of the first operational amplifier circuit, and an output end of the first operational amplifier circuit outputs a third power supply voltage;
and the driving unit is connected with the output end of the first operational amplifying circuit and receives the third power supply voltage as a power supply voltage so as to output a driving signal for driving the display panel.
Optionally, the second supply voltage is greater than the input voltage.
Optionally, the driving unit includes at least one of a source driving circuit and a gamma voltage generating circuit.
Optionally, the driving circuit further comprises:
and the power supply end of the dimming box driving circuit is connected with the output end of the power supply circuit and receives the first power supply voltage, or the power supply end of the dimming box driving circuit is connected with the output end of the first operational amplifying circuit and receives the third power supply voltage.
Optionally, the charge pump circuit comprises:
the power supply generation unit comprises at least one energy storage element, receives the input voltage, the control signal and the voltage stabilization signal and outputs the second power supply voltage;
a control signal generating unit coupled to the power generating unit to provide the control signal to the power generating unit;
a voltage stabilization unit coupled to the power generation unit to provide the voltage stabilization signal to the power generation unit.
Optionally, the energy storage element is a capacitor.
Optionally, the power generation unit includes:
the first diode, the second diode, the third diode and the fourth diode are sequentially connected in series between the receiving end of the input voltage and the output end of the second power supply voltage;
the first switch and the second switch are sequentially connected in series between the receiving end of the input voltage and a reference ground;
the first energy storage element is connected between a receiving end of the input voltage and a reference ground;
a second energy storage element connected between a first node and a cathode of the first diode, wherein the first node is a common connection point of the first switch and the second switch;
the third energy storage element is connected between the cathode of the second diode and the reference ground;
a fourth energy storage element connected between the first node and the cathode of the third diode;
the fifth energy storage element is connected between the output end of the second power supply voltage and the reference ground;
the input end of the first buffer circuit receives the control signal, the output end of the first buffer circuit is connected with the control end of the first switch, the first power supply end receives the input voltage, and the second power supply end is connected with a reference ground;
and the input end of the second buffer circuit receives the control signal, the output end of the second buffer circuit is connected with the control end of the second switch, the first power supply end receives the voltage stabilizing signal, and the second power supply end is connected with a reference ground.
Optionally, the first switch is a PMOS transistor, and the second switch is an NMOS transistor.
Optionally, the voltage stabilizing unit includes:
the sampling unit receives the second power supply voltage and outputs a sampling voltage;
and the positive phase input end of the second operational amplification circuit receives the reference voltage, the negative phase input end of the second operational amplification circuit receives the sampling voltage, and the output end of the second operational amplification circuit outputs the voltage stabilization signal.
According to a second aspect of the present disclosure, there is provided a display device, comprising: a display panel; and a driving circuit as above for supplying a driving signal to the display panel.
The beneficial effects of the utility model at least comprise:
in the embodiment of the utility model, the charge pump circuit is arranged to provide the second power supply voltage with higher stability, the first operational amplifier circuit is arranged to provide the third power supply voltage which has the same voltage value as the first power supply voltage and is influenced by the second power supply voltage in stability, and the third power supply voltage is used as the power supply voltage of the driving unit to drive the display panel, so that the driving capability and the loading capability of the driving circuit of the display panel can be effectively enhanced, and the stability of the driving circuit and the display quality of the display panel are improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the utility model, as claimed.
Drawings
Fig. 1 is a schematic view showing a structure of a conventional display device;
fig. 2 is a waveform timing chart showing operation signals of a conventional display device;
fig. 3 is a schematic structural diagram of a display device according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a gamma voltage generating circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a charge pump circuit according to an embodiment of the present invention.
Detailed Description
To facilitate an understanding of the utility model, the utility model will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The utility model may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
As shown in fig. 3, a display device 200 according to an embodiment of the present invention includes: a display panel 210, and a driving circuit for supplying a driving signal to the display panel 210.
The display panel 210 includes a pixel array 211, and the pixel array 211 has a common electrode line, a plurality of scan lines, a plurality of data lines, and a plurality of pixel units (not shown). Each pixel unit is formed at the intersection of a corresponding scan line and a corresponding data line, and each pixel unit includes a thin film transistor, a pixel capacitor, and a storage capacitor (not shown). The grid electrode of the thin film transistor in each pixel unit is connected with the corresponding scanning line, the source electrode of the thin film transistor in each pixel unit is connected with the corresponding data line, the first end (namely the pixel electrode) of the pixel capacitor and the first end (namely the storage electrode) of the storage capacitor are connected with the drain electrode of the thin film transistor, and the second end of the pixel capacitor and the second end of the storage capacitor are connected with the common electrode line to receive voltage.
In this embodiment, the driving circuit includes: a power supply circuit 220, a charge pump circuit 230, a first operational amplifier circuit 240, and a driving unit 212.
The power supply circuit 220 is configured to provide a first power supply voltage AVDD 1. The power supply circuit 220 is, for example, a dedicated power supply circuit in the display device 200, and the first power supply voltage AVDD1 generated during normal operation has a voltage value that can be used to provide power and driving support for normal operation of each circuit module in the display device 200.
An input terminal of the charge pump circuit 230 receives the input voltage VIN, and an output terminal of the charge pump circuit 230 outputs a second power voltage AVDD 2. The charge pump (charge pump), also called a switched capacitor DC-DC converter, is a boost circuit for boosting the received input voltage VIN (also used as the working power supply of the charge pump circuit 230) to the second power supply voltage AVDD2 for output, that is, the voltage value of the second power supply voltage AVDD2 in this embodiment is greater than the voltage value of the input voltage VIN. The charge pump circuit 230 is also referred to as an inductive-less DC-DC power converter when compared to an inductive-based DC-DC switching power supply. The charge pump adopts the capacitor as the switch and the energy storage element, so that the charge pump has the advantages of high efficiency, small volume, low noise and low electromagnetic interference, and the stability of the output voltage AVDD2 is high. In the present invention, the charge pump circuit 230 may be any conventional charge pump circuit, as long as it can generate an output voltage with high stability.
Illustratively, an embodiment of the present invention provides one of the circuit structures of the charge pump circuit 230, and referring to fig. 5, the charge pump circuit 230 specifically includes: a power generation unit 231, a control signal generation unit 232, and a voltage stabilization unit 233.
The power generating unit 231 includes at least one energy storage element, and the power generating unit 231 is configured to receive the input voltage VIN, the control signal, and the regulated signal, and output a second power voltage AVDD 2. As mentioned above, the energy storage elements in the charge pump circuit 230 are all capacitive elements.
Exemplarily, the power generating unit 231 further includes: the energy storage device comprises a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first switch Q1, a second switch Q2, a first energy storage element C1, a second energy storage element C2, a third energy storage element C3, a fourth energy storage element C4, a fifth energy storage element C5, a first buffer circuit 2311 and a second buffer circuit 2312. The first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 are sequentially connected in series between the receiving end of the input voltage VIN and the output end of the second power voltage AVDD 2. The first switch Q1 and the second switch Q2 are sequentially connected in series between the receiving end of the input voltage VIN and the reference ground. The first energy storage element C1 is connected between the receiving end of the input voltage VIN and the ground. The second energy storage element C2 is connected between the first node a, which is the common connection point of the first and second switches Q1 and Q2, and the cathode of the first diode D1. The third energy storage element C3 is connected between the cathode of the second diode D2 and the ground. The fourth energy storage element C4 is connected between the first node a and the cathode of the third diode D3. The fifth energy storage element C5 is connected between the output terminal of the second power voltage AVDD2 and ground. An input terminal of the first buffer circuit 2311 receives the control signal, an output terminal of the first buffer circuit 2311 is connected to a control terminal of the first switch Q1, a first power supply terminal of the first buffer circuit 2311 receives the input voltage VIN, and a second power supply terminal of the first buffer circuit 2311 is connected to a reference ground. An input end of the second buffer circuit 2312 receives the control signal, an output end of the second buffer circuit 2312 is connected with a control end of the second switch Q2, a first power supply end of the second buffer circuit 2312 receives the regulated voltage signal, and a second power supply end of the second buffer circuit 2312 is connected with the reference ground. The first switch Q1 is, for example, a PMOS transistor, and the second switch Q2 is, for example, an NMOS transistor.
The control signal generating unit 232 is coupled to the power generating unit 231, and is used for providing a control signal to the power generating unit 231. Alternatively, the control signal generating unit 232 may be, for example, an oscillator circuit or a PWM signal generating circuit.
The voltage stabilizing unit 233 is coupled to the power generating unit 231, and is configured to provide a voltage stabilizing signal to the power generating unit 231. The voltage stabilizing unit 233 further includes, for example, a sampling unit 2331 and a second operational amplifier 2332. Sampling unit 2331 receives second power supply voltage AVDD2 and outputs a sampling voltage, and sampling unit 2331 is, for example, a resistance voltage dividing unit. A non-inverting input terminal of the second operational amplifier circuit 2332 receives the reference voltage Vref, an inverting input terminal of the second operational amplifier circuit 2332 receives the sampling voltage, and an output terminal of the second operational amplifier circuit 2332 outputs the regulated voltage signal.
Based on the above description, the charge pump circuit 230 charges and discharges the energy storage elements according to the control signal and the voltage stabilization signal so as to boost the input voltage VIN, the boost space that can be achieved is larger, and the stability of the finally obtained second power supply voltage AVDD2 is higher.
With reference to fig. 3, the power supply terminal of the first operational amplifier circuit 240 is connected to the output terminal of the charge pump circuit 230 for receiving the second power supply voltage AVDD2, the first input terminal of the first operational amplifier circuit 240 is connected to the output terminal of the power supply circuit 220 for receiving the first power supply voltage AVDD1, the second input terminal of the first operational amplifier circuit 240 is connected to the output terminal thereof, and the output terminal of the first operational amplifier circuit 240 outputs the third power supply voltage AVDD 3.
The driving unit 212 is connected to the output terminal of the first operational amplifier circuit 240 to receive the third power voltage AVDD3 as a power supply voltage, so as to output a driving signal for driving the display panel 210.
It can be understood that, based on the connection structure of the first operational amplifier circuit 240 in the present embodiment, the third power voltage AVDD3 output by the output terminal thereof is substantially obtained by pulling down the power supply voltage received by the power supply terminal thereof, i.e., the second power voltage AVDD2, to different degrees, so that the output stability of the third power voltage AVDD3 is mainly affected by the second power voltage AVDD2, and since the second power voltage AVDD2 is provided by the charge pump circuit 230 alone, the voltage stability is very high, and further the output stability of the third power voltage AVDD3 output by the first operational amplifier circuit 240 is also very high. Meanwhile, the voltage value of the third power voltage AVDD3 is substantially the same as the voltage value of the first voltage AVDD1 received at the input end thereof, and further, the third power voltage AVDD3 is used as the power supply voltage of the driving unit 2112 to drive the display panel 210, so that the driving capability and the loading capability of the driving circuit of the display panel 210 can be effectively enhanced, and the stability of the driving circuit and the display quality of the display panel are improved.
Further, the driving unit 212 includes at least one of a gate driving circuit, a source driving circuit, and a timing control circuit and a gamma voltage generating circuit 2121.
The timing control circuit is respectively connected with the gate drive circuit and the source drive circuit to provide a plurality of drive control signals (for example, a start signal of the gate, a movement signal of the gate, an output control signal of the gate, and the like) for the gate drive circuit and the source drive circuit. The gate driving circuit is connected to the plurality of scan lines of the pixel array 211 for providing a plurality of gate driving signals, and sequentially drives the plurality of scan lines of the pixel array 211 according to the driving control signals provided by the timing control circuit, so that the thin film transistors in the pixel units in the pixel array 211 are respectively gated. The source driving circuit is connected to the data lines of the pixel array for providing a plurality of source driving data to the pixel array 211 according to the driving control signal provided by the timing control circuit, so that the gated pixel unit receives the corresponding data voltage.
Further, the driving circuit further includes a dimming box driving circuit (not shown), a power supply terminal of which is connected to the output terminal of the power supply circuit 220 and receives the first power supply voltage AVDD1 as a power supply voltage, or a power supply terminal of which is connected to the output terminal of the first operational amplification circuit 240 and receives the third power supply voltage AVDD3 as a power supply voltage.
Referring to fig. 4, the gamma voltage generating circuit 2121 includes a plurality of resistors R1 to Rn connected in series, one end of the plurality of resistors R1 to Rn connected in series receives the third power voltage AVDD3, and the other end of the plurality of resistors R1 to Rn connected in series is connected to the reference ground. The resistors R1-Rn are used for generating a plurality of gamma voltages V1-Vn-1 and outputting the gamma voltages to the source driving circuit, wherein n is a natural number. It can be understood that, at this time, when the power supply terminal of the dimming box driving circuit is connected to the output terminal of the power supply circuit 220, that is, the first power supply voltage AVDD1 is used as the power supply voltage of the dimming box driving circuit, even when the dimming box driving circuit switches the positive and negative polarities and pumps the first power supply voltage AVDD1, since the third power supply voltage AVDD3 for generating a plurality of gamma voltages is generated by the charge pump circuit 230 and the first operational amplifier circuit 240 alone, the third power supply voltage AVDD3 is not affected by the dimming box driving circuit when the positive and negative polarities are switched, the waveform of the gamma voltage output by the gamma voltage generating circuit 2121 and the output waveform of the source driving circuit are not affected; when the power supply terminal of the dimming box driving circuit is connected to the output terminal of the first operational amplifier circuit 240, that is, the third power supply voltage AVDD3 is used as the power supply voltage of the dimming box driving circuit, the waveform of the gamma voltage output by the gamma voltage generating circuit 2121 and the output waveform of the source driving circuit are not affected because the stability of the third power supply voltage AVDD3 is very high, so that the driving capability and the loading capability of the driving circuit of the display panel can be enhanced, and the picture ripple phenomenon of the display panel 210 can be effectively eliminated. Meanwhile, because the power supply voltage of the source driving circuit is also the third power supply voltage AVDD3, the utility model can also greatly reduce the occurrence probability of crosstalk (crosstalk) of the display image, and improve the image crosstalk phenomenon of the display panel, thereby improving the stability of the driving circuit and the display quality of the display panel.
On the other hand, the mechanism of the third power voltage AVDD3 with high stability generated by the present invention is similar to the external power voltage of the power supply, so from the theoretical analysis, the design scheme of the present invention can reduce the use of the voltage-stabilizing capacitor at the gamma voltage generating circuit 2121, or reduce the capacitance of the voltage-stabilizing capacitor, thereby achieving the purpose of saving cost.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the utility model may be made without departing from the scope of the utility model.
Claims (10)
1. A driver circuit, comprising:
a power supply circuit that supplies a first power supply voltage;
the charge pump circuit receives an input voltage and outputs a second power supply voltage;
a power supply end of the first operational amplifier circuit is connected with an output end of the charge pump circuit and receives the second power supply voltage, a first input end of the first operational amplifier circuit is connected with an output end of the power supply circuit and receives the first power supply voltage, a second input end of the first operational amplifier circuit is connected with an output end of the first operational amplifier circuit, and an output end of the first operational amplifier circuit outputs a third power supply voltage;
and the driving unit is connected with the output end of the first operational amplifying circuit and receives the third power supply voltage as a power supply voltage so as to output a driving signal for driving the display panel.
2. The driving circuit of claim 1, wherein the second power supply voltage is greater than the input voltage.
3. The driving circuit according to claim 1, wherein the driving unit includes at least one of a source driving circuit and a gamma voltage generating circuit.
4. The driving circuit according to claim 1, further comprising:
and the power supply end of the dimming box driving circuit is connected with the output end of the power supply circuit and receives the first power supply voltage, or the power supply end of the dimming box driving circuit is connected with the output end of the first operational amplifying circuit and receives the third power supply voltage.
5. The drive circuit of claim 1, wherein the charge pump circuit comprises:
the power supply generation unit comprises at least one energy storage element, receives the input voltage, the control signal and the voltage stabilization signal and outputs the second power supply voltage;
a control signal generating unit coupled to the power generating unit to provide the control signal to the power generating unit;
a voltage stabilization unit coupled to the power generation unit to provide the voltage stabilization signal to the power generation unit.
6. The driving circuit according to claim 5, wherein the energy storage element is a capacitor.
7. The drive circuit according to claim 5, wherein the power supply generating unit includes:
the first diode, the second diode, the third diode and the fourth diode are sequentially connected in series between the receiving end of the input voltage and the output end of the second power supply voltage;
the first switch and the second switch are sequentially connected in series between the receiving end of the input voltage and a reference ground;
the first energy storage element is connected between a receiving end of the input voltage and a reference ground;
a second energy storage element connected between a first node and a cathode of the first diode, wherein the first node is a common connection point of the first switch and the second switch;
the third energy storage element is connected between the cathode of the second diode and the reference ground;
a fourth energy storage element connected between the first node and the cathode of the third diode;
the fifth energy storage element is connected between the output end of the second power supply voltage and the reference ground;
the input end of the first buffer circuit receives the control signal, the output end of the first buffer circuit is connected with the control end of the first switch, the first power supply end receives the input voltage, and the second power supply end is connected with a reference ground;
and the input end of the second buffer circuit receives the control signal, the output end of the second buffer circuit is connected with the control end of the second switch, the first power supply end receives the voltage stabilizing signal, and the second power supply end is connected with a reference ground.
8. The driving circuit of claim 7, wherein the first switch is a PMOS transistor and the second switch is an NMOS transistor.
9. The driver circuit according to claim 5, wherein the voltage stabilization unit includes:
the sampling unit is used for receiving the second power supply voltage and outputting a sampling voltage;
and the positive phase input end of the second operational amplification circuit receives the reference voltage, the negative phase input end of the second operational amplification circuit receives the sampling voltage, and the output end of the second operational amplification circuit outputs the voltage stabilization signal.
10. A display device, comprising:
a display panel and a driver circuit as claimed in any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220373216.2U CN216772783U (en) | 2022-02-23 | 2022-02-23 | Drive circuit and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220373216.2U CN216772783U (en) | 2022-02-23 | 2022-02-23 | Drive circuit and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216772783U true CN216772783U (en) | 2022-06-17 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220373216.2U Active CN216772783U (en) | 2022-02-23 | 2022-02-23 | Drive circuit and display device |
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| Country | Link |
|---|---|
| CN (1) | CN216772783U (en) |
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2022
- 2022-02-23 CN CN202220373216.2U patent/CN216772783U/en active Active
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