CN216751863U - Image signal generator - Google Patents

Image signal generator Download PDF

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Publication number
CN216751863U
CN216751863U CN202123110549.0U CN202123110549U CN216751863U CN 216751863 U CN216751863 U CN 216751863U CN 202123110549 U CN202123110549 U CN 202123110549U CN 216751863 U CN216751863 U CN 216751863U
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board
image signal
signal generator
power
core
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张宁强
张瑞忠
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Beijing Mgga Technology Co ltd
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Beijing Mgga Technology Co ltd
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Abstract

The utility model provides an image signal generator, it includes the casing and holds nuclear core plate, power strip and the power control board in the casing. The core board, the power supply board and the power supply control board are sequentially stacked in the longitudinal direction, the mutually facing surfaces of the core board and the power supply board are respectively provided with a first electric connector and a first adaptive electric connector which are mutually connected, and the mutually facing surfaces of the power supply board and the power supply control board are respectively provided with a second electric connector and a second adaptive electric connector which are mutually connected. Because nuclear core plate, power strip and power control panel are through range upon range of setting, so can reduce the space waste in the casing, realize the rational utilization of casing inner space, improve the utilization ratio in space. And because the boards can be electrically connected, the transmission of electric power and/or electric signals between the boards can be realized. Under the condition of not influencing the function of the image signal generator, the internal structure of the image signal generator can be more compact, the integration level is higher, the size of a product is further reduced, and the cost of the product is reduced.

Description

Image signal generator
Technical Field
The utility model relates to a technical field that display panel detected specifically relates to an image signal generator.
Background
A Pattern Generator (PG) is a signal generating device that can generate different image test signals in response to different commands to realize testing of display panels such as Liquid Crystal Displays (LCDs) and Organic Light Emitting Diodes (OLEDs). The existing image signal generator is large in size and not beneficial to integration due to the integration of a plurality of power supplies and a plurality of signal systems.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems existing in the prior art at least in part, the present invention provides an image signal generator. The image signal generator comprises a shell, and a core board, a power board and a power control board which are contained in the shell, wherein the core board, the power board and the power control board are sequentially stacked in the longitudinal direction, a first electric connector and a first adaptive electric connector which are mutually connected are respectively arranged on the surfaces, facing to each other, of the core board and the power board, and a second electric connector and a second adaptive electric connector which are mutually connected are respectively arranged on the surfaces, facing to each other, of the power board and the power control board.
Illustratively, on a transverse plane perpendicular to the longitudinal direction, an area covered by the power board and the core board is divided into a first area and a second area, and the power control board is located in the first area.
Exemplarily, the image signal generator further comprises a heat dissipation fan, the same positions of the power board and the core board are provided with corresponding notch portions, the notch portions are located in the second area, and the heat dissipation fan is accommodated in the notch portions.
Exemplarily, two side plates in the width direction of the shell are respectively provided with a first air port and a second air port, the first air port, the second air port and the heat dissipation fan are oppositely arranged in the width direction of the shell, and the heating devices of the power supply board and the core board are arranged in an air duct formed between the first air port and the second air port.
Illustratively, the core board includes a digital backplane and a core motherboard interconnected, the core motherboard being connected to an upper surface of the digital backplane, the digital backplane covering the first area and the second area, the first electrical connector being disposed on a lower surface of the digital backplane.
Illustratively, a third electrical connector is disposed on a surface of the core motherboard facing the digital backplane, and a third mating electrical connector is disposed on a surface of the digital backplane facing the core motherboard to mate with the third electrical connector.
Illustratively, the digital backplane is provided with an adapter board interface, and the housing is provided with an opening opposite to the adapter board interface so as to expose the adapter board interface.
Exemplarily, the image signal generator further comprises an adapter plate, one end of the adapter plate is inserted into the adapter plate interface, and the other end of the adapter plate extends out of the housing for connecting the display panel to be tested.
Illustratively, the patch panel interface is disposed on a portion of the digital backplane that is within the second region.
Illustratively, the core motherboard is disposed at an intersection of the first area and the second area of the digital backplane.
Because nuclear core plate, power strip and power control panel are through range upon range of setting, so can reduce the space waste in the casing, realize the rational utilization of casing inner space, improve the utilization ratio in space. The boards may be interconnected by corresponding electrical connectors and mating electrical connectors, so that board-to-board transmission of electrical power and/or electrical signals may also be achieved. Under the condition of not influencing the function of the image signal generator, the internal structure of the image signal generator can make the product more compact, higher in integration level, smaller in size and lower in cost.
A series of concepts in a simplified form are introduced in the disclosure, which will be described in further detail in the detailed description section. The summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The advantages and features of the present invention are described in detail below with reference to the accompanying drawings.
Drawings
The following drawings of the present invention are used herein as part of the present invention for understanding the present invention. There are shown in the drawings, embodiments and descriptions thereof, which are used to explain the principles of the invention. In the drawings, there is shown in the drawings,
fig. 1 is an exploded view of an image signal generator according to various exemplary embodiments of the present invention;
FIG. 2 is a top view of the digital backplane of FIG. 1;
FIG. 3 is a bottom view of the digital backplane of FIG. 2;
FIG. 4 is a top view of the power panel of FIG. 1;
FIG. 5 is a bottom view of the power strip of FIG. 4;
FIG. 6 is a top view of the power control board of FIG. 1; and
fig. 7 is a top view of the core motherboard of fig. 1.
Wherein the figures include the following reference numerals:
100. a housing; 110. a first tuyere; 120. a second tuyere; 130. an opening; 200. a core board; 210. a first notch portion; 220. a digital backplane; 221. an adapter plate interface; 230. a core motherboard; 300. a power panel; 310. a second notch portion; 400. a power control board; 510. a first electrical connector; 520. a second mating electrical connector; 610. a first mating electrical connector; 620. a second electrical connector; 710. a first region; 720. a second region; 730. a third mating electrical connector; 800. a heat dissipation fan.
Detailed Description
In the following description, numerous details are provided to provide a thorough understanding of the present invention. One skilled in the art will understand, however, that the following description relates to preferred embodiments of the invention, and that the invention may be practiced without one or more of these specific details. In addition, some technical features that are well known in the art are not described in order to avoid obscuring the present invention.
As shown in fig. 1, the present invention provides an image signal generator. The image signal generator may include a case 100 and a core board 200, a power supply board 300, and a power control board 400 accommodated in the case 100. The core board 200, the power board 300, and the power control board 400 may be sequentially stacked in a longitudinal direction, that is, a direction of the Z-axis shown in fig. 1. On the surfaces of the core board 200 and the power board 300 facing each other, there may be provided a first electrical connector 510 and a first mating electrical connector 610, respectively, which are interconnected. The surfaces of the power supply board 300 and the power control board 400 facing each other may be provided with a second electrical connector 620 and a second mating electrical connector 520, respectively, interconnected thereto.
In one embodiment, the housing 100 may be made of a metal material, for example, machined by a sheet metal process. The case 100 may fix the core board 200, the power board 300, and the power control board 400 disposed therein, and the case 100 may also play a role in dust prevention and heat dissipation. The combination of the first electrical connector 510 and the first mating electrical connector 610 may be a pin header and a box header, or a socket header and a socket header. The combination of the second electrical connector 620 and the second mating electrical connector 520 is also suitable for the combination of pin header and female header, and also suitable for the combination of socket header and socket. In one embodiment, the socket may include conductive contacts, colloquially referred to as "gold fingers". The electric connector and the matching electric connector can realize the functions of electric power transmission and electric signal transmission after being electrically connected. Taking the electrical connector as a pin header and the mating electrical connector as a box header as an example, in one embodiment, as shown in fig. 2-6, the first electrical connector 510 on the lower surface of the core board 200 may be a pin header, and then the first mating electrical connector 610 on the upper surface of the power board 300 may be a box header. The core board 200 is electrically connected to the power board 300 by inserting the pins into the nuts. Further, the second electrical connector 620 on the lower surface of the power board 300 may be a female pin header, and the second mating electrical connector 520 on the upper surface of the power control board 400 may be a pin header. Similarly, the power board 300 and the power control board 400 can be electrically connected by plugging the pin header and the female header into each other. Because the pin header and the pin header have certain rigidity, the core board 200 and the power board 300, and the power board 300 and the power control board 400 can be electrically connected, and the structural connection among the boards can be realized, so that the boards can be spliced together in a certain structure.
Illustratively, the core board 200 may be provided thereon with an embedded chip. The embedded system is built in the embedded chip, and the embedded system can communicate with the upper computer to receive information such as instructions sent by the upper computer, send power control signals to the power control board 400, and also output panel detection information (picture information, cross cursor information and the like) to the display panel to be detected. In addition, a DDR (double data rate synchronous dynamic random access memory) may be provided on the core board 200.
Illustratively, the power strip 300 may be an analog circuit board. Illustratively, the power strip 300 may include 9-way power circuits and other power circuits. The 9-path adjustable power supply circuit provides power supply for the display panel to be tested, the output voltage of each power supply is adjustable within a certain range, and the power supply circuit has a current monitoring function. Each power supply circuit outputs direct current signals in different voltage ranges or current ranges. Specifically, on the power board 300, each power circuit includes the following: DCDC converting circuit + linear voltage stabilizing circuit (including LDO chip), current sampling resistance, output control relay, sampling control relay. The input end of the DCDC conversion circuit is the input end of the power supply; and each path of power supply output end is connected with the input interface of the adapter plate. Other power supply circuits may include internal power supply circuits, including, for example, circuits that supply power to relays of the power strip 300, FPGA (field programmable gate array) \ DAC (digital-to-analog converter) \\ ADC (analog-to-digital converter) \\ operational amplifier of the power control board, digital backplane, and so forth.
The power control board 400 may be a digital and analog conversion circuit board. The core devices of the power control board 400 may include an FPGA chip, an ADC chip, a DAC chip, an operational amplifier, and the like. The FPGA chip outputs control signals to 9 paths of power supplies on the power supply board under the control of the embedded system, and controls the output of the 9 paths of power supplies, such as outputting voltage and current control signals, electrifying time sequence control signals, outputting relay control signals, sampling relay control signals and the like. Each ADC chip is used for acquiring current signals acquired by each power circuit corresponding to the power board on the power board, converting the current signals into digital signals and sending the digital signals to the FPGA. And each DAC chip is used for converting the digital control signal output by the FPGA into an analog control signal and sending the analog control signal to each control interface corresponding to the power panel. The operational amplifier is used to amplify or attenuate the analog signal before the ADC and to amplify or attenuate the analog signal after the DAC.
Because core board 200, power strip 300 and power control board 400 are through range upon range of setting, can reduce the space waste in casing 100, realize the rational utilization of space in casing 100, improve the utilization ratio in space. And since the boards can be connected through the corresponding electric connectors and the adaptive electric connectors, the transmission of electric power and/or electric signals between the boards can be realized. Under the condition of not influencing the function of the image signal generator, the internal structure of the image signal generator can make the product more compact, higher in integration level, smaller in size and lower in cost.
Exemplarily, the area covered by the power board 300 and the core board 200 may be divided into a first area 710 and a second area 720 on a transverse plane perpendicular to the longitudinal direction, that is, in an XY plane. The power control board 400 may be located in the first region 710. The first region 710 and the second region 720 may be disposed side by side, or some regions may be sleeved with each other. As shown in fig. 2 and 4, the core board 200 and the power board 300 have substantially the same area, and when they are stacked up and down, the covered area is substantially the same as the shape of the core board 200 or the power board 300. The first area 710 may be located near the peripheral interface of the PG device, and the second area 720 may be located far from the peripheral interface of the PG device. The first region 710 and the second region 720 are regions indicated by dotted lines in fig. 2. The power control board 400 may be plugged on the lower surface of the first region 710 of the power board 300 through the second mating electrical connector 520 and the second electrical connector 620.
Since the power control board 400 is centrally disposed in the first area 710, a space for disposing more external devices can be reserved in the second area 720.
Illustratively, the image signal generator may further include a heat dissipation fan 800. Corresponding notch parts are arranged at the same position on the same side of the power board 300 and the core board 200, the notch parts may be located in the second region 720, and the heat dissipation fan 800 may be accommodated in the notch parts. As shown in fig. 2 and 4, the notched portion may include a first notched portion 210 and a second notched portion 310. The first notch 210 may be disposed in a second region 720 of the core board 200 away from the PG device peripheral interface, and the second notch 310 may be disposed in a second region 720 of the power board 300 away from the PG device peripheral interface. The depth of the first and second notch portions 210 and 310 may be substantially the same as the thickness of the heat dissipation fan 800. When the core board 200 and the power supply board 300 are connected, the first notch portion 210 and the second notch portion 310 may be aligned in the longitudinal direction (Z-axis direction). Since the power control board 400 is disposed in the first region 710, a space is formed between the first notch portion 210 of the upper core board 200, the second notch portion 310 of the middle power supply board 300, and the second region uncovered by the lower power control board 400, and the case 100, and the heat dissipation fan 800 may be disposed in the space.
The heat dissipation fan 800 can dissipate heat of the core board 200 and the power board 300, and the like, simultaneously, thereby avoiding the problem of high temperature caused by dense PCB inside, so as to further compress the volume of the image signal generator and improve the quality of the operating environment of the image signal generator. Further, since the power board 300 and the core board 200 are provided with the notch portions, the heat dissipation fan 800 may be disposed inside the case 100, so that the exterior of the case 100 is still flat, and the aesthetic appearance thereof is maintained.
Illustratively, the first tuyere 110 and the second tuyere 120 are respectively provided at both side plates in the width direction of the casing 100. The first air opening 110, the second air opening 120, and the heat dissipation fan 800 may be oppositely disposed in a width direction (Y-axis direction) of the case 100. The heat generating devices of the power board 300 and the core board 200 may be disposed in the wind tunnel formed between the first tuyere 110 and the second tuyere 120. The first tuyere 110 and the second tuyere 120 may be through holes or a mesh grid. In the embodiment shown in fig. 1, the first tuyere 110 and the second tuyere 120 include a plurality of circular holes constituting a multi-hole vent, which can be formed by stamping in a sheet metal process. Under the effect of cooling fan 800, the air can flow between first wind gap 110 and second wind gap 120 and exterior space, utilizes the wind channel that forms to dispel the heat to nuclear core plate 200 and power strip 300, can make the radiating medium air produce faster circulation rate to carry out more efficient heat dissipation, be favorable to reducing image signal generator's volume and improve image signal generator operational environment quality.
Illustratively, as shown in fig. 1-3 and 7, the core board 200 may further include an interconnected digital backplane 220 and a core motherboard 230. The core motherboard 230 may be fixedly connected to the upper surface of the digital backplane 220. The digital backplane 220 may cover the first area 710 and the second area 720. A first electrical connector 510 may be disposed on a lower surface of the digital backplane 220. In one embodiment, the embedded chip may be disposed on the core motherboard 230. One side of the digital backplane 220 may be provided with a PG device peripheral interface, such as a peripheral circuit of a USB, etc.; the device comprises an IP setting circuit, a gigabit Ethernet circuit, a DP display circuit, an RS485\ RS232\ RS422 serial port communication circuit, a debugging circuit, a TF card circuit, an indicator lamp control circuit and the like. The above peripheral interfaces may be disposed at the side of the digital backplane 220, i.e. in the direction shown by the X-axis in fig. 1, so as not to occupy the upper and lower surfaces of the digital backplane 220 and not to affect the thickness of the image signal generator.
Because the core board comprises the digital bottom board 220 and the core mainboard 230 which are detachably mounted, the core mainboard 230 is convenient to be independently developed, and the reusability of the core mainboard is enhanced; the core mainboard 230 is installed on the other side of the side where the digital bottom board 220 is connected with the power board 300, so that the information transmission between the core mainboard 230 and an upper computer can be facilitated, and the digital bottom board can be provided with peripheral interfaces with complete functions conveniently; as well as.
Illustratively, a third electrical connector (not shown) may be disposed on a surface of the core motherboard 230 facing the digital backplane board 220, and a third mating electrical connector 730 mating with the third electrical connector may be disposed on a surface of the digital backplane board 220 facing the core motherboard 230. In one embodiment, the third electrical connector and the third mating electrical connector 730 may adopt the combination of pin header and female header, or/and the combination of socket header and slot, as described above, and the third electrical connector and the third mating electrical connector 730 may also adopt the combination of pin and pin interface as in an existing CPU (central processing unit). The pins are disposed on the lower surface of the core motherboard 230, the pin interfaces are disposed on the upper surface of the digital backplane 220, and the pins and the pin interfaces are aligned to connect, so that the communication of the electrical signals between the core motherboard 230 and the digital backplane 220 can be realized.
Since the core motherboard 230 is disposed on the upper surface of the digital backplane 220, it does not interfere with the power board 300 connected to the lower surface of the digital backplane 220, and can make reasonable use of the upper and lower surfaces of the digital backplane 220.
Illustratively, a patch panel interface 221 may also be provided on the digital backplane 220. The housing 100 may be provided with an opening 130 opposite the interposer interface 221 to expose the interposer interface 221. In one embodiment, the patch panel interface 221 may include slots disposed perpendicular to the digital backplane 220, i.e., in the Z-axis direction in fig. 1. The housing 100 may be provided with an opening 130 at a position corresponding to the slot. In use, an interposer (not shown) may be coupled to the interposer interface 221 through the opening. Further, the opening 130 may be provided with a dust cover that can be opened and closed, so as to prevent the problem of contact insensitivity caused by long-time dust accumulation on the interface 221 of the adapter board without connecting the adapter board. The adapter board interface 221 is arranged to enable the image signal generator to adapt to different external devices by connecting different adapter boards, thereby avoiding the arrangement of interface types with various specifications on the image signal generator, enabling the volume of the image signal generator to be more compact, and further reducing the volume of the image signal generator.
Illustratively, the image signal generator may further include an interposer (not shown). One end of the adapter board may be inserted into the adapter board interface 221, and the other end of the adapter board may extend out of the housing 100 for connecting to the display panel to be tested. The adapter board sends the output power signal and the panel test signal to the display panel to be tested. Because the interfaces of different display panels to be tested are not consistent, the adapter plate is required to realize conversion. The adapter plates of different types can be connected with the display panels to be tested of different types, but the structures of the parts of all the adapter plates inserted into the adapter plate interface 221 are consistent, so that the types of the display panels which can be detected by the image signal generator can be increased by the adapter plates, and the applicability of the image signal generator is improved.
Illustratively, the patch panel interface 221 is disposed on a portion of the digital backplane 220 that is within the second region 720. The adapter board interface 221 and the core motherboard 230 are arranged on the digital backplane 220 in a staggered manner, and the adapter board interface and the core motherboard 230 are not overlapped, so that the space on the upper surface of the digital backplane 220 can be more reasonably utilized, and each component is more compact on the premise of good spatial layout, so that the volume of the reduced image signal generator is smaller.
Illustratively, the core motherboard 230 is disposed at the digital backplane 220 at the intersection of the first region 710 and the second region 720. In a preferred embodiment, a portion of the core motherboard 230 is disposed in the first region 710 and another portion is disposed in the second region 720. In this way, the space on the upper surface of the digital backplane 220 can be effectively utilized, so that the space in the image signal generator can be more reasonably used.
In the description of the present invention, it is to be understood that the orientation or positional relationship indicated by the orientation words such as "front", "rear", "upper", "lower", "left", "right", "horizontal", "vertical", "horizontal" and "top", "bottom", etc. are usually based on the orientation or positional relationship shown in the drawings, and are only for convenience of description and simplification of description, and in the case of not making a contrary explanation, these orientation words do not indicate and imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore, should not be interpreted as limiting the scope of the present invention; the terms "inner" and "outer" refer to the interior and exterior relative to the contours of the components themselves.
For ease of description, relative terms of regions such as "above … …", "above … …", "on … …", "above", etc. may be used herein to describe the regional positional relationship of one or more components or features to other components or features shown in the figures. It is to be understood that the relative terms of the regions are intended to encompass not only the orientation of the element as depicted in the figures, but also different orientations in use or operation. For example, if an element in the figures is turned over in its entirety, elements "above" or "over" other elements or features would include elements "below" or "beneath" other elements or features. Thus, the exemplary term "above … …" can include both an orientation of "above … …" and "below … …". Further, these components or features may also be positioned at various other angles (e.g., rotated 90 degrees or other angles), all of which are intended to be encompassed herein.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, elements, components, and/or combinations thereof, unless the context clearly indicates otherwise.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein.
The present invention has been described in terms of the above embodiments, but it is to be understood that the above embodiments are for purposes of illustration and description only and are not intended to limit the invention to the described embodiments. Furthermore, it will be understood by those skilled in the art that the present invention is not limited to the above embodiments, and that many variations and modifications may be made in accordance with the teachings of the present invention, all within the scope of the present invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.

Claims (10)

1. An image signal generator, comprising a housing, and a core board, a power board and a power control board accommodated in the housing, the core board, the power board and the power control board being sequentially stacked in a longitudinal direction, wherein,
the core board and the power board are provided with a first electrical connector and a first adaptive electrical connector which are interconnected on the surfaces facing each other, and the power board and the power control board are provided with a second electrical connector and a second adaptive electrical connector which are interconnected on the surfaces facing each other.
2. The image signal generator according to claim 1, wherein an area covered by the power supply board and the core board is divided into a first area and a second area on a transverse plane perpendicular to the longitudinal direction, the power supply control board being located in the first area.
3. The image signal generator according to claim 2, further comprising a heat radiation fan, wherein corresponding notch portions are provided at the same positions on the same side of the power board and the core board, the notch portions are located in the second region, and the heat radiation fan is accommodated in the notch portions.
4. The image signal generator according to claim 3, wherein a first air opening and a second air opening are respectively provided at two side plates in a width direction of the housing, the first air opening, the second air opening and the heat dissipation fan are oppositely provided in the width direction of the housing, and the heat generating devices of the power board and the core board are disposed in an air duct formed between the first air opening and the second air opening.
5. The image signal generator according to claim 2, wherein the core board includes a digital backplane and a core motherboard that are interconnected, the core motherboard being connected to an upper surface of the digital backplane, the digital backplane covering the first area and the second area, the first electrical connector being provided on a lower surface of the digital backplane.
6. The image signal generator of claim 5, wherein a third electrical connector is disposed on a surface of the core motherboard facing the digital backplane, and a third mating electrical connector is disposed on a surface of the digital backplane facing the core motherboard to mate with the third electrical connector.
7. The image signal generator of claim 5, wherein the digital backplane has an interposer interface disposed thereon, and the housing has an opening disposed thereon opposite thereto to expose the interposer interface.
8. The image signal generator of claim 7, further comprising an interposer, wherein one end of the interposer is inserted into the interposer interface, and the other end of the interposer extends out of the housing for connecting to a display panel to be tested.
9. The image signal generator of claim 7, wherein the interposer interface is disposed at a portion of the digital backplane that is within the second region.
10. The image signal generator according to claim 5, wherein the core motherboard is disposed at a boundary of the first region and the second region of the digital backplane.
CN202123110549.0U 2021-12-10 2021-12-10 Image signal generator Active CN216751863U (en)

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Application Number Priority Date Filing Date Title
CN202123110549.0U CN216751863U (en) 2021-12-10 2021-12-10 Image signal generator

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Application Number Priority Date Filing Date Title
CN202123110549.0U CN216751863U (en) 2021-12-10 2021-12-10 Image signal generator

Publications (1)

Publication Number Publication Date
CN216751863U true CN216751863U (en) 2022-06-14

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