CN216748470U

CN216748470U - Automatic broadcast controller

Info

Publication number: CN216748470U
Application number: CN202122679654.XU
Authority: CN
Inventors: 李俊林; 汤吉啸; 王增生; 沈聪
Original assignee: Shanghai Chenxiao Electronic Technology Co ltd
Current assignee: Shanghai Chenxiao Electronic Technology Co ltd
Priority date: 2021-11-03
Filing date: 2021-11-03
Publication date: 2022-06-14
Anticipated expiration: 2031-11-03

Abstract

The utility model discloses a broadcast automatic controller which is connected with a broadcaster and used for automatic broadcast, and comprises a power supply circuit, a first delay circuit, a second delay circuit and a third delay circuit, wherein the power supply circuit is respectively electrically connected with the first delay circuit, the second delay circuit and the third delay circuit, and the output end of the second delay circuit is electrically connected with the input end of the third delay circuit. The automatic broadcast controller disclosed by the utility model automatically controls a broadcaster, performs startup delay through the first delay circuit, performs monitoring delay through the second delay circuit, and performs delayed shutdown through the third delay circuit, and has the advantages of automatic adjustment, convenience in use, intellectualization and the like.

Description

Automatic broadcast controller

Technical Field

The utility model belongs to the technical field of broadcast controllers, and particularly relates to a broadcast automatic controller.

Background

The application of computer in the field of broadcast television is increasingly popularized due to the rapid development of computer technology, at present, most of broadcast television broadcasts adopt a computer broadcasting system, so that the broadcasting quality is greatly improved, cable broadcast and frequency modulation sound boxes in cities have a large amount of ownership at present, and as the switch control technology of cable broadcast and frequency modulation sound boxes, the cable broadcast and frequency modulation sound boxes are in a laggard state, and some frequency modulation sound box manufacturers still use a laggard method adopted in seventy-eight years, namely, the sound boxes are started up when signals exist, and the frequency modulation sound boxes are controlled to work when no signals exist. However, most broadcasting stations adopt a 24-hour broadcasting system all day long, and cable broadcasting and FM sound boxes cannot work for 24 hours, so that the normal life of urban residents can be seriously interfered, and a delay function is not provided.

Therefore, the above problems are further improved.

SUMMERY OF THE UTILITY MODEL

The utility model mainly aims to provide a broadcast automatic controller which automatically controls a broadcaster, performs startup delay through a first delay circuit, performs monitoring delay through a second delay circuit, and performs delayed shutdown through a third delay circuit, and has the advantages of automatic adjustment, convenience in use, intellectualization and the like.

To achieve the above object, the present invention provides an automatic broadcast controller connected to a broadcaster and used for automatic broadcast, including a power circuit, a first delay circuit, a second delay circuit and a third delay circuit, the power circuit being electrically connected to the first delay circuit, the second delay circuit and the third delay circuit respectively, and an output terminal of the second delay circuit being electrically connected to an input terminal of the third delay circuit, wherein:

the first delay circuit (a startup delay circuit for protecting broadcasting from being damaged by surge current) comprises a timer U1, a capacitor C1 and a resistor R2, wherein a power supply end (8 pin) of the timer U1 is electrically connected with the power supply circuit through a relay switch K, one path of a first input end (2 pin) of the timer U1 is electrically connected with a capacitor C1 (and the power supply circuit), the other path of the first input end of the timer U1 is grounded through a resistor R2, and a second input end (6 pin) of the timer U1 is electrically connected with a common end of the capacitor C1 and the resistor R2;

the second delay circuit comprises a timer U2, a capacitor C7 and a resistor R11, wherein a power supply end (8 pins) of the timer U2 is electrically connected with the power supply circuit, one path of a first input end (2 pins) of the timer U2 is electrically connected with the capacitor C7 (connected with the power supply circuit), and the first input end of the timer U2 is electrically connected with the resistor R11;

the third delay circuit comprises a timer U3, a capacitor C6, a resistor R10 and a resistor R9, one path of a first input end (2 pins) of the timer U3 is electrically connected with an output end (3 pins) of the timer U2 through a capacitor C6, the other path of the first input end of the timer U3 is grounded through the resistor R10 and the resistor R9 in sequence, and a second input end (6 pins) of the timer U3 is electrically connected with a common end of the resistor R10 and the resistor R9.

As a further preferable technical solution of the above technical solution, the output terminal of the timer U1 is grounded through a relay JB (the relay JB is electrically connected to the high voltage terminal of the broadcaster, so that the broadcaster is connected to the high voltage terminal).

As a further preferable technical solution of the above technical solution, a second input terminal of the timer U2 is electrically connected to a collector of a transistor Q2, a base of the transistor Q2 is grounded through a resistor R5, a diode D2, a diode D3 and a capacitor C5 in sequence, one end of the resistor R5, which is far away from the transistor Q2, is grounded through a capacitor C4, an anode of the diode D2 is electrically connected to an anode of the diode D3, and a common connection terminal of the diode D2 and the diode D3 is connected to a listening signal transformer of a broadcaster through a capacitor C3.

As a further preferable technical solution of the above technical solution, a common terminal of the capacitor C6 and the resistor R10 is electrically connected to a collector of a transistor Q4, an emitter of the transistor Q4 is electrically connected to an output terminal of the timer U2, a resistor R7 is connected between a base and an emitter of the transistor Q4, a base of the transistor Q4 is electrically connected to a collector of the transistor Q3, an emitter of the transistor Q3 is grounded through the resistor R8, and a base of the transistor Q3 is electrically connected to a common terminal of the diode D3 and the capacitor C5 through the resistor R6.

As a further preferable technical solution of the above technical solution, an output terminal (3 pin) of the timer U3 is grounded through a relay switch JC (the relay JB is electrically connected to a high voltage terminal of the broadcaster, so that the broadcaster disconnects the high voltage).

As a further preferable technical solution of the above technical solution, the power circuit includes a connection end a and a connection end B, the connection end a is electrically connected to a first input end of a transformer T and the connection end B is electrically connected to a second input end of the transformer T, an output end of the transformer T is electrically connected to an input end of a rectifier bridge BD, an output end of the rectifier bridge BD is electrically connected to a collector of a transistor Q7, and an emitter of the transistor Q7 is electrically connected to a relay switch K.

Drawings

Fig. 1 is a circuit diagram of a broadcast automation controller of the present invention.

Detailed Description

The following description is provided to disclose the utility model so as to enable any person skilled in the art to practice the utility model. The preferred embodiments in the following description are given by way of example only, and other obvious variations will occur to those skilled in the art. The basic principles of the utility model, as defined in the following description, may be applied to other embodiments, variations, modifications, equivalents, and other technical solutions without departing from the spirit and scope of the utility model.

The utility model discloses an automatic broadcast controller, and the following describes the specific embodiment of the utility model in detail with the preferred embodiment.

In the embodiment of the present invention, those skilled in the art note that the broadcaster, the transformer, the rectifier bridge, and the like, which are related to the present invention, can be regarded as the prior art.

Preferred embodiments.

The utility model discloses a broadcast automatic controller which is connected with a broadcaster and used for automatic broadcast, comprising a power supply circuit, a first delay circuit, a second delay circuit and a third delay circuit, wherein the power supply circuit is respectively electrically connected with the first delay circuit, the second delay circuit and the third delay circuit, the output end of the second delay circuit is electrically connected with the input end of the third delay circuit, and the power supply circuit comprises:

the third delay circuit comprises a timer U3, a capacitor C6, a resistor R10 and a resistor R9, one path of a first input end (2 pin) of the timer U3 is electrically connected with an output end (3 pin) of the timer U2 through a capacitor C6, the other path of the first input end of the timer U3 is grounded through a resistor R10 and a resistor R9 in sequence, and a second input end (6 pin) of the timer U3 is electrically connected with a common end of the resistor R10 and the resistor R9.

Specifically, the output end of the timer U1 is grounded through a relay JB (the relay JB is electrically connected to the high-voltage end of the broadcaster, so that the broadcaster is connected to a high voltage).

More specifically, a second input terminal of the timer U2 is electrically connected to a collector of a transistor Q2, a base of the transistor Q2 is grounded through a resistor R5, a diode D2, a diode D3 and a capacitor C5 in sequence, one end of the resistor R5, which is far away from the transistor Q2, is also grounded through a capacitor C4, an anode of the diode D2 is electrically connected to an anode of the diode D3, and a common connection terminal of the diode D2 and the diode D3 is connected to a monitor signal transformer of the broadcaster through a capacitor C3.

Further, a common terminal of the capacitor C6 and the resistor R10 is electrically connected to a collector of a transistor Q4, an emitter of the transistor Q4 is electrically connected to an output terminal of the timer U2, a resistor R7 is connected between a base and an emitter of the transistor Q4, a base of the transistor Q4 is electrically connected to a collector of the transistor Q3, an emitter of the transistor Q3 is grounded via a resistor R8, and a base of the transistor Q3 is electrically connected to a common terminal of the diode D3 and the capacitor C5 via a resistor R6.

Further, the output terminal (pin 3) of the timer U3 is grounded via a relay switch JC (the relay JB is electrically connected to the high voltage terminal of the broadcaster, so that the broadcaster disconnects the high voltage).

Preferably, the power circuit includes a connection terminal a and a connection terminal B, the connection terminal a is electrically connected to a first input terminal of a transformer T and the connection terminal B is electrically connected to a second input terminal of the transformer T, an output terminal of the transformer T is electrically connected to an input terminal of a rectifier bridge BD, an output terminal of the rectifier bridge BD is electrically connected to a collector of a transistor Q7, and an emitter of the transistor Q7 is electrically connected to a relay switch K.

The principle of the utility model is as follows:

the first delay circuit is a monostable startup delay circuit, and after a certain time delay is carried out through the values of a capacitor C1 and a resistor R2, the output end of a timer U1 outputs a signal to a relay switch JB, so that high voltage is switched on, and startup is delayed to prevent surge current from damaging a broadcaster;

the second delay circuit monitors signals of a monitoring signal transformer of the broadcaster, and signals are not monitored after the values of the capacitor C7 and the resistor R11 are delayed for a certain time, so that the output end of the timer U2 outputs voltage signals to the timer U3, and the output end of the timer U3 outputs high level, and therefore the relay JC is in conductive attraction, high voltage is closed, and cost is saved;

the third delay circuit is used for carrying out delay shutdown when the interval time between the programs in broadcasting is larger than a certain value.

It should be noted that the relay switch JD of the present invention is used to turn off low voltages.

It should be noted that the technical features of the broadcaster, the transformer, the rectifier bridge, etc. related to the present patent application should be regarded as the prior art, and the specific structure, the operation principle, the control mode and the spatial arrangement mode of the technical features may be selected conventionally in the field, and should not be regarded as the utility model point of the present patent, and the present patent is not further specifically described in detail.

It will be apparent to those skilled in the art that modifications and equivalents may be made in the embodiments and/or portions thereof without departing from the spirit and scope of the present invention.

Claims

1. A broadcast automatic controller connected to a broadcaster and used for automatic broadcasting, comprising a power circuit, a first delay circuit, a second delay circuit and a third delay circuit, wherein the power circuit is electrically connected to the first delay circuit, the second delay circuit and the third delay circuit respectively, and an output terminal of the second delay circuit is electrically connected to an input terminal of the third delay circuit, wherein:

the first delay circuit comprises a timer U1, a capacitor C1 and a resistor R2, wherein a power supply end of the timer U1 is electrically connected with the power supply circuit through a relay switch K, one path of a first input end of the timer U1 is electrically connected with a capacitor C1, the other path of the first input end of the timer U1 is grounded through a resistor R2, and a second input end of the timer U1 is electrically connected with a common connection end of the capacitor C1 and the resistor R2;

the second delay circuit comprises a timer U2, a capacitor C7 and a resistor R11, wherein a power supply end of the timer U2 is electrically connected with the power supply circuit, one path of a first input end of the timer U2 is electrically connected with the capacitor C7, and a first input end of the timer U2 is electrically connected with the resistor R11;

the third delay circuit comprises a timer U3, a capacitor C6, a resistor R10 and a resistor R9, one path of a first input end of the timer U3 is electrically connected with an output end of the timer U2 through a capacitor C6, the other path of the first input end of the timer U3 is grounded through the resistor R10 and the resistor R9 in sequence, and a second input end of the timer U3 is electrically connected with a common end of the resistor R10 and the resistor R9.

2. The automatic broadcast controller of claim 1, wherein the output of the timer U1 is connected to ground through a relay JB.

3. The automatic broadcast controller of claim 2, wherein the second input terminal of the timer U2 is electrically connected to a collector of a transistor Q2, a base of the transistor Q2 is connected to ground through a resistor R5, a diode D2, a diode D3 and a capacitor C5 in sequence, one end of the resistor R5, which is far away from the transistor Q2, is further connected to ground through a capacitor C4, an anode of the diode D2 is electrically connected to an anode of the diode D3, and a common connection terminal of the diode D2 and the diode D3 is connected to a listening signal transformer of the broadcaster through a capacitor C3.

4. The automatic broadcast controller of claim 3, wherein the common terminal of the capacitor C6 and the resistor R10 is electrically connected to the collector of a transistor Q4 and the emitter of the transistor Q4 is electrically connected to the output terminal of the timer U2, a resistor R7 is connected between the base and the emitter of the transistor Q4 and the base of the transistor Q4 is electrically connected to the collector of a transistor Q3, the emitter of the transistor Q3 is grounded via a resistor R8 and the base of the transistor Q3 is electrically connected to the common terminal of the diode D3 and the capacitor C5 via a resistor R6.

5. The automatic broadcast controller of claim 4, wherein the output of the timer U3 is connected to ground through a relay switch JC.

6. The automatic broadcasting controller of claim 5, wherein the power circuit comprises a connection terminal A and a connection terminal B, the connection terminal A is electrically connected to a first input terminal of a transformer T and the connection terminal B is electrically connected to a second input terminal of the transformer T, an output terminal of the transformer T is electrically connected to an input terminal of a rectifier bridge BD, an output terminal of the rectifier bridge BD is electrically connected to a collector of a transistor Q7, and an emitter of the transistor Q7 is electrically connected to the relay switch K.