CN216721309U - Continuous time linear equalization circuit and broadband receiver - Google Patents
Continuous time linear equalization circuit and broadband receiver Download PDFInfo
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- CN216721309U CN216721309U CN202123277978.7U CN202123277978U CN216721309U CN 216721309 U CN216721309 U CN 216721309U CN 202123277978 U CN202123277978 U CN 202123277978U CN 216721309 U CN216721309 U CN 216721309U
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Abstract
The application provides a continuous time linear equalization circuit, which amplifies an input signal through an amplification module to obtain an output signal; and adjusting the voltage of the input signal according to the voltage of the output signal and the preset transfer function through the adjusting module, and adjusting the frequency peak value of the input signal according to the external control signal and the preset transfer function. The adjusting module of this application directly adjusts the frequency peak value of input signal according to external control signal to high frequency attenuation in the compensation signal transmission channel, and can not change input signal's direct current gain, guarantee signal amplification effect.
Description
Technical Field
The application belongs to the technical field of signal transceiving, and particularly relates to a continuous time linear equalization circuit and a broadband receiver.
Background
With the continuous development of society and science and technology, people's demand for signal transmission bandwidth is rising, and the demand for serial data transmission rate is also higher and higher. Many non-ideal factors are introduced into a sending channel and a receiving channel of the high-speed serial data in the signal transmission process, such as the inherent skin effect and dielectric loss of transmission media such as printed circuit board wiring, backboard wiring and cables, and the influence of the non-ideal factors on the high-speed serial data is increased along with the increase of the serial data rate, so that the high-frequency attenuation of signals is finally caused, strong intersymbol interference is generated, and the error rate of data at a receiving end is increased.
Although a Continuous Time Linear Equalizer (CTLE) is usually adopted to compensate for high-frequency attenuation in the signal transmission process, inter-symbol interference is reduced, and particularly in a link with large transmission loss, the performance of the eye pattern of the receiving end can be effectively improved. However, the conventional continuous time linear equalization circuit often changes the dc gain in the process of compensating for the channel attenuation, thereby affecting the amplification effect.
SUMMERY OF THE UTILITY MODEL
The application aims to provide a continuous time linear equalization circuit, and aims to solve the problem that the amplification effect is influenced by a traditional continuous time linear equalization circuit.
In order to achieve the above object, in a first aspect, an embodiment of the present application provides a continuous-time linear equalization circuit, including an amplifying module and an adjusting module;
the adjusting module is electrically connected with the amplifying module;
the amplifying module is configured to amplify an input signal to obtain an output signal;
the adjusting module is configured to adjust the voltage of the input signal according to the voltage of the output signal and a preset transfer function, and adjust the frequency peak of the input signal according to an external control signal and the preset transfer function.
In one possible implementation of the first aspect, the adjusting module comprises a negative feedback unit and a compensation unit;
the negative feedback unit is electrically connected with the amplifying module and the compensating unit;
the negative feedback unit is configured to reduce the voltage of the input signal according to the voltage of the output signal and a preset transfer function;
the compensation unit is configured to compensate a frequency peak of the input signal according to the external control signal and a preset transfer function.
In another possible implementation of the first aspect, the negative feedback unit includes a first resistor and a second resistor;
one end of the first resistor is electrically connected with the amplifying module and one end of the second resistor, the other end of the second resistor is electrically connected with the amplifying module, and the other end of the first resistor is grounded.
In another possible implementation of the first aspect, the compensation unit comprises a first variable capacitance;
one end of the first variable capacitor is electrically connected with the common connecting end of the first resistor and the second resistor, and the other end of the first variable capacitor is electrically connected with the amplifying module.
In another possible implementation of the first aspect, the amplifying module comprises a first operational amplifier;
the non-inverting input end of the first operational amplifier is the input end of the input signal, and the inverting input end of the first operational amplifier and the output end of the first operational amplifier are both electrically connected with the adjusting module.
In another possible implementation of the first aspect, the amplifying module comprises a second operational amplifier and a third operational amplifier;
the non-inverting input end of the second operational amplifier is the input end of the input signal, the output end of the second operational amplifier is electrically connected with the non-inverting input end of the third operational amplifier, and the inverting input end of the second operational amplifier and the output end of the third operational amplifier are both electrically connected with the adjusting module.
In another possible implementation of the first aspect, the compensation unit comprises a varactor.
In another possible embodiment of the first aspect, the capacitance value of the first variable capacitor ranges from 10 to 450 fF.
In another possible implementation manner of the first aspect, the continuous-time linear equalization circuit further includes a control module;
the control module is electrically connected with the adjusting module;
the control module is configured to receive a control signal and send the control signal to the adjusting module.
In a second aspect, the present application provides a wideband receiver including the continuous-time linear equalization circuit.
Compared with the prior art, the embodiment of the application has the advantages that: the adjusting module of the continuous time linear equalization circuit directly adjusts the frequency peak value of the input signal according to the external control signal, so that high-frequency attenuation in a signal transmission channel is compensated, the direct current gain of the input signal cannot be changed, and the signal amplification effect is guaranteed.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic diagram of a first structure of a continuous-time linear equalizer circuit according to an embodiment of the present application;
fig. 2 is a schematic diagram of a second structure of a continuous-time linear equalizer circuit according to an embodiment of the present application;
fig. 3 is a first circuit diagram of a continuous-time linear equalizer circuit according to an embodiment of the present application;
fig. 4 is a second circuit diagram of a continuous-time linear equalizer circuit according to an embodiment of the present application;
fig. 5 is a schematic diagram illustrating a third structure of a continuous-time linear equalizer circuit according to an embodiment of the present application;
fig. 6 is a frequency peak variation diagram of a continuous-time linear equalization circuit according to an embodiment of the present application.
Description of the reference numerals:
the device comprises an amplifying module 1, an adjusting module 2, a negative feedback unit 21, a compensation unit 22 and a control module 3.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Fig. 1 is a first structural schematic diagram of a continuous-time linear equalization circuit according to an embodiment of the present disclosure, and as shown in fig. 1, the continuous-time linear equalization circuit 100 may include an eleventh resistor R11, a twelfth resistor R12, a first MOS transistor Q1, a second MOS transistor Q2, an eleventh variable capacitor C11, and a thirteenth variable resistor R13.
One end of an eleventh resistor R11 and one end of a twelfth resistor R12 are both connected with a power supply, the other end of the eleventh resistor R11 is electrically connected with the positive electrode of the signal output end and one end of a first MOS transistor Q1, the grid electrode of the first MOS transistor Q1 is electrically connected with the negative electrode of the signal input end, and the other end of the first MOS transistor Q1 is electrically connected with one end of an eleventh variable capacitor C11 and one end of a thirteenth variable resistor R13; the other end of the twelfth resistor R12 is electrically connected with the negative electrode of the signal output end and one end of the second MOS tube Q2, the grid electrode of the second MOS tube Q2 is electrically connected with the positive electrode of the signal input end, and the other end of the second MOS tube Q2 is electrically connected with the other end of the eleventh variable capacitor C11 and the other end of the thirteenth variable resistor R13.
In application, the continuous time linear equalization circuit generally obtains a high frequency peak value by changing the capacitance value of a variable capacitor or the resistance value of a variable resistor in the circuit, but the direct current gain is reduced, and the signal amplification effect is influenced.
A further implementation of the continuous-time linear equalization circuit is: the input signal is divided into two paths, namely a low-frequency signal path and a high-frequency gain path, and then the direct current gain and the peak frequency are controlled according to the difference between the low-frequency signal path and the high-frequency gain path, so that the continuous time linear equalization function is achieved, but the direct current gain is changed, and the signal amplification effect is influenced.
Therefore, the application provides a continuous time linear equalization circuit, which combines the adjusting module of the frequency peak value to the amplifying module, so that the frequency peak value of the input signal is adjusted while the amplifying process of the input signal is adjusted, the high-frequency attenuation in the signal transmission process is compensated, the direct current gain is not influenced, and the signal amplifying effect is guaranteed.
The continuous-time linear equalization circuit provided by the present application is described in an exemplary manner with reference to the accompanying drawings: fig. 2 is a second schematic structural diagram of a continuous-time linear equalizer circuit according to an embodiment of the present application, and as shown in fig. 2, for convenience of description, only parts related to the embodiment are shown, and detailed descriptions are as follows: illustratively, the continuous-time linear equalization circuit 200 of the present application includes an amplification block 1 and a regulation block 2;
the adjusting module 2 is electrically connected with the amplifying module 1;
the device comprises an amplification module 1, a signal processing module and a signal processing module, wherein the amplification module is configured to amplify an input signal to obtain an output signal;
and the adjusting module 2 is configured to adjust the voltage of the input signal according to the voltage of the output signal and the preset transfer function, and adjust the frequency peak value of the input signal according to the external control signal and the preset transfer function.
In application, an amplifying module exists in a general signal transmission circuit, an input signal is amplified to obtain an output signal, and the adjusting module is integrated in the amplifying module, so that the frequency peak value of the input signal is directly adjusted while the voltage amplifying process of the input signal is adjusted, the high-frequency attenuation in the signal transmission process is compensated, and the direct-current gain of the input signal is not influenced.
Fig. 3 is a first circuit diagram of a continuous-time linear equalization circuit provided in an embodiment of the present application, and as shown in fig. 3, the adjusting module 2 illustratively includes a negative feedback unit 21 and a compensation unit 22;
the negative feedback unit 21 is electrically connected with the amplifying module 1 and the compensation unit 22;
a negative feedback unit 21 configured to lower a voltage of the input signal according to a voltage of the output signal and a preset transfer function;
a compensation unit 22 configured to compensate for a frequency peak of the input signal according to the external control signal and a preset transfer function.
In application, negative feedback regulation in a signal amplification process is realized through the negative feedback unit, so that an output signal is stable, and meanwhile, the bandwidth of signal transmission is expanded. The compensation unit compensates the frequency peak value of the input signal according to the external control signal and the preset transfer function, compensates high-frequency attenuation in the signal transmission process, reduces intersymbol interference, and effectively improves the performance of the eye pattern of the receiving end.
As shown in fig. 3, the negative feedback unit 21 illustratively includes a first resistor R1 and a second resistor R2;
one end of the first resistor R1 is electrically connected to the amplification block 1 and one end of the second resistor R2, the other end of the second resistor R2 is electrically connected to the amplification block 1, and the other end of the first resistor R1 is grounded.
In application, a negative feedback unit is formed by the first resistor and the second resistor to obtain a negative feedback transfer function, so that an input signal is adjusted according to an output signal and the negative feedback transfer function, the gain and the amplification factor of the amplification module are reduced, the overall stability of the circuit is improved, the passband is widened, and the nonlinear distortion and the noise are reduced.
As shown in fig. 3, the compensation unit 22 illustratively includes a first variable capacitor C1;
one end of the first variable capacitor C1 is electrically connected to the common connection end of the first resistor R1 and the second resistor R2, and the other end of the first variable capacitor C1 is electrically connected to the amplification module 1.
In application, the first variable capacitor is connected in parallel with the second resistor in the negative feedback unit, so that the output value of the preset transfer function is changed by changing the capacitance value of the first variable capacitor, the frequency peak value of the input signal is adjusted, and high-frequency attenuation in a signal transmission channel is compensated.
In application, the predetermined transfer function is
Wherein, K is R1/(R1+ R2), tauZ＝C1*R2,τP＝K*τZThe resistance values of the first resistor R1 and the second resistor R2 are fixed values, so that the output value of the predetermined transfer function is mainly determined by the first variable capacitor, the frequency peak value of the input signal is adjusted, and the high-frequency attenuation in the signal transmission channel is compensated.
As shown in fig. 3, the amplification block 1 illustratively includes a first operational amplifier a 1(s);
the non-inverting input terminal of the first operational amplifier a1(s) is the input terminal of the input signal, and the inverting input terminal of the first operational amplifier a1(s) and the output terminal of the first operational amplifier a1(s) are both electrically connected to the adjusting module 2.
In an application, the amplifying block may comprise only a bipolar first operational amplifier, the first operational amplifier comprises two poles, the frequencies of the two poles are ω 1 and ω 1, respectively, and the gain of the operational amplifier is calculated by the formula
Wherein A is0Is the initial gain.
Meanwhile, the whole transfer function of the continuous time linear equalization circuit is
Namely, the input signal of the continuous time linear equalization circuit is jointly determined by a gain calculation formula, a preset transfer function and an output signal.
That is, in the present application, the first amplifier may be used to amplify an input signal, the first resistor and the second resistor form a negative feedback unit to reduce the gain of the first operational amplifier, so as to increase the bandwidth of the whole circuit, the first variable capacitor is connected in parallel with the second resistor in the negative feedback unit, so that two poles of the first operational amplifier and the negative feedback unit are combined into a pole negative feedback system, which has a continuous time linear equalization function, and the phase is introduced by selecting the capacitance value of the first variable capacitor, so as to adjust the frequency peak of the input signal, thereby compensating the high frequency attenuation in the transmission channel.
Fig. 4 is a second circuit diagram of a continuous-time linear equalizer circuit provided in the embodiment of the present application, and as shown in fig. 4, the amplifying module 1 exemplarily includes a second operational amplifier a2(s) and a third operational amplifier A3(s);
the non-inverting input terminal of the second operational amplifier a2(s) is the input terminal of the input signal, the output terminal of the second operational amplifier a2(s) is electrically connected to the non-inverting input terminal of the third operational amplifier A3(s), and the inverting input terminal of the second operational amplifier a2(s) and the output terminal of the third operational amplifier A3(s) are both electrically connected to the adjusting module 2.
In application, the amplification module can comprise a second operational amplifier with a single pole and a third operational amplifier with a single pole to form a two-stage amplifier, the purpose of amplifying signals is achieved through the two-stage operational amplifier, meanwhile, because the existing broadband receiver is generally provided with the two-stage amplifier, the two-stage amplifier in the existing broadband receiver can be directly improved to obtain the broadband receiver, the frequency peak value of input signals can be adjusted, high-frequency attenuation in a transmission channel is compensated, direct current gain of the input signals is not changed, the signal amplification effect is guaranteed, meanwhile, the cost and the size of the whole circuit are reduced, and the better signal compensation effect is achieved with lower cost.
Illustratively, the compensation unit 22 may include a varactor diode.
In application, the capacitance value of the compensation unit can be easily adjusted through the variable capacitance diode controlled by voltage, so that the frequency peak value of an input signal is compensated, and high-frequency attenuation in a signal transmission channel is compensated. Meanwhile, the capacitance value change of the first variable capacitor can be continuously adjusted through software, and can be manually set by a user, and the user can select a proper adjusting mode according to the time requirement.
As shown in fig. 4, the first variable capacitor C1 has a capacitance value in the range of 10-450fF, for example.
In application, the capacitance value range of the first variable capacitor can be directly adjusted by an external control signal according to the needs of an actual circuit, for example, the capacitance value of the first variable capacitor can be adjusted within 10-450fF, so that the frequency peak value of an input signal is adjusted to a proper position, high-frequency attenuation is compensated, the bandwidth is expanded, and the stability of the whole circuit is improved.
Fig. 5 is a schematic diagram of a third structure of a continuous-time linear equalization circuit according to an embodiment of the present application, and as shown in fig. 5, the continuous-time linear equalization circuit 300 further includes a control module 3;
the control module 3 is electrically connected with the adjusting module 2;
and the control module 3 is configured to receive the control signal and send the control signal to the adjusting module 2.
In application, since the high frequency attenuation in the fixed transmission channel is generally fixed, the control signal of the control module to the adjusting module is also generally fixed, so that the adjustment of the frequency peak value of the input signal by the adjusting module is also fixed, and the frequency peak value suitable for the application circuit is continuously obtained. When the continuous time linear equalization circuit is applied to different circuits, the control signal is correspondingly adjusted according to the actual circuit so as to obtain the frequency peak value corresponding to the input signal.
The control module may be implemented by any device having a data Processing function, for example, a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, a discrete hardware component, and the like. The general purpose processor may be a microprocessor (e.g., a microprocessing Unit (MCU)), or the processor may be any conventional processor, etc.
Fig. 6 is a frequency peak variation diagram of the continuous-time linear equalization circuit according to the embodiment of the present application, and as shown in fig. 6, input signals with different intensities are obtained by changing the capacitance value of the first variable capacitor. With the decreasing capacitance value of the first variable capacitor, the signal strength of the input signal is increased, i.e. the frequency peak value is increased.
For example, when the capacitance value of the first variable capacitor is 8.04e-13F, the frequency peak value of the input signal is the lowest, and when the capacitance value of the first variable capacitor is 6.08e-13F, the frequency peak value of the input signal is increased; when the capacitance value of the first variable capacitor is 4.12e-13F, the frequency peak value of the input signal is increased; when the capacitance value of the first variable capacitor is 2.16e-13F, the frequency peak value of the input signal is increased; when the capacitance value of the capacitor is 2e-14F, the frequency peak value of the input signal is the highest, so that the capacitance value of the first variable capacitor and the frequency peak value of the input signal form a negative correlation relationship, and the lower the capacitance value of the first variable capacitor, the higher the frequency peak value of the input signal is, so that the aim of adjusting the frequency peak value of the input signal by adjusting the capacitance value of the first variable capacitor and compensating high-frequency attenuation in a signal transmission channel is fulfilled.
The present embodiment discloses a wideband receiver including a continuous-time linear equalization circuit 100.
In application, the continuous time linear equalization circuit is arranged inside the broadband receiver, the voltage of an input signal is amplified through the amplification module to obtain the voltage of the output signal, the voltage of the input signal is adjusted through the adjustment module according to the voltage of the output signal and a preset transfer function, and the frequency peak value of the input signal is adjusted according to an external control signal and the preset transfer function, so that high-frequency attenuation in a signal transmission channel of the broadband receiver is compensated, the direct current gain of the input signal cannot be changed, the signal amplification effect of the broadband receiver is guaranteed, meanwhile, the stability is improved, and the bandwidth is expanded.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules, so as to perform all or part of the functions described above. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the elements of the examples described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed uninterruptible power supply parallel redundancy system and method may be implemented in other ways. For example, the ups parallel redundancy system embodiments described above are merely illustrative, and for example, a division of modules or units is merely a logical division, and in practice, there may be other divisions, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (10)
1. A continuous time linear equalization circuit is characterized by comprising an amplifying module and an adjusting module;
the adjusting module is electrically connected with the amplifying module;
the amplifying module is configured to amplify an input signal to obtain an output signal;
the adjusting module is configured to adjust the voltage of the input signal according to the voltage of the output signal and a preset transfer function, and adjust the frequency peak of the input signal according to an external control signal and the preset transfer function.
2. The continuous-time linear equalization circuit of claim 1, wherein the adjustment module includes a negative feedback unit and a compensation unit;
the negative feedback unit is electrically connected with the amplifying module and the compensating unit;
the negative feedback unit is configured to reduce the voltage of the input signal according to the voltage of the output signal and a preset transfer function;
the compensation unit is configured to compensate a frequency peak of the input signal according to the external control signal and a preset transfer function.
3. The continuous-time linear equalization circuit of claim 2, wherein said negative feedback unit comprises a first resistor and a second resistor;
one end of the first resistor is electrically connected with the amplifying module and one end of the second resistor, the other end of the second resistor is electrically connected with the amplifying module, and the other end of the first resistor is grounded.
4. The continuous-time linear equalization circuit of claim 3, wherein the compensation unit includes a first variable capacitance;
one end of the first variable capacitor is electrically connected with the common connecting end of the first resistor and the second resistor, and the other end of the first variable capacitor is electrically connected with the amplifying module.
5. The continuous-time linear equalization circuit of any of claims 1-4, wherein the amplification module comprises a first operational amplifier;
the non-inverting input end of the first operational amplifier is the input end of the input signal, and the inverting input end of the first operational amplifier and the output end of the first operational amplifier are both electrically connected with the adjusting module.
6. The continuous-time linear equalization circuit of any of claims 1-4, wherein the amplification module comprises a second operational amplifier and a third operational amplifier;
the non-inverting input end of the second operational amplifier is the input end of the input signal, the output end of the second operational amplifier is electrically connected with the non-inverting input end of the third operational amplifier, and the inverting input end of the second operational amplifier and the output end of the third operational amplifier are both electrically connected with the adjusting module.
7. The continuous-time linear equalization circuit of claim 2, wherein the compensation cell comprises a varactor.
8. The continuous-time linear equalization circuit of claim 4, wherein the first variable capacitance has a capacitance value in the range of 10-450 fF.
9. The continuous-time linear equalization circuit of any of claims 1-4, wherein the continuous-time linear equalization circuit further comprises a control module;
the control module is electrically connected with the adjusting module;
the control module is configured to receive a control signal and send the control signal to the adjusting module.
10. A wideband receiver comprising a continuous-time linear equalization circuit as claimed in any one of claims 1-9.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116633314A (en) * | 2023-07-26 | 2023-08-22 | 厦门优迅高速芯片有限公司 | Self-adaptive continuous time linear equalization circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116633314A (en) * | 2023-07-26 | 2023-08-22 | 厦门优迅高速芯片有限公司 | Self-adaptive continuous time linear equalization circuit |
| CN116633314B (en) * | 2023-07-26 | 2023-10-10 | 厦门优迅高速芯片有限公司 | Self-adaptive continuous time linear equalization circuit |
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