CN216718596U - Fault diagnosis device of mass spectrometer detector plate - Google Patents

Abstract

The utility model discloses a fault diagnosis device of a mass spectrometer detector plate, which comprises an STM32 main control chip, a power supply, an LM258N detection circuit, a CD40106 detection circuit, an OP07 detection circuit, an INA105 detection circuit and a DAC0832 detection circuit, wherein the STM32 main control chip is connected with the power supply through the power supply; the I/O port of the STM32 main control chip is used for communicating with a DAC0832 chip; and comparing the voltage value acquired by the STM32 main control chip with the input voltage, and performing fault diagnosis on whether an LM258N chip, a CD40106 chip, an OP07 chip and an INA105 chip on the detector board are damaged or not. The utility model solves the problem that the detector plate can not locate the fault reason, can efficiently and accurately find the fault reason, and is reliably applied in the actual engineering.

Description

Fault diagnosis device of mass spectrometer detector plate

Technical Field

The utility model belongs to the technical field of electronic equipment, relates to structural improvement of a mass spectrometer chip detection circuit, and particularly relates to a fault diagnosis device of a mass spectrometer detector plate.

Background

The ICP-MSX2 mass spectrometer is manufactured by seimer femtolier technologies, usa. The detector plate is a component which is used for detecting ion signals in an ICP-MSX2 mass spectrometer and outputting electric signals after being processed by an upper computer. The mass spectrometer is widely applied in the fields of life science, environmental science and the like, but the mass spectrometer frequently fails in use due to long production time.

As is known from initial failure diagnosis, one of the main causes of failure of the mass spectrometer is failure of the detector plate, and therefore, it is important to deal with the failure of the detector plate.

Mass spectrometers are generally expensive, mass spectrometers imported in the market are all over millions, and the failure rate of a detector plate in the spectrometer is high, so that the failure handling of the mass spectrometer is widely required in actual maintenance and repair. The traditional fault processing method of the mass spectrometer is to directly replace a new detector plate, which needs higher cost, causes serious resource waste, and does not fundamentally find out the fault reason of the detector plate.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a fault diagnosis device of a mass spectrometer detector plate, which is used for solving the problems in the prior art, and the fault reason is positioned through a main chip on the detector plate, so that the fault diagnosis accuracy of the detector plate is improved, and the availability of the detector plate is increased.

In order to realize the purpose of the utility model, the following technical scheme is adopted:

the fault diagnosis device of the mass spectrometer detector plate comprises an STM32 main control chip, a CAN bus part which is formed by an MCP2510 chip and a PCA82C250 chip, a power supply, and an LM258N detection circuit, an OP07 detection circuit, an INA105 detection circuit and a DAC0832 detection circuit which are respectively matched with an LM258N chip, an OP07 chip, an INA105 chip and a DAC0832 chip to be detected.

The DAC module of the STM32 main control chip is used for acquiring the voltage value of the output end of the LM258N chip, the voltage value of the output end of the OP07 chip, the voltage value of the output end of the INA105 chip and the voltage value of the channel conversion output voltage of the DAC0832 chip; the I/O port of the STM32 main control chip is used for communicating with a DAC0832 chip;

and comparing the voltage value acquired by the STM32 main control chip with the input voltage, and performing fault diagnosis on whether the LM258N chip, the OP07 chip and the INA105 chip on the detector board are damaged or not.

In order to further realize the purpose of the utility model, the following technical scheme can be adopted:

according to the fault diagnosis device of the mass spectrometer detector plate, the STM32 main control chip and the upper computer are in RS-232 serial communication and are used for transmitting and displaying the voltage value acquired by the DAC module to the upper computer.

According to the fault diagnosis device of the mass spectrometer detector plate, the OP07 detection circuit comprises an OP07 chip, resistors R2, R3, R4 and R6, capacitors C3 and C4, and test points T1, T2 and T3; the pin of the reverse input end of the OP07 chip is connected with the right end of a resistor R2, the pin of the forward input end of the OP07 chip is connected with the right end of a resistor R4, the output end of the OP07 chip is connected with a test point T2, the pin No. 4 is connected with the right end of a capacitor C3, the pin No. 7 is connected with the left end of a capacitor C4, and the pins No. 1 and No. 8 are suspended; the left end of the resistor R2 is grounded, the left end of the resistor R3 is connected with the right end of the resistor R2, the right end of the resistor R3 is connected with the test point T2, the left end of the resistor R4 is connected with a +5V power supply, the right end of the resistor R4 is connected with the left end of the resistor R6, and the right end of the resistor R6 is grounded; the left end of the capacitor C3 is grounded, and the right end of the capacitor C4 is grounded; test point T1 is connected to the left end of R6, test point T2 is connected to the output terminal, and test point T3 is connected to the right end of R6.

The fault diagnosis device for the mass spectrometer detector plate comprises a LM258N test circuit, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R13, a resistor R14, a capacitor R16, a capacitor C5, a LM258N (U2A) chip, a LM258N (U2B) chip, a T4 test point, a T5 test point, a T6 test point and a T7 test point; the reverse phase input end of the LM258N (U2A) chip is connected with the right side of R7, the positive direction input end of the LM258N chip is connected with the right end of R9, the output end of the LM258N chip is connected with a test point T5, the No. 8 pin of the LM258N chip is connected with a +5V power supply, and the No. 4 pin of the LM258N chip is grounded; the reverse phase input end of the LM258N (U2B) chip is connected with the right end of R13, the positive direction input end is connected with a test point T4, and the output end is connected with a test point T7; the left end of a resistor R7 is grounded, the left end of a resistor R8 is connected with the right end of a resistor R7, the right end of a resistor R8 is connected with a test point T5, the left end of R9 is connected with a +5V power supply, the left end of the resistor R10 is connected with a test point T5, the right end of the resistor R10 is grounded, the left end of the resistor R11 is connected with the right end of R9, the left end of R11 is grounded, the left end of a resistor R13 is grounded, the right end of the resistor R13 is connected with the left end of R14, the right end of R14 is connected with the left end of R16, and the right end of R16 is grounded; the right end of the capacitor C5 is grounded; test point T4 is connected with the left end of resistor R11, test point T5 is connected with the left end of R10, test point T6 is connected with the right end of resistor R10, and test point T7 is connected with the left end of resistor R16.

In the apparatus for diagnosing faults of a mass spectrometer detector plate, the INA105 detection circuit comprises resistors R17, R18 and R19, test points T8, T9 and T10, and capacitors C16 and C17; the voltage of the V + and V-pins of the INA105 chip is provided by a TMR3-2423 voltage conversion module, the V + pin of the voltage conversion module is connected with a +15V power supply and a-15V power supply, the IN1+ pin of the voltage conversion module is connected with the left end of a resistor R18, the IN-pin of the voltage conversion module is connected with the left end of R17, the REF pin of the voltage conversion module is connected with the left end of R17, the OUTPUT pin of the voltage conversion module is connected with the left end of a resistor R19, the SENSE pin of the voltage conversion module is connected with the left end of a resistor R19, and the NC pin of the voltage conversion module is suspended; the right end of the resistor R17 is connected with the left end of the resistor R18, the right end of the resistor R18 is connected with a +5V power supply, and the right end of the resistor R19 is grounded; the right end of the capacitor C16 is grounded, and the left end of the capacitor C17 is grounded; test point T8 is connected with the left end of resistor R18, test point T9 is connected with the left end of resistor R19, and test point T10 is connected with the right end of resistor R19.

According to the fault diagnosis device of the mass spectrometer detector plate, the CD40106 detection circuit comprises resistors R20 and R21, a capacitor C19, a single-pole double-throw switch SW-SPDT and test points T11, T12, T13, T14, T15 and T16; no. 1 pin of the chip CD40106 is connected with the right end of the R20, No. 2 pin is connected with the No. 3 pin in series, No. 4 pin is connected with the No. 5 pin in series, No. 6, No. 8, No. 9, No. 10, No. 11 and No. 13 pins are suspended, No. 12 pin is connected with the left end of the R21, and No. 14 pin is connected with the left end of the capacitor C19; the left end of the resistor R20 is connected with a No. 2 pin of the single-pole double-throw switch, and the right end of the resistor R21 is grounded; the right end of the capacitor C19 is grounded; the No. 1 pin of the single-pole double-throw switch SW-SPDT is connected with a +5V power supply, and the No. three pin of the single-pole double-throw switch SW-SPDT is grounded; test point T11 is connected to pin number 2 of chip CD40106, test point T11 is connected to pin number 2 of chip CD40106, test point T11 is connected to pin number 2 of chip CD40106, test point T12 is connected to pin number 13 of chip CD40106, test point T13 is connected to pin number 4 of chip CD40106, test point T14 is connected to pin number 6 of chip CD40106, test point T15 is connected to pin number 12 of chip CD40106, and test point T16 is connected to pin number 11 of chip CD 40106.

The apparatus for diagnosing faults of a mass spectrometer detector plate as described above, the DAC0832 detection circuit includes two level converters U, pins B, B and B of the level converters U are sequentially connected to the PC to PC port of the STM main control chip, pins a, a and a of the level converter 74LVC8T245 (U) are respectively connected to the DI to DI pins of the DAC0832 chip, pin RFB of the DAC0832 chip is connected to pin 6 of the OP07 chip, pin 2 of the OP07 chip is connected to pin IOUT of the DAC0832 chip, pin 3 of the OP07 chip is connected to the left of pin C, pin 7 of the OP07 chip is connected to the right of capacitor C, pin 4 of the OP07 chip is connected to the left of capacitor C, and the right of capacitor C is grounded.

According to the fault diagnosis device of the mass spectrometer detector board, the VCCA pin of the level converter is connected with the +5V power supply, the VCCB pin of the level converter is connected with the +3.3V power supply, and the DIR pin of the level converter is grounded.

The apparatus for diagnosing a fault of a mass spectrometer detector plate as described above, wherein the CAN bus portion is controlled by an STM32, and includes 74LVC8T245 chips U3 and U4, PCA82C250 chip IC1, IC3, MCP2510 chip IC2, IC4, resistors R11, R12, R15, capacitors C15, and C15, pin No. 1 of the IC 15 is connected to pin No. 20 of U15, pin No. 2 of IC 15 is connected to pin No. 19 of U15, pin No. 3 of IC 15 is connected to the right end of resistor R15, pin No. 4 to pin No. 6 of IC 15 is connected to pin No. 61, pin No. 62, pin No. 29 of STM 4, pin No. 7 and pin No. 8 of IC 15 are connected to external crystal oscillator, pin No. 9 is grounded, pin No. 10 of IC 15 to pin No. 12 of STM 4, pin No. 25, pin No. 13 to pin No. 13, pin of STM pin No. 13, No. 16 to pin of STM pin, No. 17, No. 16 pin of the IC 15, No. 17, No. 16, No. 17, No. 4 pin of the electrical circuit, pin 18 of IC2 is connected to the left end of capacitor C1. Pin 1 of the IC4 is connected with pin 21 of U4, pin 2 of the IC4 is connected with pin 20 of U3, pin 3 of the IC4 is connected with the right end of the resistor R15, pin 4 to pin 6 of the IC4 are respectively connected with pin 41, pin 42 and pin 43 of STM32, pin 7 and pin 8 of the IC4 are externally connected with a crystal oscillator, pin 9 is grounded, pin 10 to pin 12 of the IC4 are respectively connected with pin 10, pin 9 and pin 8 of STM32, pin 13 to pin 16 of the IC4 are respectively connected with pin 21, pin 23, pin 22 and pin 20 of STM32, pin 17 of the IC4 is connected with a reset circuit, and pin 18 of the IC2 is connected with the left end of the capacitor C11. Pin 1 of IC1 is connected to pin 5 of U3, pin 2 of IC1 is connected to ground, pin 3 is connected to +5V power supply, pin 4 of IC1 is connected to pin 4 of U4, pin 6 of IC1 is connected to pin 6 of IC3, pin 7 of IC1 is connected to pin 7 of IC4, and pin 8 of IC1 is connected to the left end of resistor R1. Pin No. 1 of IC3 is connected with pin No. 4 of U3, pin No. 2 of IC3 is grounded, pin No. 3 is connected with +5V power supply, pin No. 4 of IC3 is connected with pin No. 3 of U4, and pin No. 8 of IC3 is connected with the left end of resistor R12. Pin No. 2 of U3 is connected to the right end of capacitor C9, pin No. 9, pin No. 10, pin No. 11, pin No. 12, pin No. 13, and pin No. 14 are grounded, and pin No. 22, pin No. 23, and pin No. 24 are connected to the left end of capacitor C7. Pin 1 of U4 is connected to the right end of capacitor C8, pin 2, pin 11, pin 12, pin 13, and pin 22 are grounded, and pin 23 and pin 24 are connected to the left end of capacitor C10. The right end of the resistor R1 is grounded, the left end of the resistor R5 is connected with the +5V power supply, the right end of the resistor R12 is grounded, and the left end of the resistor R15 is connected with the +5V power supply. The right end of the capacitor C1 is grounded, the right end of the capacitor C11 is grounded, the left end of the capacitor C9 is grounded, the left end of the capacitor C8 is grounded, the right end of the capacitor C7 is grounded, and the right end of the capacitor C10 is grounded.

Compared with the prior art, the utility model has the advantages that:

the utility model can position the fault reason of the detector board through five main chips on the detector board, thereby making targeted fault processing work, and meanwhile, the fault diagnosis work efficiency and reliability are high; the maintenance cost is reduced, the maintenance efficiency is improved, and the resource waste is saved.

The fault diagnosis device mainly comprises an LM258N detection circuit, a CD40106 detection circuit, an OP07 detection circuit, an INA105 detection circuit, a DAC0832 detection circuit, an STM32 main control chip, an upper computer, a power supply and the like. Meanwhile, the fault diagnosis device can detect five types of chips simultaneously and can also detect one type of chip independently, and each detection circuit works independently and does not interfere with each other. When the device is used, the five types of chips to be detected are detached from the detector and are installed on the corresponding detection circuit, then the system circuit is electrified, the voltage values of the detection circuits are sequentially collected under the control of the STM32 main control chip, the collected voltage values are transmitted to the upper computer through the RS-232 serial port, detection information is sequentially displayed in the serial port debugging assistant, the collected actual voltage values are compared with the theoretical values, whether the detected chips are damaged or not can be judged, and therefore the fault reasons of the detector board are located.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below.

FIG. 1 is a functional block diagram of the present invention;

FIG. 2 is a schematic diagram of the OP07 detection circuit of FIG. 1;

FIG. 3 is a schematic diagram of the LM258N detection circuit of FIG. 1;

FIG. 4 is a schematic diagram of the INA105 detection circuit of FIG. 1;

FIG. 5 is a schematic diagram of the CD40106 detection circuit of FIG. 1;

fig. 6 is a schematic diagram of the DAC0832 detecting circuit in fig. 1.

Reference numerals: the chip comprises a 1-OP07 detection circuit, an 11-OP07 chip, a 2-LM258N detection circuit, a 21-LM258N chip, a 3-INA105 detection circuit, a 31-INA105 chip, a 4-CD40106 detection circuit, a 41-CD40106 chip, a 5-DAC0832 detection circuit, a 51-DAC0832 chip, a 6-STM32 main control chip, a 7-upper computer, an 8-power supply, a 9-first power supply converter and a 10-second power supply converter.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention.

As shown in fig. 1 to 6, the detector board fault diagnosis apparatus disclosed in this embodiment is mainly composed of an OP07 detection circuit 1, an LM258N detection circuit 2, an INA105 detection circuit 3, a CD40106 detection circuit 4, a DAC0832 detection circuit 5, an STM32 main control chip 6, and a power supply 8.

The detection circuits are respectively provided with mounting positions matched with an OP07 chip 11, an LM258N chip 21, an INA105 chip 31, a CD40106 chip 41 and a DAC083 chip 51 to be detected on the detector board.

The model of STM32 main control chip 6 is STM32F103RE, and operating voltage is 3.3V, and power 8 is STM32 main control chip 6 and this main control chip for each above-mentioned detection circuitry power supply. STM32 main control chip 6 has 1 12 DAC modules, 2 12 DAC modules and 6 general I/O mouth. The DAC module is used for collecting a voltage value at an output end of an OP07 chip 11, a voltage value at an output end of an LM258N chip 21, a voltage value at an output end of an INA105 chip 31, a voltage value at an output end of a CD40106 chip 41 and a DAC083 chip 51 channel conversion output voltage value; the general I/O port is used for outputting the control timing of the DAC0832 chip 51 and inputting the conversion voltage of the DAC0832 chip 51.

Meanwhile, in order to store and process voltage value data information of the output ends of the chips, the upper computer 7 is arranged in the embodiment, the upper computer 7 and the STM32 main control chip 6 are communicated through an RS-232 interface, and the upper computer 7 can be an intelligent terminal such as a desktop computer, a notebook computer and a cloud computer.

When fault diagnosis is carried out, five chips to be detected are detached from the detector plate and then are sequentially installed to chip installation positions corresponding to the fault diagnosis device; after the circuit of the fault diagnosis device is powered on, the STM32 main control chip 6 sequentially collects the voltage values of all detection circuits according to built-in logic steps, transmits the collected voltage values to the upper computer 7 through the RS-232 serial port, sequentially displays detection information in a serial port debugging assistant, compares the collected actual voltage values with theoretical values, and can judge whether the detected chip is damaged, thereby positioning the fault reason of the detector board.

The fault diagnosis device can detect five kinds of chips simultaneously, also can detect one kind of chip independently, and each detection circuit works independently and does not interfere with each other.

As shown in fig. 2, the OP07 detection circuit 1 of the present embodiment includes an OP07 chip, resistors R2, R3, R4, R6, capacitors C3, C4, and test points T1, T2, and T3; the ACPL-312T detection circuit 1 comprises resistors R1, R2, R3, R4, light emitting diodes DS1 and DS 2; two ends of a resistor R3 are respectively electrically connected with a pin No. 2 of a chip 11 of a test point T1 and an OP07, a pin No. 3 of the chip 11 of an OP07 is connected with a resistor R2 in series and then grounded, resistors R6 and R4 are connected in series, the other ends of the resistors R2 and R6 and the test point T3 are both grounded, one ends of capacitors C3 and C4 are respectively connected with a positive power supply and a negative 15V power supply, and the other ends of the capacitors are grounded. Pins 4 and 7 of the OP07 chip 11 are grounded respectively; test point T1 is connected with the right end of resistor R3, and test point T2 is connected with pin No. 6 of amplifier OP07 chip 11;

the OP07 chip 11 is a non-inverting amplifier, when the input voltage is +5V, the resistors R6 and R4 divide the input voltage of the 2 pin of the OP07 chip 11, the resistors R3 and R35 divide the voltages at the test point T1 and the test point T2, the voltage at the test point T1 is about +0.8V, the input voltage of the No. 2 pin of the OP07 chip 11 is +0.8V, the voltage of the positive input end of the amplifier is equal to the voltage input voltage of the negative input end, the current of the positive input end of the amplifier is equal to the voltage input current of the negative input end and equal to 0V, and the input voltage of the No. 2 pin of the OP07 chip 11 is-0.8V; when the OP07 chip is detected to work correctly, the OP07 chip to be detected is arranged on the locker, the multimeter is used for detecting the voltage value of the test point T2, when the detected voltage value is equal to-0.8V, the chip is normal, otherwise, the chip is damaged and needs to be replaced.

As shown in fig. 3, the LM258N detection circuit 2 of the present embodiment includes resistors R7, R8, R9, R10, R11, R13, R14, R16, a capacitor C5, an LM258N (U2A) chip 21, an LM258N (U2B) chip 22, and T4, T5, T6, and T7 test points; the reverse phase input end of the LM258N (U2A) chip 21 is connected with the right side of R7, the positive direction input end is connected with the right end of R9, and the output end is connected with a test point T5; the reverse phase input end of the LM258N (U2B) chip 22 is connected with the right end of R13, the positive direction input end is connected with a test point T4, and the output end is connected with a test point T7; the left end of a resistor R8 is connected with the right end of R7, the right end of R8 is connected with a test point T5, the left end of a resistor R10 is connected with a test point T5, the left end of a resistor R11 is connected with the right end of R9, the right end of R13 is connected with the left end of R14, and the right end of R14 is connected with the left end of R16; the right end of the capacitor C5 is grounded; test point T4 is connected with the left end of resistor R11, test point T5 is connected with the left end of R10, test point T6 is connected with the right end of resistor R10, and test point T7 is connected with the left end of resistor R16. No. 8 pin, R9 left end and R16 right end of LM258N (U2A) chip 21 connect +5V power, No. 4 pin ground connection, LM258N (U2B) chip 22, resistance R7 left end, R10 right end, R11 left end, resistance R13 left end ground connection.

The LM258N is a high gain operational amplifier, and the LM258N chip 21 to be tested is mounted on the test circuit. The LM258N detection circuit 3 is connected IN series with a voltage follower between the IN1+ and IN2+ pins of the LM258N chip 21 and one ADC module of the STM32 main control chip 6.

The input voltage of the pin No. 3 of the LM258N (U2A) chip 21 is divided by resistors R9 and R10, the output voltage of the pin No. 1 of the LM258N (U2A) chip 21 is divided by resistors R7 and R8, and the output voltage of the pin No. 7 of the LM258N (U2B) chip 22 is divided by resistors R13 and R14; the voltage at the test point T4 is about +0.8V, the input voltage of pin No. 3 of the LM258N (U2A) chip 21 is +0.8V, the voltage at the positive input terminal through the amplifier is equal to the voltage input voltage at the negative input terminal, the current at the positive input terminal through the amplifier is equal to the voltage input current at the negative input terminal and is equal to 0V, and the output voltage of pin No. 1 of the LM258N (U2A) chip 21 is + 1.6V; when the LM258N (U2A) chip 21 can work correctly, the LM258N (U2A) chip 21 to be detected is installed on the locker, the voltage value of the test point T5 is detected by using a universal meter, when the detected voltage value is equal to +1.6V, the chip is normal, otherwise, the chip is damaged and needs to be replaced.

As shown in fig. 3, the detection method of the LM258N (U2B) chip 22 in the LM258N detection circuit of the present embodiment is the same as that of the LM258N (U2A) chip 21, and when detecting whether the LM258N (U2B) chip 22 can work correctly, the LM258Nn (U2B) chip 22 to be detected is mounted on the locker, and the voltage value of the test point T5 is detected by using a multimeter, and when the detected voltage value is equal to +1.6V, the chip is normal, otherwise, the chip needs to be replaced if it is damaged, which is not described herein again.

As shown in fig. 4, the INA105 detection circuit 3 of the present embodiment includes resistors R17, R18, R19, test points T8, T9, T10, and capacitors C16, C17; the voltage of the V + and V-pins of the INA105 chip 31 is provided by a TMR3-2423 voltage conversion module, the V + pin +15V power supply and the V-pin are connected with a-15V power supply, the IN1+ pin is connected with the left end of a resistor R18, the IN-pin is connected with the left end of R17, the REF pin is connected with the left end of R17, the OUTPUT pin is connected with the left end of a resistor R19, the SENSE pin is connected with the left end of the resistor R19, and the NC pin is suspended; the right end of the resistor R17 is connected with the left end of the resistor R18, the right end of the resistor R18 is connected with a +5V power supply, and the right end of the resistor R19 is grounded; the right end of the capacitor C16 is grounded, and the left end of the capacitor C17 is grounded; test point T8 is connected with the left end of resistor R18, test point T9 is connected with the left end of resistor R19, and test point T10 is connected with the right end of resistor R19.

The INA105 is a precision differential operational amplifier, and the INA105 chip 31 to be tested is mounted to the test circuit. When the input voltage is +5V, the resistors R17 and R18 divide the voltage, the voltage at pin 3 of the INA105 chip 31 is about +0.8V, the voltage at pin 2 of the INA105 chip 31 is 0V, and the voltage value at pin OUTPUT of the INA105 chip 31 is equal to the voltage value at pin + IN minus the voltage value at pin-IN, i.e., the voltage value at pin OUTPUT of the INA105 chip 31 is equal to 0.8V. When detecting whether the INA105 chip 31 can work correctly, the INA105 chip 31 to be detected is arranged on the locker, the voltage value of the test point T9 is detected by using a universal meter, when the detected voltage value is equal to +0.8V, the chip is normal, otherwise, the chip is damaged and needs to be replaced.

As shown in fig. 5, the CD40106 detection circuit 4 of this embodiment includes resistors R20 and R21, a capacitor C19, a single-pole double-throw switch SW-SPDT, and test points T11, T12, T13, T14, T15, and T16; no. 1 pin of the CD40106 chip 41 is connected with the right end of the R20, No. 2 pin is connected with No. 3 pin in series, No. 4 pin is connected with No. 5 pin in series, No. 6, No. 8, No. 9, No. 10, No. 11 and No. 13 pins are suspended, No. 12 pin is connected with the left end of the R21, and No. 14 pin is connected with the left end of the capacitor C19; the left end of the resistor R20 is connected with the No. 2 pin of the single-pole double-throw switch, and the right end of the resistor R21 is grounded; the right end of the capacitor C19 is grounded; the No. 1 pin of the single-pole double-throw switch SW-SPDT is connected with a +5V power supply, and the No. three pin of the single-pole double-throw switch SW-SPDT is grounded; test point T11 connects pin number 2 of CD40106 chip 41, test point T11 connects pin number 2 of CD40106 chip 41, test point T11 connects pin number 2 of CD40106 chip 41, test point T12 connects pin number 13 of CD40106 chip 41, test point T13 connects pin number 4 of CD40106 chip 41, test point T14 connects pin number 6 of CD40106 chip 41, test point T15 connects pin number 12 of chip CD40106, and test point T16 connects pin number 11 of CD40106 chip 41. A pin A of the CD40106 chip 41 is connected in series with a pin B, the pin B is connected in series with a pin C, and the pin C, the pin F, the pin E, the pin D and the pin D are suspended.

The CD40106 is an inverter composed of six schmitt trigger circuits, and the CD40106 chip 41 to be detected is mounted on the detection circuit. When the input voltage is +5V, i.e., high level, the pin a of the CD40106 chip 41 is high level, the pin a is low level, the pin B is high level, the pin C is low level, and the pin D, the pin E, and the pin F are low level. When detecting whether the CD40106 chip 41 can work correctly, the CD40106 chip 41 to be detected is arranged on a locker, a single-pole double-throw switch is connected with a +5V power supply, the universal meter is used for detecting the voltage values of a test point T11, a test point T12, a test point T13, a test point T14, a test point T15 and a test point T16, when the detected voltage values are respectively a high level, a low level, a high level, a low level and a low level, the chip is normal, otherwise, the chip needs to be replaced when the chip is broken. If the single-pole double-throw switch is grounded, a universal meter is used for detecting the voltage values of the test point T11, the test point T12, the test point T13, the test point T14, the test point T15 and the test point T16, when the detected voltage values are respectively low level, high level, low level and low level, the chip is normal, otherwise, the chip needs to be replaced when the chip is damaged.

As shown in fig. 6, DAC0838 detecting circuit 6 in this embodiment includes two level shifters U6, pins B1, B2, B3 and B3 of level shifter 9 are connected to ports PC 3 to PC 3 of STM3 main control chip in turn, pins a3, a3 and a3 of level shifter 9 are connected to pins DI 3 to DI 3 of said DAC0832 chip 51, pins VCCA and VCCB of level shifter 9 are connected to pins +5V and +3.3V, respectively, pin DIR is connected to ground, pin RFB of said DAC0832 chip 51 is connected to pin No. 6 of OP07 3 chip, pin No. 2 of said OP 3 chip is connected to pin IOUT 3 of DAC 2 chip, pin No. 3 of said OP 3 chip is connected to pin C3 of said OP number 0834 chip, and pin C6857 of said capacitor C68507 is connected to the left of said chip 3 and the left pin of said chip 68507.

DAC0838 chip 51 is an eight channel D/a converter. A DAC0838 chip 51 to be tested is mounted onto the detection circuit. The input voltages of the eight channels are the same, under the control of CS, CLK, SE and DI time sequences, the DAC0838 chip 51 sequentially converts the input voltages of the eight channels, transmits the converted analog voltage signals to the STM32 main control chip, transmits the analog voltage signals to the upper computer 7 through an RS-232 serial port, and displays the voltage values in a serial port debugging assistant.

Since the working voltage of the DAC0838 chip 51 is 5V and the working voltage of the STM32 main control chip is 3.3V, the level converter 9 is required. The level shifters of this embodiment all use 74LVC8T245 chips, are 8-bit dual-power switching transceivers, have a bidirectional level shifting function, and have two data input and output ports, i.e., pins An and BN; a direction control input DIR pin and dual power supply pins VCCA and VCCB. Pins An and DIR refer to VCCA levels and pin BN refers to VCCB levels.

When DIR inputs low level, pin BN is used as input end, An is output end, AN is BN; when DIR inputs high level, pin An is used as input end, BN is output end, BN is AN. In the first chip 74LVC8T245, DIR is connected to a high level, and the control timing CS, CLK, SE, DI of 3.3V output by the STM32 main control chip is converted into a control timing of 5V, and input to the corresponding pin of the ADC0838 chip. In the second chip 74LVC8T245, DIR is turned low, and the digital value conversion result DO with 5V high level output by DAC0838 chip and the status bit SARS are converted into 3.3V level and transmitted to the corresponding pin of STM32, so that the level conversion between STM32 and DAC0838 chip 51 is completed.

The input voltage of eight channels of DAC0838 chip is compared with the voltage value of collecting or transmitting host computer 7 through STM32 main control chip after the conversion, and through adjusting the resistance of variable resistance R23, and then change DAC0838 chip 51's input voltage size, obtain multiunit measured data, improve the accuracy of detection. If the voltage values are the same, judging that the DAC0838 chip 51 works normally; if the voltage value deviation is too large, the DAC0838 chip 51 is damaged.

The STM32 chip is used as a main control chip to diagnose the faults of the chips. When the detector board breaks down, the fault diagnosis device is used for collecting output voltage parameters of each chip in each detection circuit or judging whether the chip is damaged according to a detection result displayed on the upper computer 7, so that the fault reason of the XPSI board is positioned.

And after the fault chip is diagnosed, replacing the damaged chip with the chip which normally works, and finishing the fault processing work of the detector plate. And (4) installing the processed detector plate on a mass spectrometer, electrically detecting whether the mass spectrometer normally works, and detecting whether the fault diagnosis work of the mass spectrometer plate is successful. The utility model solves the problem that the detector plate can not locate the fault reason, can efficiently and accurately find the fault reason, and is reliably applied in the actual engineering.

The technical contents not described in detail in the present invention are all known techniques.

Claims (7)

1. A failure diagnosis device of a mass spectrometer detector plate is characterized by comprising an STM32 main control chip, a CAN bus part consisting of an MCP2510 chip and a PCA82C250 chip, a power supply, an LM258N detection circuit, a CD40106 detection circuit, an INA105 detection circuit, an OP07 detection circuit, an INA105 detection circuit and a DAC0832 detection circuit, wherein the LM258N detection circuit, the CD40106 detection circuit, the OP07 detection circuit, the INA105 detection circuit and the DAC0832 detection circuit are respectively matched with an LM258N chip, a CD40106 chip, an OP07 chip, an INA105 chip and a DAC0832 chip to be detected;

the DAC module of the STM32 main control chip is used for collecting the voltage value of the output end of the LM258N chip, the voltage value of the output end of the CD40106 chip, the voltage value of the output end of the OP07 chip, the voltage value of the output end of the INA105 chip and the voltage value of the conversion output of a DAC0832 chip channel; the I/O port of the STM32 main control chip is used for communicating with a DAC0832 chip;

the STM32 main control chip is used for comparing the voltage value who gathers with input voltage to whether damage to LM258N chip, CD40106 chip, OP07 chip, INA105 chip on the detector board carries out fault diagnosis respectively.

2. The device for diagnosing the faults of the mass spectrometer detector plate as claimed in claim 1, wherein the STM32 main control chip is in serial communication with an upper computer by RS-232 and is used for transmitting and displaying the voltage values acquired by the DAC module to the upper computer.

3. The apparatus of claim 1, wherein the OP07 detection circuit comprises an OP07 chip, resistors R2, R3, R4, R6, capacitors C3, C4, and test points T1, T2, T3; the pin of the reverse input end of the OP07 chip is connected with the right end of a resistor R2, the pin of the forward input end of the OP07 chip is connected with the right end of a resistor R4, the output end of the OP07 chip is connected with a test point T2, the pin No. 4 is connected with the right end of a capacitor C3, the pin No. 7 is connected with the left end of a capacitor C4, and the pins No. 1 and No. 8 are suspended; the left end of the resistor R2 is grounded, the left end of the resistor R3 is connected with the right end of the resistor R2, the right end of the resistor R3 is connected with the test point T2, the left end of the resistor R4 is connected with a +5V power supply, the right end of the resistor R4 is connected with the left end of the resistor R6, and the right end of the resistor R6 is grounded; the left end of the capacitor C3 is grounded, and the right end of the capacitor C4 is grounded; test point T1 is connected to the left end of R6, test point T2 is connected to the output terminal, and test point T3 is connected to the right end of R6.

4. The apparatus of claim 1, wherein the LM258N test circuit comprises resistors R7, R8, R9, R10, R11, R13, R14, R16, capacitors C5, LM258N (U2A) chip, LM258N (U2B) chip, and T4, T5, T6, T7 test points; the reverse phase input end of the LM258N (U2A) chip is connected with the right side of R7, the positive direction input end of the LM258N chip is connected with the right end of R9, the output end of the LM258N chip is connected with a test point T5, the No. 8 pin of the LM258N chip is connected with a +5V power supply, and the No. 4 pin of the LM258N chip is grounded; the reverse phase input end of the LM258N (U2B) chip is connected with the right end of R13, the positive direction input end is connected with a test point T4, and the output end is connected with a test point T7; the left end of a resistor R7 is grounded, the left end of a resistor R8 is connected with the right end of a resistor R7, the right end of a resistor R8 is connected with a test point T5, the left end of R9 is connected with a +5V power supply, the left end of the resistor R10 is connected with a test point T5, the right end of the resistor R10 is grounded, the left end of the resistor R11 is connected with the right end of R9, the left end of R11 is grounded, the left end of a resistor R13 is grounded, the right end of the resistor R13 is connected with the left end of R14, the right end of R14 is connected with the left end of R16, and the right end of R16 is grounded; the right end of the capacitor C5 is grounded; test point T4 is connected with the left end of resistor R11, test point T5 is connected with the left end of R10, test point T6 is connected with the right end of resistor R10, and test point T7 is connected with the left end of resistor R16.

5. The mass spectrometer detector plate fault diagnosis device of claim 1, wherein the INA105 detection circuit comprises resistors R17, R18, R19, test points T8, T9, T10, and capacitors C16, C17; the voltage of the V + and V-pins of the INA105 chip is provided by a TMR3-2423 voltage conversion module, the V + pin of the voltage conversion module is connected with a +15V power supply and a-15V power supply, the IN1+ pin of the voltage conversion module is connected with the left end of a resistor R18, the IN-pin of the voltage conversion module is connected with the left end of R17, the REF pin of the voltage conversion module is connected with the left end of R17, the OUTPUT pin of the voltage conversion module is connected with the left end of a resistor R19, the SENSE pin of the voltage conversion module is connected with the left end of a resistor R19, and the NC pin of the voltage conversion module is suspended; the right end of the resistor R17 is connected with the left end of the resistor R18, the right end of the resistor R18 is connected with a +5V power supply, and the right end of the resistor R19 is grounded; the right end of the capacitor C16 is grounded, and the left end of the capacitor C17 is grounded; test point T8 is connected with the left end of resistor R18, test point T9 is connected with the left end of resistor R19, and test point T10 is connected with the right end of resistor R19.

6. The mass spectrometer detector plate fault diagnosis device of claim 1, wherein the CD40106 detection circuit comprises resistors R20, R21, a capacitor C19, a single-pole double-throw switch SW-SPDT, and test points T11, T12, T13, T14, T15, T16; pin 1 of the chip CD40106 is connected with the right end of the R20, pin 2 is connected with pin 3 in series, pin 4 is connected with pin 5 in series, pins 6, 8, 9, 10, 11 and 13 are suspended, pin 12 is connected with the left end of the R21, and pin 14 is connected with the left end of the capacitor C19; the left end of the resistor R20 is connected with the No. 2 pin of the single-pole double-throw switch, and the right end of the resistor R21 is grounded; the right end of the capacitor C19 is grounded; the 1 st pin of the single-pole double-throw switch SW-SPDT is connected with a +5V power supply, and the third pin of the single-pole double-throw switch SW-SPDT is grounded; test point T11 connects pin number 2 of chip CD40106, test point T11 connects pin number 2 of chip CD40106, test point T11 connects pin number 2 of chip CD40106, test point T12 connects pin number 13 of chip CD40106, test point T13 connects pin number 4 of chip CD40106, test point T14 connects pin number 6 of chip CD40106, test point T15 connects pin number 12 of chip CD40106, test point T16 connects pin number 11 of chip CD 40106.

7. The apparatus of claim 1, wherein the DAC0832 detection circuit comprises two pieces of level shifters U, pins B, B pins of the level shifters U are sequentially connected to PC ports of the STM main control chip, pins a, B pins of the level shifters 74LVC8T245 (U) are respectively connected to DI pins of the DAC0832 chip, pin RFB pin of the DAC0832 chip is connected to pin 6 of OP07 chip, pin 2 of the OP07 chip is connected to IOUT pin of the DAC0832 chip, pin 3 of the OP07 chip is connected to the left of C, pin 7 of the OP07 chip is connected to the right of capacitor C, pin 4 of the OP07 chip is connected to the left of capacitor C, and the right of capacitor C is connected to ground.

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