CN216623243U - Connecting circuits and electronic equipment - Google Patents

Abstract

The embodiment of the utility model provides a connecting circuit and electronic equipment. The method comprises the following steps: a main board chip and an image chip; the mainboard chip is provided with a first protocol transmission pin, a second protocol transmission pin, a third protocol transmission pin, a first signal transmission pin, a second signal transmission pin and a first reset pin; the image chip is provided with a fourth protocol transmission pin, a fifth protocol transmission pin, a sixth protocol transmission pin, a third signal transmission pin, a fourth signal transmission pin and a second reset pin; the first protocol transmission pin is electrically connected with the fourth protocol transmission pin, the second protocol transmission pin is electrically connected with the fifth protocol transmission pin, and the third protocol transmission pin is electrically connected with the sixth protocol transmission pin.

Description

Connecting circuits and electronic equipment

technical field

The utility model relates to the technical field of electronic equipment, in particular to a connection circuit and electronic equipment.

Background technique

With the development of science and technology, the application of electronic equipment is more and more extensive. Generally, the electronic equipment includes a main board and a camera module. The main board and the camera module are electrically connected through conductive parts, but the number of required conductive parts is usually large.

Utility model content

The embodiments of the present invention provide a connection circuit and an electronic device to solve the problem in the related art that the main board and the camera module are electrically connected through conductive parts, but the number of required conductive parts is usually large.

In order to solve the above-mentioned technical problems, the utility model is realized in this way:

In a first aspect, an embodiment of the present invention provides a connection circuit, including: a motherboard chip and an image chip;

The motherboard chip has a first protocol transmission pin, a second protocol transmission pin, a third protocol transmission pin, a first signal transmission pin, a second signal transmission pin and a first reset pin; the image chip It has a fourth protocol transmission pin, a fifth protocol transmission pin, a sixth protocol transmission pin, a third signal transmission pin, a fourth signal transmission pin and a second reset pin;

The first protocol transmission pin is electrically connected to the fourth protocol transmission pin, the second protocol transmission pin is electrically connected to the fifth protocol transmission pin, and the third protocol transmission pin is electrically connected to the fifth protocol transmission pin. The sixth protocol transmission pin is electrically connected;

The first signal transmission pin and the first reset pin are electrically connected to the second protocol transmission pin, the second signal transmission pin is electrically connected to the third protocol transmission pin, and the The third signal pin and the second reset pin are electrically connected to the fifth protocol transmission pin, and the fourth signal pin is electrically connected to the sixth protocol transmission pin.

In a second aspect, an embodiment of the present invention provides an electronic device, where the electronic device includes the connection circuit described in the first aspect above.

In the embodiment of the present invention, since the first protocol transmission pin and the fourth protocol transmission pin are electrically connected through the first conductive member, the second protocol transmission pin and the fifth protocol transmission pin are electrically connected through the second conductive member , the third protocol transmission pin and the sixth protocol transmission pin are electrically connected through the third conductive member, therefore, the first protocol transmission pin and the fourth protocol transmission pin, the second protocol transmission pin and the fifth protocol transmission pin are electrically connected A signal can be transmitted between the pin, the third protocol transmission pin and the sixth protocol transmission pin. Since the first signal transmission pin and the first reset pin are electrically connected to the second conductive member, the third signal pin and the second reset pin are electrically connected to the second conductive member, which are equivalent to the first signal transmission pin , the first reset pin and the second protocol signal multiplex the signal transmission path of the second protocol transmission pin, and the third signal pin and the second reset pin also multiplex the signal transmission path of the second protocol transmission pin. In addition, the second signal transmission pin is electrically connected to the third conductive member, and the fourth signal pin is electrically connected to the third conductive member, which is equivalent to the signal transmission path of the third signal pin multiplexing the third protocol transmission pin , the fourth signal pin multiplexes the signal transmission path of the fourth protocol transmission pin. That is, in the embodiment of the present invention, the number of pins can be reduced through multiplexing of signal transmission paths.

Description of drawings

1 shows a schematic diagram of a connection circuit provided by an embodiment of the present invention;

FIG. 2 is a schematic diagram of a first impedance matcher provided by an embodiment of the present invention.

Reference number:

10: Motherboard; 20: Camera Module; 30: First Voltage Converter; 40: Second Voltage Converter; 50: First Impedance Matcher; 60: Second Impedance Matcher; 70: Voltage Regulator; 80: Clock generator; 11: Motherboard chip; 21: Image chip; 22: Resistor group; 51: First capacitor; 52: Second capacitor; 53: Inductance; 91: First ground contact; 92: Second ground contact ; 101: first conductive member; 102: second conductive member; 103: third conductive member; 104: fourth conductive member; 105: fifth conductive member; 221: first voltage dividing resistor; 222: second voltage dividing resistor; 223: the third voltage divider resistor.

Detailed ways

The technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are part of the embodiments of the present utility model, not all of the embodiments. . Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

It is to be understood that reference throughout the specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic associated with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily necessarily referring to the same embodiment. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner in one or more embodiments.

Referring to FIG. 1 , a schematic diagram of a connection circuit provided by an embodiment of the present invention is shown. Referring to FIG. 2 , a schematic diagram of a first impedance matcher provided by an embodiment of the present utility model is shown, as shown in FIGS. 1 and 2 2 , the connection circuit includes: a mainboard chip 11 and an image chip 21 .

The mainboard chip 11 has a first protocol transmission pin, a second protocol transmission pin, a third protocol transmission pin, a first signal transmission pin, a second signal transmission pin and a first reset pin; the image chip 21 has a first Four protocol transmission pins, fifth protocol transmission pins, sixth protocol transmission pins, third signal transmission pins, fourth signal transmission pins, and second reset pins.

The first protocol transmission pin is electrically connected with the fourth protocol transmission pin, the second protocol transmission pin is electrically connected with the fifth protocol transmission pin, and the third protocol transmission pin is electrically connected with the sixth protocol transmission pin. The first signal transmission pin and the first reset pin are electrically connected to the second protocol transmission pin, the second signal transmission pin is electrically connected to the third protocol transmission pin, the third signal pin and the second reset pin are electrically connected is connected to the fifth protocol transmission pin, and the fourth signal pin is electrically connected to the sixth protocol transmission pin.

In the embodiment of the present invention, since the first protocol transmission pin is electrically connected with the fourth protocol transmission pin, the second protocol transmission pin is electrically connected with the fifth protocol transmission pin, and the third protocol transmission pin is electrically connected with the sixth protocol transmission pin The protocol transmission pins are electrically connected, so the first protocol transmission pin and the fourth protocol transmission pin, the second protocol transmission pin and the fifth protocol transmission pin, the third protocol transmission pin and the sixth protocol transmission pin Signals can be passed between them. Since the first signal transmission pin and the first reset pin are electrically connected to the second protocol transmission pin, the third signal pin and the second reset pin are electrically connected to the fifth protocol transmission pin, which is equivalent to the first signal transmission The pin, the first reset pin and the second protocol signal multiplex the signal transmission path of the second protocol transmission pin, and the third signal pin and the second reset pin also multiplex the signal transmission path of the second protocol transmission pin . In addition, the second signal transmission pin is electrically connected to the third protocol transmission pin, and the fourth signal pin is electrically connected to the sixth protocol transmission pin, which is equivalent to the third signal pin multiplexing the signal of the third protocol transmission pin The transmission path, the fourth signal pin multiplexes the signal transmission path of the fourth protocol transmission pin. That is, in the embodiment of the present invention, through the multiplexing of signal transmission paths, the number of conductive parts can be reduced.

For example, as shown in FIG. 1 , the motherboard chip 11 may be the module where the SOC is located, the first protocol transmission pin may be CPHY_A, the second protocol transmission pin may be CPHY_B, and the third protocol transmission pin may be CPHY_C. The first signal pin may be the pin SDA, the second signal pin may be the SCL pin, and the first reset pin may be the pin RST. The image chip 21 may be the module where the Sensor IC is located, the fourth protocol transmission pin may be the pin CPHY_A, the fifth protocol transmission pin may be CPHY_B, the sixth protocol transmission pin may be CPHY_C, and the third signal pin may be the lead pin. The pin SDA, the fourth signal pin can be the pin SCL, and the second reset pin can be the pin RST.

In addition, in the embodiment of the present invention, the first protocol transmission pin, the second protocol transmission pin, the third protocol transmission pin, the fourth protocol transmission pin, the fifth protocol transmission pin and the sixth protocol transmission pin The pin transmits the target communication protocol, and the target protocol is the CPHY protocol.

In addition, in the embodiment of the present invention, the first protocol transmission pin and the fourth protocol transmission pin can be electrically connected through the first conductive member 101, and the second protocol transmission pin and the fifth protocol transmission pin are electrically connected through the second conductive member 101. The component 102 is electrically connected, and the third protocol transmission pin and the sixth protocol transmission pin are electrically connected through the third conductive component 103 . Of course, the first protocol transmission pin and the fourth protocol transmission pin can be directly welded to achieve electrical connection, the second protocol transmission pin and the fifth protocol transmission pin can be directly welded to achieve electrical connection, and the third protocol transmission pin and the sixth protocol transmission pin can be directly welded to achieve electrical connection. The protocol transmission pins are directly welded to realize electrical connection. In this regard, the embodiments of the present invention are not limited herein.

In addition, the first signal transmission pin and the first reset pin are electrically connected to the second conductive member 102, and the third signal pin and the second reset pin are electrically connected to the second conductive member 102, which are equivalent to the first signal The transmission pin, the first reset pin and the second protocol signal multiplex the signal transmission path of the second protocol transmission pin, and the third signal pin and the second reset pin also multiplex the signal transmission of the second protocol transmission pin path. The second signal transmission pin is electrically connected to the third conductive member 103, and the fourth signal pin is electrically connected to the third conductive member 103, which is equivalent to the signal transmission path of the third signal pin multiplexing the third protocol transmission pin , the fourth signal pin multiplexes the signal transmission path of the fourth protocol transmission pin.

In addition, in the embodiment of the present invention, the camera module 20 needs to be reset by the RST signal before working. Before the RST signal is reset, the pins CPHY_A, CPHY_B, CPHY_C, SDA, and SCL on the motherboard chip 11 will not be connected with the pins CPHY_A, CPHY_B, and SCL on the image chip 21. CPHY_C, pin SDA and pin SCL transmit signals. Therefore, the pin RST on the motherboard chip 11 can transmit the RST signal to the pin RST on the image chip 21 through the second conductive member 102, so that the camera module 20 can Reset by RST signal. In addition, after the camera module 20 is reset, communication needs to be performed between the main board 10 and the camera module 20. Specifically, a signal is transmitted through the pins SDA and SCL on the main board chip 11 to the pin SDA on the image chip 21. and pin SCL, wherein the pin SDA on the motherboard chip 11 transmits signals with the pin SDA on the image chip 21 through the second conductive member 102, and the pin SCL on the motherboard chip 11 communicates with the image chip through the third conductive member 103. The pin SCL on 21 transmits the signal, and the pin SDA on the motherboard chip 11 transmits the signal with the pin SDA on the image chip 21, and the pin SCL on the motherboard chip 11 transmits the signal with the pin SCL on the image chip 21 At the time, the pins CPHY_A, CPHY_B and CPHY_C on the main board chip 11 communicate with the pins CPHY_A, CPHY_B and CPHY_C on the image chip 21 .

In addition, after the pins SDA and SCL on the mainboard chip 11 transmit signals, the pins CPHY_A, CPHY_B and CPHY_C on the mainboard chip 11 pass through the first conductive member 101 , the second conductive member 102 and the first conductive member 102 respectively. The three conductive members 103 transmit signals with the pins CPHY_A, CPHY_B and CPHY_C on the image chip 21 , and when the pins CPHY_A, CPHY_B and CPHY_C on the main board chip 11 transmit signals, the main board chip 11 The pin SDA, pin SCL and pin RST do not pass signals. Thereby, the multiplexing of signal paths can be realized, and the signal transmission process will not be disturbed.

It should be noted that the signal transmission described above is based on the timing relationship of the signal transmission, so that the number of conductive parts can be reduced through the multiplexing of the signal paths. In addition, in the embodiment of the present invention, the CPHY protocol is adopted. Since the protocol itself requires fewer pins, after the CPHY protocol is adopted, the number of pins on the main board chip 11 can be reduced, and the number of pins on the image chip 21 can be reduced. The number of pins on it can reduce the number of conductive parts. After that, the number of conductive parts can be further reduced by multiplexing the pass signal.

In addition, in some embodiments, the connection circuit may further include a first voltage converter 30 and a second voltage converter 40 . The first signal pin, the second signal pin and the first reset pin are all electrically connected to the first end of the first voltage converter 30, and the second end of the first voltage converter 30 is electrically connected to the second protocol transmission pin. pin and the third protocol transmission pin. The third signal pin, the fourth signal pin and the second reset pin are all electrically connected to the first end of the second voltage converter 40, and the second end of the second voltage converter 40 is electrically connected to the fifth protocol transmission lead. pin and the sixth protocol transmission pin. The first voltage converter 30 is used for converting the first voltage into the second voltage, and the second voltage converter 40 is used for converting the second voltage into the first voltage. Wherein, the first voltage is greater than the second voltage.

When the first protocol transmission pin and the fourth protocol transmission pin are electrically connected through the first conductive member 101, the second protocol transmission pin and the fifth protocol transmission pin are electrically connected through the second conductive member 102, and the third protocol transmission pin is electrically connected through the second conductive member 102. The pin is electrically connected to the sixth protocol transmission pin through the third conductive member 103, the first signal transmission pin and the first reset pin are electrically connected to the second conductive member 102, and the second signal transmission pin is electrically connected to the third conductive member 102. On the conductive member 103, the third signal pin and the second reset pin are electrically connected to the second conductive member 102, and the fourth signal pin is electrically connected to the third conductive member 103. At this time, when the CPHY protocol is transmitted , usually the required level is small, and the withstand voltage of the pins on the image chip 21 is relatively low, but the levels of the first signal pin, the second signal pin and the first reset pin on the motherboard chip 11 are generally Higher, that is, the level on the pin SDA, the pin SCL and the pin RST on the main board chip 11 is generally higher. The levels of the third signal pin, the fourth signal pin and the second reset pin on the image chip 21 are generally higher, that is, the levels on the pins SDA, SCL and RST on the image chip 21 Generally higher.

However, a higher level may cause damage to the second conductive member 102 and the third conductive member 103. Therefore, the first signal pin, the second signal pin and the first reset pin can be electrically connected to the first voltage The first end of the converter 30 and the second end of the first voltage converter 30 are electrically connected to the second conductive member 102 and the third conductive member 103 . The third signal pin, the fourth signal pin and the second reset pin are all electrically connected to the first end of the second voltage converter 40 , and the second end of the second voltage converter 40 is electrically connected to the second conductive member 102 and the third conductive member 103, so that the first voltage converter 30 converts the first voltage into the second voltage, and then the second conductive member 102 and the third conductive member 103 transmit the voltage according to the second voltage. When the second voltage is transmitted to the second voltage converter 40 , the second voltage converter 40 converts the second voltage into the first voltage, so as to transmit the second voltage to the third signal pin, the fourth signal pin and the image chip 21 . The second reset pin enables the pins on the image chip 21 to work according to the normal voltage.

For example, the voltage on the pin SDA, the pin SCL and the pin RST on the main board chip 11 is 1.8V, and the voltage of 1.8V can be converted into 1.2V by the first voltage converter 30. At this time, the voltage of 1.2V is at The second conductive member 102 and the third conductive member 103 are transmitted. When transmitted to the second voltage converter 40 , the second voltage converter 40 converts the voltage of 1.2V into 1.8V, and transmits the voltage to the pins SDA, SCL and RST of the image chip 21 .

In addition, due to the multiplexing of signal paths, the impedance of the entire connection circuit may change, so that the transmission signal may be affected. In order to avoid this problem, in the embodiment of the present invention, as shown in FIG. 1, the connection circuit also A first impedance matcher 50 and a second impedance matcher 60 may be included. The first end of the first impedance matcher 50 is electrically connected to the second end of the first voltage converter 30, and the second end of the first impedance matcher 50 is electrically connected to the second protocol transmission pin and the third protocol transmission pin respectively. foot. The first end of the second impedance matcher 60 is electrically connected to the second end of the second voltage converter 40, and the second end of the second impedance matcher 60 is electrically connected to the fifth protocol transmission pin and the sixth protocol transmission pin, respectively. foot. The first impedance matcher and the second impedance matcher 60 are used to adjust the impedance in the connection circuit.

Since the first impedance matcher 50 is electrically connected to the first voltage converter 30 , the second protocol transmission pin and the third protocol transmission pin, respectively, the second impedance matcher 60 is respectively connected to the second voltage converter 40 and the fifth protocol transmission pin. The transmission pin and the sixth protocol transmission pin are electrically connected, and the second protocol transmission pin, the third protocol transmission pin, the fifth protocol transmission pin and the sixth protocol transmission pin are all signal paths and are multiplexed. Therefore, after the first impedance matcher 50 and the second impedance matcher 60 are connected, the second protocol transmission pin, the third protocol transmission pin, the fifth protocol transmission pin and the sixth protocol transmission pin can be made to transmit The signal transmitted on the pin is not affected by impedance, which is conducive to signal transmission.

When the first signal transmission pin and the first reset pin are electrically connected to the second conductive member, the second signal transmission pin is electrically connected to the third conductive member, and the third signal pin and the second reset pin are electrically connected On the second conductive member, when the fourth signal pin is electrically connected to the third conductive member, at this time, the first impedance matcher 50 is connected to the first voltage converter 30 , the second conductive member 102 and the third conductive member respectively. 103 is electrically connected, the second impedance matching device 60 is respectively electrically connected with the second voltage converter 40, the second conductive member 102 and the third conductive member 103, and both the second conductive member 102 and the third conductive member 103 are signal paths, And it is a multiplexed signal path, so that after the first impedance matcher 50 and the second impedance matcher 60 are connected, the signals transmitted on the second conductive member 102 and the third conductive member 103 can not be affected by impedance, which is beneficial to signal transmission.

It should be noted that, the first impedance matcher 50 and the second impedance matcher 60 can make the resistance of the connection circuit 50 ohms.

In addition, in some embodiments, as shown in FIG. 2 , the first impedance matcher 50 may include a first capacitor 51 , a second capacitor 52 and an inductor 53 . The first end of the inductor 53 is electrically connected to the first end of the first capacitor 51 and the second end of the first voltage converter 30 respectively, and the second end of the first capacitor 51 is grounded. The second end of the inductor 53 is electrically connected to the first end of the second capacitor 52 , the second protocol transmission pin and the third protocol transmission pin, respectively.

That is, by connecting the first capacitor 51, the second capacitor 52 and the inductor 53, a passive circuit can be formed, an impedance matching circuit can be formed, that is, an impedance matcher can be formed, and the impedance in the connecting circuit can be matched, so that the second The protocol transmission pin and the third protocol transmission pin transmit signals without being affected by impedance. When the first signal transmission pin and the first reset pin are electrically connected to the second conductive member 102, the second signal transmission pin is electrically connected to the third conductive member 103, the third signal pin and the second reset pin When the fourth signal pin is electrically connected to the second conductive member 102 and the fourth signal pin is electrically connected to the third conductive member 103, at this time, the transmission signals on the second conductive member 102 and the third conductive member 103 are not affected by impedance, good for signal transmission.

It should be noted that the structure of the second impedance matcher 60 is the same as that of the first impedance matcher 50 .

In addition, in the embodiment of the present invention, the number of the first capacitors 51 and the second capacitors 52 can be set according to actual needs. For example, the number of the first capacitors 51 is three, and in this case, the three first capacitors 51 It can be connected in parallel, the number of the second capacitors 52 can be four, and the four first capacitors 51 can be connected in parallel. In addition, the number of inductors 53 can be set according to actual needs. For example, the number of inductors 53 is two, and two inductors 53 can be connected in series. In this case, the inductors 53 connected in series can be electrically connected to the first capacitor 51 and the second capacitor respectively. Capacitor 52.

In addition, in some embodiments, as shown in FIG. 1 , the connection circuit may further include a voltage regulator 70 and a resistor group 22 , and the image chip 21 includes a voltage pin group. The voltage stabilizer 70 is electrically connected to one end of the resistor group 22 through the fourth conductive member 104, and the other end of the resistor group 22 is electrically connected to the voltage pin group.

When the voltage regulator 70 is electrically connected to one end of the resistor group 22 and the other end of the resistor group 22 is electrically connected to the voltage pin group, at this time, when the voltage regulator 70 transmits voltage to the image chip 21 , the voltage can pass through the resistor group 22 The voltage division is performed, so that the voltage transmitted from the voltage regulator 70 to the image chip 21 is more suitable, so that the voltage on the image chip 21 is more suitable, which is beneficial to the operation of the image chip 21 .

In addition, in the embodiment of the present invention, as shown in FIG. 1 , the voltage regulator 70 may be electrically connected to one end of the resistor group 22 through the fourth conductive member 104 .

In addition, in some embodiments, the voltage pin group includes a first voltage pin, a second voltage pin, and a third voltage pin, and the resistor group 22 includes a first voltage dividing resistor 221, a second voltage dividing resistor 222, and a first voltage dividing resistor 222. Three divider resistors 223 . The first end of the first voltage dividing resistor 221 is electrically connected to the voltage regulator and the first voltage pin respectively, and the second end of the first voltage dividing resistor 221 is respectively connected to the first end of the second voltage dividing resistor 222 and the second voltage The pins are electrically connected, and the second end of the second voltage dividing resistor 222 is respectively electrically connected to the first end of the third voltage dividing resistor 223 and the third voltage pin, and the second end of the third voltage dividing resistor 223 is grounded.

Since the first end of the first voltage dividing resistor 221 is electrically connected to the voltage regulator and the first voltage pin, respectively, the voltage transmitted by the voltage stabilizer 70 can be firstly transmitted to the first end of the first voltage dividing resistor 221, and It is transmitted to the first voltage pin, and then the voltage passes through the first voltage dividing resistor 221 , and the first voltage dividing resistor 221 can divide the voltage, so that the voltage at the second end of the first voltage dividing resistor is smaller than the first voltage dividing resistor 221 The voltage of the first terminal of the first voltage dividing resistor 221 is transmitted to the second voltage pin. After that, the second voltage dividing resistor 222 can divide the voltage of the first voltage dividing resistor 221, so that the voltage of the first end of the second voltage dividing resistor 222 is lower than the voltage of the second end of the second voltage dividing resistor 222, and the first The voltage of the second terminal of the two-voltage dividing resistor 222 is transmitted to the third voltage pin. Therefore, the first voltage pin, the second voltage pin and the third voltage pin on the image chip 21 have voltages, so that the image chip 21 can work.

For example, as shown in FIG. 1 , the first voltage dividing resistor 221 may be R4, the second voltage dividing resistor 222 may be R2, the third voltage dividing resistor 223 may be R3, and the first voltage pin may be 2.8 in the image chip 21. The pin where V is located, the second voltage pin can be the pin where 1.8V is located in the image chip 21 , and the third voltage pin can be the voltage pin where 1.1V is located in the image chip 21 .

In addition, in some embodiments, as shown in FIG. 1 , the camera module 20 may further include a clock generator 80 , and the image chip 21 may further include a clock pin. The clock generator 80 is electrically connected to the clock pin, and the clock generator 80 is used for sending a clock signal to the clock pin.

When the clock generator 80 is electrically connected to the clock pin, the clock generator 80 can send a clock signal to the clock pin, so that the image chip 21 can capture an image or process the image according to the clock signal.

For example, as shown in Figure 1, the clock pin may be pin CLK.

In addition, in the embodiment of the present invention, the clock generator 80 may include any one of a crystal oscillator, a Pierce oscillator circuit, and a clock chip.

In addition, in some embodiments, the connection circuit may further include a mainboard 10 and a camera module 20 , the mainboard chip 11 is disposed on the mainboard 10 , and the image chip 21 is located in the camera module 20 . At this time, it is equivalent to that the main board 10 is electrically connected to the camera module 20 , so that the camera module 20 can send the captured image to the main board 10 .

In addition, when the connection circuit includes the voltage stabilizer 70, the voltage stabilizer 70 may be provided on the main board 10 at this time.

In addition, in some embodiments, as shown in FIG. 1 , the main board 10 may be provided with a first ground contact 91 , the camera module 20 may be provided with a second ground contact 92 , the first ground contact 91 and the second ground contact 91 . The ground contact 92 is electrically connected.

When the first ground contact 91 on the main board 10 is electrically connected to the second ground contact 92 in the camera module 20 , at this time, the main board 10 and the camera module 20 can pass through the first ground contact 91 on the main board 10 The grounding is beneficial to the operation of the camera module 20 and prevents static electricity from affecting the camera module 20 .

In addition, as shown in FIG. 1 , the first ground contact 91 and the second ground contact 92 are electrically connected through the fifth conductive member 105 .

In addition, in some embodiments, the first conductive member 101 may include a first sub-component and a second sub-component, the second conductive member 102 may include a third sub-component and a fourth sub-component, and the third conductive member 103 may include a fifth sub-component and the sixth component. The first sub-component, the third sub-component and the fifth sub-component are all arranged on the main board 10 , and the second sub-component, the fourth sub-component and the sixth sub-component are all arranged on the camera module 20 . The first protocol transmission pin is electrically connected to the first sub-component, the fourth protocol transmission pin is electrically connected to the second sub-component, and the first sub-component is electrically connected to the second sub-component. The second protocol transmission pin, the first signal transmission pin and the first reset pin are electrically connected to the third sub-component, and the fifth protocol signal transmission pin, the third signal pin and the second reset pin are electrically connected to the fourth sub-component. sub-component, the third sub-component is electrically connected with the fourth sub-component. The third protocol transmission pin and the second signal transmission pin are electrically connected to the fifth sub-component, the sixth protocol transmission pin and the fourth signal transmission pin are electrically connected to the sixth sub-component, and the fifth sub-component and the sixth sub-component are electrically connected Pieces of electrical connection.

It should be noted that when the mainboard 10 is connected to the camera module 20, usually the mainboard 10 is provided with a first connector, and the camera module 20 is provided with a second connector, which is connected to the second connector through the first connector, so that the The main board 10 is electrically connected to the camera module 20 . The first connector usually has a plurality of first pins, and the second connector usually has a plurality of second pins, and the number of the first pins and the second pins is the same, and the number of the first pins and the second pins is the same. When the pins are in contact, the camera module 20 and the motherboard 10 can communicate with each other. In the embodiment of the present invention, the first sub-component, the third sub-component and the fifth sub-component may be equivalent to the three first pins in the first connector on the main board 10, the second sub-component, the fourth sub-component The component and the sixth component may correspond to the three second pins of the second connector on the camera module 20 .

In addition, in the embodiment of the present invention, the fourth conductive member 104 may include a seventh sub-component and an eighth sub-component, the fifth conductive member 105 may include a ninth sub-component and a tenth sub-component, and the seventh sub-component and the first sub-component The ninth component can be arranged on the main board 10 , the eighth component and the tenth component can be arranged on the camera module 20 , at this time, the seventh component and the ninth component can be equivalent to the first connection on the main board 10 . The eighth sub-component and the tenth sub-component may correspond to the two pins in the second connector on the camera module 20 .

In addition, in the embodiment of the present invention, the main board 10 communicates with the camera module 20 through the CPHY protocol, and through the multiplexing of signal paths, the number of conductive parts is reduced, which is equivalent to reducing the first connector on the main board 10. The number of the first pins in the camera module 20 reduces the number of the second pins in the second connector on the camera module 20 . In addition, in the embodiment of the present invention, in fact, the first connector on the main board 10 has 5 first pins, and the second connector on the camera module 20 has 5 pins, so that the main board can be The chip 11 communicates with the image chip 21 .

In the embodiment of the present invention, since the first protocol transmission pin and the fourth protocol transmission pin are electrically connected through the first conductive member 101 , the second protocol transmission pin and the fifth protocol transmission pin are electrically connected through the second conductive member 102 Electrical connection, the third protocol transmission pin and the sixth protocol transmission pin are electrically connected through the third conductive member 103, therefore, the first protocol transmission pin and the fourth protocol transmission pin, the second protocol transmission pin and the fifth Signals can be transmitted between the protocol transmission pin, the third protocol transmission pin and the sixth protocol transmission pin. Since the first signal transmission pin and the first reset pin are electrically connected to the second conductive member 102, the third signal pin and the second reset pin are electrically connected to the second conductive member 102, which is equivalent to the first signal transmission The pin, the first reset pin and the second protocol signal multiplex the signal transmission path of the second protocol transmission pin, and the third signal pin and the second reset pin also multiplex the signal transmission path of the second protocol transmission pin . In addition, the second signal transmission pin is electrically connected to the third conductive member 103, and the fourth signal pin is electrically connected to the third conductive member 103, which is equivalent to the third signal pin multiplexing the signal of the third protocol transmission pin The transmission path, the fourth signal pin multiplexes the signal transmission path of the fourth protocol transmission pin. That is, in the embodiment of the present invention, the number of pins can be reduced through multiplexing of signal transmission paths.

An embodiment of the present invention provides an electronic device, and the electronic device includes the connection circuit in any of the foregoing embodiments.

It should be noted that, in the embodiments of the present invention, electronic devices include but are not limited to mobile phones, tablet computers, notebook computers, handheld computers, vehicle-mounted terminals, wearable devices, and pedometers.

It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. For the same and similar parts among the various embodiments, refer to each other Can.

While alternative embodiments of the present invention have been described, additional changes and modifications to these embodiments may occur to those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be construed to include alternative embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

Finally, it should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity from another, and do not necessarily require or imply any existence between these entities. This actual relationship or sequence. Furthermore, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that an article or terminal device comprising a list of elements includes not only those elements, but also other elements not expressly listed , or also include elements inherent to the article or terminal equipment. Without further limitation, an element defined by the phrase "comprises a..." does not preclude the presence of additional identical elements in the article or terminal device comprising the element.

The technical solutions provided by the present utility model have been introduced in detail above. Specific examples are used in this paper to illustrate the principles and implementations of the present utility model. There will be changes in the implementation manner in terms of specific embodiments and application scope. To sum up, the content of this specification should not be construed as a limitation on the present invention.

Claims (10)

1. A connection circuit, characterized in that, comprising: a motherboard chip and an image chip; The motherboard chip has a first protocol transmission pin, a second protocol transmission pin, a third protocol transmission pin, a first signal transmission pin, a second signal transmission pin and a first reset pin; the image chip It has a fourth protocol transmission pin, a fifth protocol transmission pin, a sixth protocol transmission pin, a third signal transmission pin, a fourth signal transmission pin and a second reset pin; The first protocol transmission pin is electrically connected to the fourth protocol transmission pin, the second protocol transmission pin is electrically connected to the fifth protocol transmission pin, and the third protocol transmission pin is electrically connected to the fifth protocol transmission pin. The sixth protocol transmission pin is electrically connected; The first signal transmission pin and the first reset pin are electrically connected to the second protocol transmission pin, the second signal transmission pin is electrically connected to the third protocol transmission pin, and the The third signal pin and the second reset pin are electrically connected to the fifth protocol transmission pin, and the fourth signal pin is electrically connected to the sixth protocol transmission pin. 2. The connection circuit according to claim 1, wherein the connection circuit further comprises a first voltage converter and a second voltage converter; The first signal pin, the second signal pin and the first reset pin are all electrically connected to the first end of the first voltage converter, and the second end of the first voltage converter electrically connected to the second protocol transmission pin and the third protocol transmission pin; The third signal pin, the fourth signal pin and the second reset pin are all electrically connected to the first end of the second voltage converter, and the second end of the second voltage converter electrically connected to the fifth protocol transmission pin and the sixth protocol transmission pin; the first voltage converter is used for converting the first voltage into a second voltage, and the second voltage converter is used for converting the second voltage into the first voltage; Wherein, the first voltage is greater than the second voltage. 3. The connection circuit according to claim 2, wherein the connection circuit further comprises a first impedance matcher and a second impedance matcher; The first end of the first impedance matcher is electrically connected to the second end of the first voltage converter, and the second end of the first impedance matcher is electrically connected to the second protocol transmission pin and the third protocol transmission pin; The first end of the second impedance matcher is electrically connected to the second end of the second voltage converter, and the second end of the second impedance matcher is electrically connected to the fifth protocol transmission pin and the sixth protocol transmission pin; The first impedance matcher and the second impedance matcher are used to adjust the impedance in the connection circuit. 4. The connection circuit according to claim 3, wherein the first impedance matching device comprises a first capacitor, a second capacitor and an inductor; The first end of the inductor is electrically connected to the first end of the first capacitor and the second end of the first voltage converter, respectively, and the second end of the first capacitor is grounded; The second end of the inductor is respectively electrically connected to the first end of the second capacitor, the second protocol transmission pin and the third protocol transmission pin. 5. The connection circuit according to claim 1, wherein the connection circuit further comprises a voltage regulator and a resistance group, and the image chip comprises a voltage pin group; The voltage regulator is electrically connected to one end of the resistance group, and the other end of the resistance group is electrically connected to the voltage pin group. 6. The connection circuit according to claim 5, wherein the voltage pin group comprises a first voltage pin, a second voltage pin and a third voltage pin, and the resistance group comprises a first voltage divider a resistor, a second voltage dividing resistor and a third voltage dividing resistor; The first end of the first voltage dividing resistor is electrically connected to the voltage regulator and the first voltage pin, respectively, and the second end of the first voltage dividing resistor is respectively connected to the second voltage dividing resistor. The first end and the second voltage pin are electrically connected, and the second end of the second voltage dividing resistor is respectively electrically connected to the first end of the third voltage dividing resistor and the third voltage pin, so The second end of the third voltage dividing resistor is grounded. 7. The connection circuit according to claim 1, wherein the camera module comprises a clock generator, and the image chip also comprises a clock pin; The clock generator is electrically connected to the clock pin, and the clock generator is used for sending a clock signal to the clock pin. 8. The connection circuit according to any one of claims 1-7, wherein the connection circuit can further comprise a main board and a camera module; The motherboard chip is arranged on the motherboard, and the image chip is located in the camera module. 9 . The connection circuit according to claim 8 , wherein the main board is provided with a first ground contact, the camera module is provided with a second ground contact, the first ground contact and The second ground contact is electrically connected. 10. An electronic device, characterized in that, the electronic device comprises the connection circuit according to any one of claims 1-9.

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