CN216486061U - General acquisition circuit of analog signal - Google Patents
General acquisition circuit of analog signal Download PDFInfo
- Publication number
- CN216486061U CN216486061U CN202122984607.6U CN202122984607U CN216486061U CN 216486061 U CN216486061 U CN 216486061U CN 202122984607 U CN202122984607 U CN 202122984607U CN 216486061 U CN216486061 U CN 216486061U
- Authority
- CN
- China
- Prior art keywords
- control unit
- main control
- pin
- capacitor
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
The utility model provides a general acquisition circuit for analog signals, which comprises a gain amplifier, wherein the input end of the gain amplifier is connected with a switch matrix, the switch matrix is connected with a plurality of access channels, and each access channel can be connected with a sensor; the output end of the gain amplifier is connected with the digital-to-analog conversion unit, and the analog-to-digital conversion unit and the gain amplifier are both connected with the controller through the SPI communication bus; the switch matrix comprises a signal acquisition circuit, the input end of the signal acquisition circuit is connected with the access channel, the output end of the signal acquisition circuit is connected with a signal selection circuit, and the signal selection circuit is connected with the gain amplifier. The general analog signal acquisition circuit provided by the utility model is provided with the switch matrix, the front stage of the switch matrix is connected with the sensor through the access channel, and the rear stage of the switch matrix is sequentially connected with the gain amplifier, the analog-to-digital converter and the controller, and can simultaneously support general acquisition of various analog signal types through control of the controller.
Description
Technical Field
The utility model belongs to the technical field of meteorological observation, and particularly relates to a general analog signal acquisition circuit.
Background
Meteorological observation, which is a subject of methods and means for studying and measuring and observing physical and chemical characteristics of the earth's atmosphere and atmospheric phenomena, is mainly the collection of meteorological elements, and analog signals output by sensors applied in many meteorological industries need to be converted by collectors and then processed in a centralized manner.
In the existing meteorological industry, various analog quantity signals have been sampled, for example, a four-wire system circuit and an excitation current source are adopted to sample platinum resistors, a differential signal is subjected to voltage sampling through a bias circuit, and current sampling is carried out in a mode of measuring two-end voltage after a current signal passes through a precision resistor; the sampling circuits only collect special signals and cannot collect general signals; therefore, a general analog signal acquisition circuit is needed.
SUMMERY OF THE UTILITY MODEL
In view of this, the present invention is directed to provide a general analog signal acquisition circuit, so as to solve the problem that the acquisition circuit only acquires a specific signal and cannot acquire a general signal.
In order to achieve the purpose, the technical scheme of the utility model is realized as follows:
a general acquisition circuit for analog signals comprises a gain amplifier, wherein the input end of the gain amplifier is connected with a switch matrix, the switch matrix is connected with a plurality of access channels, each access channel can be connected with a sensor, and the sensor comprises a resistance sensor, a differential voltage sensor, a single-ended voltage sensor and a current sensor;
the output end of the gain amplifier is connected with the digital-to-analog conversion unit, and the digital-to-analog conversion unit and the gain amplifier are both connected with the controller through the SPI communication bus;
the switch matrix comprises a signal acquisition circuit, the input end of the signal acquisition circuit is connected with the access channel, the output end of the signal acquisition circuit is connected with a signal selection circuit, and the signal selection circuit is connected with the gain amplifier.
Furthermore, the access channel comprises an access channel I, an access channel II, an access channel III and an access channel IV, each access channel is provided with a connecting port for connecting the sensor, and the connecting port comprises four terminals;
the access channel I comprises a connection port J1, a terminal I of the connection port J1 is connected with a signal acquisition circuit through a resistor R11, a terminal II of the connection port J1 is connected with the signal acquisition circuit through a resistor R12, a terminal III of the connection port J1 is connected with the signal acquisition circuit through a resistor R13, a terminal IV of the connection port J1 is connected with the signal acquisition circuit, a connection line between a terminal IV of the connection port J1 and the signal acquisition circuit is grounded through a resistor R14 and a resistor R15 in sequence, and a connection line between a resistor R14 and a resistor R15 is also connected with the signal acquisition circuit;
the access channel II comprises a connection port J2, a terminal II of the connection port J2 is connected with the signal acquisition circuit through a resistor R22, and a terminal III of the connection port J1 is connected with the signal acquisition circuit through a resistor R23;
the access channel III comprises a connection port J3, a first terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R31, a second terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R32, and a third terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R33;
the access channel IV comprises a connection port J4, a connection line between the terminal IV of the connection port J4 and the signal acquisition circuit is grounded through a resistor R44 and a resistor R45 in sequence, and a connection line between a resistor R44 and a resistor R45 is connected with the signal acquisition circuit.
Further, the signal acquisition circuit comprises a main control unit U14, a main control unit U15, a main control unit U16, a main control unit U17, a main control unit U39 and a main control unit U20; the S1 pin of the main control unit U14 is respectively connected with the other end of the resistor R11 and the other end of the resistor R21, the A0, A1 and A2 pins of the main control unit U14 are connected with the gain amplifier, the D pin of the main control unit U14 is connected with the signal selection circuit through the resistor R53, the D pin of the main control unit U14 is also connected with the main control unit U20 through R52, the VCC pin of the main control unit U14 is connected with a +15V power supply end, the VSS pin of the main control unit U14 is connected with a-15V power supply end, and the GND pin of the main control unit U14 is grounded;
the S1 pin of the main control unit U15 is respectively connected with the other end of the resistor R12, the other end of the resistor R22 and the other end of the resistor R32, the A0, A1 and A2 pins of the main control unit U15 are connected with a gain amplifier, the D pin of the main control unit U15 is connected with a digital-to-analog conversion unit, the VCC pin of the main control unit U15 is connected with a +15V power supply end, the VSS pin of the main control unit U15 is connected with a-15V power supply end, and the GND pin of the main control unit U15 is grounded;
the S1 pin of the main control unit U16 is respectively connected with the other end of the resistor R13, the other end of the resistor R23 and the other end of the resistor R33, the A0, A1 and A2 pins of the main control unit U16 are connected with a gain amplifier, the D pin of the main control unit U16 is connected with a digital-to-analog conversion unit, the VCC pin of the main control unit U16 is connected with a +15V power supply end, the VSS pin of the main control unit U16 is connected with a-15V power supply end, and the GND pin of the main control unit U16 is grounded;
the S1 pin of the main control unit U17 is respectively connected with the fourth terminal of the connection port J1 and the fourth terminal of the connection port J4, the A0, A1 and A2 pins of the main control unit U17 are connected with the gain amplifier, the D pin of the main control unit U17 is connected with the digital-to-analog conversion unit, the VCC pin of the main control unit U17 is connected with the +15V power supply end, the VSS pin of the main control unit U17 is connected with the-15V power supply end, and the GND pin of the main control unit U16 is grounded;
the S1 pin of the main control unit U39 is connected with a connecting line between the resistor R14 and the resistor R15, the A0, A1 and A2 pins of the main control unit U39 are connected with the gain amplifier, the D pin of the main control unit U39 is connected with the digital-to-analog conversion unit, the VCC pin of the main control unit U39 is connected with a +15V power supply end, the VSS pin of the main control unit U39 is connected with-15V power supply end, and the GND pin of the main control unit U39 is grounded;
the S1A pin of the main control unit U20 is connected with the other end of the resistor R52, the DA pin and the A0 pin of the main control unit U20 are both connected with a gain amplifier, the A1 pin of the main control unit U20 is connected with a signal selection circuit, the VCC pin of the main control unit U20 is connected with a +15V power supply end, the VSS pin of the main control unit U20 is connected with a-15V power supply end, and the GND pin of the main control unit U20 is grounded.
Further, the signal selection circuit comprises a main control unit U12 and a main control unit U13, a pin S1 and a pin S3 of the main control unit U12 are both connected with a pin D of the main control unit U15, a pin S2 of the main control unit U12 is connected with the other end of the resistor R53, a pin S4 of the main control unit U12 is connected with a pin D of the main control unit U16, a pin S5 of the main control unit U12 is connected with a pin D of the main control unit U17, a pin D of the main control unit U12 is connected with a gain amplifier, pins A0, A1 and A2 of the main control unit U12 are all connected with the gain amplifier, a VCC pin of the main control unit U12 is connected with a +15V power supply terminal, a VSS pin of the main control unit U12 is connected with a-15V power supply terminal, and a GND pin of the main control unit U12 is grounded;
the S1 pin of the main control unit U13 is connected with the D pin of the main control unit U16, the S2 pin, the S3 pin and the S4 pin of the main control unit U13 are all connected with the A1 pin of the main control unit U20, the S5 pin of the main control unit U13 is connected with the D pin of the main control unit U39, the A0, A1 and A2 pins of the main control unit U13 are all connected with a gain amplifier, the VCC pin of the main control unit U13 is connected with a +15V power supply terminal, the VSS pin of the main control unit U13 is connected with a-15V power supply terminal, and the GND pin of the main control unit U13 is grounded.
Further, the gain amplifier includes a main control unit U21, an INP1 pin of a main control unit U21 is connected to a D pin of the main control unit U12, an INN1 pin of the main control unit U21 is connected to a D pin of the main control unit U13, a GPIO 21 pin of the main control unit U21 is connected to an a 21 pin of the main control unit U21, an a 21 pin of the main control unit U21 and an a 21 pin of the main control unit U21, a 21 pin of the main control unit U21 is connected to an a 21 pin of the main control unit U21, a 21 pin of the main control unit U21, a 21 pin of the main control unit 21 and a 21 pin of the main control unit U21, a 21 pin of the main control unit 21 of the main control unit U21 is connected to a D pin 21 of the main control unit U21, a 21 pin of the main control unit 21, a 21 of the main control unit U21, a 21 of the main control unit 21 and a 21 of the main control unit 21 are connected to the main control unit 21, a 21 of the main control unit 21 and a 21 of the main control unit 21, a 21 of the main control unit 21 and a 21 of the U21 of the main control unit 21 and a 21 of the main control unit 21 and a 21 of the main control unit 21, a 21 of the main control unit 21 and a 21 of the U21 of the main control unit 21 and a 21 of the main control unit 21 of the U21 are connected to the U21 and the U21, a 21 of the U21 and the main control unit 21 of the U21, a 21 of the main control unit 21 of the U21 and the main control unit 21 and the U21 of the U21 and the main control unit 21 of the U21, a 21 and the U21 and the main control unit 21 of the main control unit 21 and the U21 of the main control unit 21, a 21 are connected with U21, a 21, a GPIO3 pin of the main control unit U21 is respectively connected with an A0 pin of the main control unit U12 and an A0 pin of the main control unit U13, a GPIO4 pin of the main control unit U21 is respectively connected with an A1 pin of the main control unit U12 and an A1 pin of the main control unit U13, and a GPIO5 pin of the main control unit U21 is respectively connected with an A2 pin of the main control unit U12 and an A2 pin of the main control unit U13; the GPIO6 pin of the main control unit U21 is respectively connected with the A0 pin of the main control unit U20;
the VOP pin of the main control unit U21 is connected with the analog-digital conversion unit through a resistor R3, one end of the resistor R3 close to the analog-digital conversion unit is also connected with a capacitor C13, the other end of the capacitor C13 is grounded, the VON pin of the main control unit U21 is connected with the analog-digital conversion unit through the resistor R2, one end of the resistor R2 close to the analog-digital conversion unit is also connected with a capacitor C39, the other end of the capacitor C39 is grounded, and a capacitor C14 is also connected between the capacitor C13 and the capacitor C39; the SDO pin, the SDI pin and the SCLK pin of the main control unit U21 are connected with the controller through an SPI bus, the VSP pin of the main control unit U21 is connected with a +15V power supply end, the VSN pin of the main control unit U21 is connected with a-15V power supply end, the VSOP pin of the main control unit U21 is connected with an AVCC end, the DVDD pin of the main control unit U21 is connected with a 3.3V power supply end, and the VSON pin and the DGND pin of the main control unit U21 are grounded.
Further, a capacitor DC21A and a capacitor DC21B are connected in series between the VSP pin and the VSN pin of the main control unit U21, and a connection line between the capacitor DC21A and the capacitor DC21B is grounded;
a capacitor DC12A and a capacitor DC12B are connected in series between the VCC pin and the VSS pin of the main control unit U12, and a connecting line between the capacitor DC12A and the capacitor DC12B is grounded;
a capacitor DC13A and a capacitor DC13B are connected in series between a VCC pin and a VSS pin of the main control unit U13, and a connecting line between the capacitor DC13A and the capacitor DC13B is grounded;
a capacitor DC14A and a capacitor DC14B are connected in series between the VCC pin and the VSS pin of the main control unit U14, and a connecting line between the capacitor DC14A and the capacitor DC14B is grounded;
a capacitor DC15A and a capacitor DC15B are connected in series between the VCC pin and the VSS pin of the main control unit U15, and a connecting line between the capacitor DC15A and the capacitor DC15B is grounded;
a capacitor DC16A and a capacitor DC16B are connected in series between the VCC pin and the VSS pin of the main control unit U16, and a connecting line between the capacitor DC16A and the capacitor DC16B is grounded;
a capacitor DC17A and a capacitor DC17B are connected in series between the VCC pin and the VSS pin of the main control unit U17, and a connecting line between the capacitor DC17A and the capacitor DC17B is grounded;
a capacitor DC20A and a capacitor DC20B are connected in series between the VCC pin and the VSS pin of the main control unit U20, and a connecting line between the capacitor DC20A and the capacitor DC20B is grounded;
a capacitor DC39A and a capacitor DC39B are connected in series between the VCC pin and the VSS pin of the main control unit U39, and a connection line between the capacitor DC39A and the capacitor DC39B is grounded.
Further, EN pins of the main control unit U12, the main control unit U13, the main control unit U14, the main control unit U14, the main control unit U15, the main control unit U16, the main control unit U17, the main control unit U20, and the main control unit U39 are connected to the AVCC terminal through a resistor R1.
Further, the analog-to-digital conversion unit includes a main control unit U19, an AIN1+ pin connecting resistor R3 of the main control unit U19, an AIN 1-pin connecting resistor R2 of the main control unit U19, an IOUT1 pin of the main control unit U19 is connected to a DA pin of the main control unit U20, an SCLK pin, a DIN pin, and a DOUT pin of the main control unit U19 are connected to the controller through an SPI bus, an AVDD pin of the main control unit U19 is connected to a VCC terminal through a resistor R51, the AVDD pin of the main control unit U19 is further grounded through a capacitor C33 and a capacitor C37, a capacitor C33 and a capacitor C37 are connected in parallel, a DVDD pin of the main control unit U19 is connected to a 3.3V power supply terminal, a DVDD pin of the main control unit U19 is further grounded through a capacitor C36, and a GND pin of the main control unit U19 is grounded.
Compared with the prior art, the general analog signal acquisition circuit has the following beneficial effects:
(1) the analog signal general acquisition circuit is characterized in that a switch matrix is arranged, the front stage of the switch matrix is connected with a sensor through an access channel, the rear stage of the switch matrix is sequentially connected with a gain amplifier, an analog-to-digital converter and a controller, the switch matrix can simultaneously support general acquisition of various analog signal types under the control of the controller, signals output by the switch matrix can be amplified to a voltage range used by a rear-stage analog-to-digital conversion unit by arranging the gain amplifier, the analog-to-digital conversion unit can realize the functions of converting the analog signals into digital signals, setting exciting current and the like, and the controller can realize the function of providing switching control signals for the switch matrix;
(2) the general analog signal acquisition circuit provided by the utility model realizes signal acquisition of sensors of different channels by using the signal acquisition circuit, and realizes switching of different signal sampling modes by using the signal selection circuit.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate an embodiment of the utility model and, together with the description, serve to explain the utility model and not to limit the utility model. In the drawings:
fig. 1 is a schematic diagram of a general analog signal acquisition circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an information acquisition circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an information selection circuit according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of a gain amplifier and an analog-to-digital conversion unit according to an embodiment of the present invention;
FIG. 5 is a circuit diagram of an access channel of a platinum resistance sensor according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of an access channel of a differential voltage sensor according to an embodiment of the present invention;
FIG. 7 is a circuit diagram of a single-ended voltage sensor access channel according to an embodiment of the present invention;
fig. 8 is a circuit diagram of a current sensor access channel according to an embodiment of the utility model.
Detailed Description
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.
Referring to fig. 1, a general analog signal acquisition circuit includes a gain amplifier, an input terminal of the gain amplifier is connected to a switch matrix, the switch matrix is connected to multiple access channels, each access channel can be connected to a sensor, and the sensor includes a resistance sensor, a differential voltage sensor, a single-ended voltage sensor, and a current sensor;
the output end of the gain amplifier is connected with the digital-to-analog conversion unit, and the digital-to-analog conversion unit and the gain amplifier are both connected with the controller through the SPI communication bus;
the switch matrix comprises a signal acquisition circuit, the input end of the signal acquisition circuit is connected with the access channel, the output end of the signal acquisition circuit is connected with a signal selection circuit, and the signal selection circuit is connected with the gain amplifier; the switch matrix and the gain amplifier adopt a +/-15V power supply, so that the range of input signals is greatly improved, and external interference is reduced.
As shown in fig. 5 to 8, the access channel includes an access channel one, an access channel two, an access channel three, and an access channel four; each access channel is provided with a connecting port for connecting a sensor, the connecting port comprises four terminals, in the embodiment, a terminal I is taken as a star, a terminal II is taken as a plus, a terminal III is taken as a minus, and a terminal IV is taken as an R, the resistance sensor adopted in the technical scheme is a platinum resistance sensor, and when the platinum resistance sensor is accessed, a four-wire wiring mode is adopted for accessing star, plus, minus and R ends respectively; when the single-end voltage sensor is switched in, all the sensors can be used, so that the number of the switched-in sensors can be increased; when the differential voltage sensor is connected, the two signal wires are respectively connected to the +, -ends; when the current sensor is connected, the R end needs to be connected.
The resistance sensor adopted in the technical scheme takes a platinum resistance sensor as an example, and adopts a four-wire wiring mode, namely 2 power wires and 2 signal wires are included; the positive ends of the 2 power lines are connected with an excitation current source IOUT1 through a switch, and the current source is only turned on when the platinum resistance sensor is collected; the negative ends of the 2 power lines are connected with the end R and flow into the precision resistor with the end R connected in series; the positive and negative terminals of the 2 signal lines are respectively connected with a signal acquisition circuit of the switch matrix and respectively output a CH _ + signal and a CH _ -signal; the R terminal voltage is accessed to a signal acquisition circuit of the switch matrix, and the CH _ R signal and the CH _ R-signal are respectively output; and then the signals enter a signal selection circuit of the switch matrix to output an A1+ signal and an A1-signal in a time-sharing manner, and the paired signals enter a gain amplifier to carry out signal gain adjustment and finally enter an analog-to-digital conversion unit.
The differential voltage sensor adopts a two-wire wiring mode, namely comprises 2 signal wires; the positive and negative terminals of the 2 signal lines are respectively connected with a signal acquisition circuit of the switch matrix and respectively output a CH _ + signal and a CH _ -signal; then enters a signal selection circuit of the switch matrix, and simultaneously outputs an A1+ signal and an A1-signal, and the paired signals enter a gain amplifier for signal gain adjustment and finally enter an analog-to-digital conversion unit.
The single-end voltage sensor adopts a single-wire wiring mode, and can use both + and + signals, and the single signal wire is connected with the signal acquisition circuit of the switch matrix from one of the + signal, the + signal and the + signal, and respectively outputs a CH signal or a CH + signal or a CH signal and an AGND signal; then enters a signal selection circuit of the switch matrix, and simultaneously outputs an A1+ signal and an A1-signal, and the paired signals enter a gain amplifier for signal gain adjustment and finally enter an analog-to-digital conversion unit.
The current sensor enters through an R end in a single-wire wiring mode, a 100-ohm precision resistor is connected in series in the R end, current is converted into voltage and then is connected to a signal acquisition circuit of a switch matrix, and CH _ R signals and CH _ R-signals are output respectively; then enters a signal selection circuit of the switch matrix, and simultaneously outputs an A1+ signal and an A1-signal, and the paired signals enter a gain amplifier for signal gain adjustment and finally enter an analog-to-digital conversion unit.
The access channel I comprises a connection port J1, a terminal I of the connection port J1 is connected with a signal acquisition circuit through a resistor R11, a terminal II of the connection port J1 is connected with the signal acquisition circuit through a resistor R12, a terminal III of the connection port J1 is connected with the signal acquisition circuit through a resistor R13, a terminal IV of the connection port J1 is connected with the signal acquisition circuit, a connection line between a terminal IV of the connection port J1 and the signal acquisition circuit is grounded through a resistor R14 and a resistor R15 in sequence, and a connection line between a resistor R14 and a resistor R15 is also connected with the signal acquisition circuit;
the access channel II comprises a connection port J2, a terminal II of the connection port J2 is connected with the signal acquisition circuit through a resistor R22, and a terminal III of the connection port J1 is connected with the signal acquisition circuit through a resistor R23;
the access channel III comprises a connection port J3, a first terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R31, a second terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R32, and a third terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R33;
the access channel IV comprises a connection port J4, a connection line between the terminal IV of the connection port J4 and the signal acquisition circuit is grounded through a resistor R44 and a resistor R45 in sequence, and a connection line between a resistor R44 and a resistor R45 is connected with the signal acquisition circuit.
The analog quantity connection port is a four-wire port, different types of equipment signals are connected into a gain amplifier through a CMOS switch matrix configuration input terminal and a measurement mode, the gain amplifier is connected with an analog-to-digital conversion unit in series, the gain amplifier and the analog-to-digital conversion unit are both connected with a controller through an SPI bus, the gain amplifier adopts a PGA280 type chip, the analog-to-digital conversion unit adopts an AD7792BRU type chip, an IO interface of the PGA280 chip is connected with a switch matrix channel selection pin, the controller controls IO output of the PGA280 chip through sending an instruction so as to control a switch matrix, a gain control circuit is arranged in the PGA280 chip, the controller can control output amplification times of the PGA280 chip through the instruction, the output end of the PGA280 chip is connected with the input end of an AD7792BRU chip, and the AD7792BRU chip converts input voltage signals into digital signals for the controller to use; in addition, the AD7793 is internally provided with an excitation current generator, and can provide stable current for external passive devices.
As shown in fig. 2, the signal acquisition circuit includes a main control unit U14, a main control unit U15, a main control unit U16, a main control unit U17, a main control unit U39, and a main control unit U20; the main control unit U14, the main control unit U15, the main control unit U16, the main control unit U17 and the main control unit U39 adopted in the technical scheme are MUX508 type chips, the main control unit U20 adopts a MUX509 type chip, the S1 pin of the main control unit U14 is respectively connected with the other end of the resistor R11 and the other end of the resistor R21, the A0, A1 and A2 pins of the main control unit U14 are connected with a gain amplifier, the D pin of the main control unit U14 is connected with a signal selection circuit through the resistor R53, the D pin of the main control unit U14 is also connected with the main control unit U20 through R52, the VCC pin of the main control unit U14 is connected with a +15V power supply terminal, the VSS pin of the main control unit U14 is connected with a-15V power supply terminal, and the GND pin of the main control unit U14 is grounded;
the S1 pin of the main control unit U15 is respectively connected with the other end of the resistor R12, the other end of the resistor R22 and the other end of the resistor R32, the A0, A1 and A2 pins of the main control unit U15 are connected with a gain amplifier, the D pin of the main control unit U15 is connected with a digital-to-analog conversion unit, the VCC pin of the main control unit U15 is connected with a +15V power supply end, the VSS pin of the main control unit U15 is connected with a-15V power supply end, and the GND pin of the main control unit U15 is grounded;
the S1 pin of the main control unit U16 is respectively connected with the other end of the resistor R13, the other end of the resistor R23 and the other end of the resistor R33, the A0, A1 and A2 pins of the main control unit U16 are connected with a gain amplifier, the D pin of the main control unit U16 is connected with a digital-to-analog conversion unit, the VCC pin of the main control unit U16 is connected with a +15V power supply end, the VSS pin of the main control unit U16 is connected with a-15V power supply end, and the GND pin of the main control unit U16 is grounded;
the S1 pin of the main control unit U17 is respectively connected with the fourth terminal of the connection port J1 and the fourth terminal of the connection port J4, the A0, A1 and A2 pins of the main control unit U17 are connected with the gain amplifier, the D pin of the main control unit U17 is connected with the digital-to-analog conversion unit, the VCC pin of the main control unit U17 is connected with the +15V power supply end, the VSS pin of the main control unit U17 is connected with the-15V power supply end, and the GND pin of the main control unit U16 is grounded;
the S1 pin of the main control unit U39 is connected with a connecting line between the resistor R14 and the resistor R15, the A0, A1 and A2 pins of the main control unit U39 are connected with the gain amplifier, the D pin of the main control unit U39 is connected with the digital-to-analog conversion unit, the VCC pin of the main control unit U39 is connected with a +15V power supply end, the VSS pin of the main control unit U39 is connected with-15V power supply end, and the GND pin of the main control unit U39 is grounded;
the main control unit U20 has S1A pin connected to the other end of the resistor R52, the main control unit U20 has A0 pin connected to the gain amplifier, the main control unit U20 has DA pin connected to IOUT1 pin of the main control unit U19, the main control unit U19 is AD7792BRU type chip with built-in exciting current generator, when collecting platinum resistance sensor signal, it can provide exciting current source for platinum resistance sensor sampling, the main control unit U20 has A1 pin connected to the signal selecting circuit, the main control unit U20 has VCC pin connected to +15V power supply terminal, the main control unit U20 has VSS pin connected to-15V power supply terminal, and the main control unit U20 has GND pin connected to ground.
As shown in fig. 3, the signal selection circuit includes a main control unit U12 and a main control unit U13, the main control unit U12 and the main control unit U13 adopt a MUX508 model chip, an S1 pin and an S3 pin of the main control unit U12 are both connected to a D pin of the main control unit U15, an S2 pin of the main control unit U12 is connected to the other end of a resistor R53, an S4 pin of the main control unit U12 is connected to a D pin of the main control unit U16, an S5 pin of the main control unit U12 is connected to a D pin of the main control unit U17, a D pin of the main control unit U12 is connected to a gain amplifier, pins a0, a1, and a2 of the main control unit U12 are all connected to a gain amplifier, a VCC pin of the main control unit U12 is connected to +15V, a VSS pin of the main control unit U12 is connected to-15V, and a power supply terminal GND of the main control unit U12 is grounded;
the S1 pin of the main control unit U13 is connected with the D pin of the main control unit U16, the S2 pin, the S3 pin and the S4 pin of the main control unit U13 are all connected with the A1 pin of the main control unit U20, the S5 pin of the main control unit U13 is connected with the D pin of the main control unit U39, the A0, A1 and A2 pins of the main control unit U13 are all connected with a gain amplifier, the VCC pin of the main control unit U13 is connected with a +15V power supply terminal, the VSS pin of the main control unit U13 is connected with a-15V power supply terminal, and the GND pin of the main control unit U13 is grounded.
As shown in fig. 4, the gain amplifier includes a main control unit U21, a main control unit U21 adopted in this technical solution is a PGA280 model chip, an INP1 pin of the main control unit U21 is connected to a D pin of the main control unit U12, an INN1 pin of the main control unit U21 is connected to a D pin of the main control unit U13, a GPIO0 pin of the main control unit U21 is connected to an a0 pin of the main control unit U14, an a0 pin of the main control unit U15, an a0 pin of the main control unit U16, an a0 pin of the main control unit U17 and an a0 pin of the main control unit U0, a0 pin of the main control unit U0 is connected to an a0 pin of the main control unit U0, an a0 pin of the main control unit U0 and a0 pin of the main control unit U0, an INN pin of the main control unit U0 is connected to the main control unit U0, an a0 pin of the main control unit 0, a0 of the main control unit 0 is connected to a0 of the main control unit 0, a0 of the main control unit 0 and a0 of the main control unit 0 is connected to a0 of the main control unit 0 and a0 of the main control unit 0 is connected to a0 and a0 of the main control unit 0 is connected to a0 of the main control unit 0 and a0 of the main control unit 0 is connected to a0 of the main control unit 0 and a0 of the main control unit 0 is connected to a0 of the main control unit 0 and a0 is connected to the main control unit 0 and a0 of the main control unit 0 is connected to the main control unit 0 and a0 of the main control unit 685, An A2 pin of the main control unit U16, an A2 pin of the main control unit U17 and an A2 pin of the main control unit U39, a GPIO3 pin of the main control unit U21 is respectively connected with an A0 pin of the main control unit U12 and an A0 pin of the main control unit U13, a GPIO4 pin of the main control unit U21 is respectively connected with an A1 pin of the main control unit U12 and an A1 pin of the main control unit U13, and a GPIO5 pin of the main control unit U21 is respectively connected with an A2 pin of the main control unit U12 and an A2 pin of the main control unit U13; the GPIO6 pin of the main control unit U21 is respectively connected with the A0 pin of the main control unit U20;
the VOP pin of the main control unit U21 is connected with the analog-digital conversion unit through a resistor R3, one end of the resistor R3 close to the analog-digital conversion unit is also connected with a capacitor C13, the other end of the capacitor C13 is grounded, the VON pin of the main control unit U21 is connected with the analog-digital conversion unit through the resistor R2, one end of the resistor R2 close to the analog-digital conversion unit is also connected with a capacitor C39, the other end of the capacitor C39 is grounded, and a capacitor C14 is also connected between the capacitor C13 and the capacitor C39; the SDO pin, the SDI pin and the SCLK pin of the main control unit U21 are connected with a controller through an SPI bus, the VSP pin of the main control unit U21 is connected with a +15V power supply end, the VSN pin of the main control unit U21 is connected with a-15V power supply end, the VSOP pin of the main control unit U21 is connected with an AVCC end, the DVDD pin of the main control unit U21 is connected with a 3.3V power supply end, and the VSON pin and the DGND pin of the main control unit U21 are grounded; the gain amplifier adopts a PGA280 chip, can amplify and adjust an input signal to a reasonable voltage range through gain, is connected with the controller through an SPI bus, receives a command of the controller, and simultaneously receives a command through the SPI bus to output 7 paths of control signals CHA 1-CHA 7 for controlling the switching of a switch matrix.
A capacitor DC21A and a capacitor DC21B are connected in series between the VSP pin and the VSN pin of the main control unit U21, and a connection line between the capacitor DC21A and the capacitor DC21B is grounded;
a capacitor DC12A and a capacitor DC12B are connected in series between the VCC pin and the VSS pin of the main control unit U12, and a connecting line between the capacitor DC12A and the capacitor DC12B is grounded;
a capacitor DC13A and a capacitor DC13B are connected in series between a VCC pin and a VSS pin of the main control unit U13, and a connecting line between the capacitor DC13A and the capacitor DC13B is grounded;
a capacitor DC14A and a capacitor DC14B are connected in series between the VCC pin and the VSS pin of the main control unit U14, and a connecting line between the capacitor DC14A and the capacitor DC14B is grounded;
a capacitor DC15A and a capacitor DC15B are connected in series between the VCC pin and the VSS pin of the main control unit U15, and a connecting line between the capacitor DC15A and the capacitor DC15B is grounded;
a capacitor DC16A and a capacitor DC16B are connected in series between the VCC pin and the VSS pin of the main control unit U16, and a connecting line between the capacitor DC16A and the capacitor DC16B is grounded;
a capacitor DC17A and a capacitor DC17B are connected in series between the VCC pin and the VSS pin of the main control unit U17, and a connecting line between the capacitor DC17A and the capacitor DC17B is grounded;
a capacitor DC20A and a capacitor DC20B are connected in series between the VCC pin and the VSS pin of the main control unit U20, and a connecting line between the capacitor DC20A and the capacitor DC20B is grounded;
a capacitor DC39A and a capacitor DC39B are connected in series between the VCC pin and the VSS pin of the main control unit U39, and a connection line between the capacitor DC39A and the capacitor DC39B is grounded.
The EN pins of the main control unit U12, the main control unit U13, the main control unit U14, the main control unit U14, the main control unit U15, the main control unit U16, the main control unit U17, the main control unit U20 and the main control unit U39 are connected with an AVCC terminal through a resistor R1.
As shown in fig. 4, the analog-to-digital conversion unit includes a main control unit U19, the main control unit U19 adopted in the present technical solution is an AD7792BRU model chip, an AIN1+ pin of the main control unit U19 is connected with a resistor R3, an AIN 1-pin of the main control unit U19 is connected with a resistor R2, an IOUT1 pin of the main control unit U19 is connected with a DA pin of the main control unit U20, an SCLK pin, a DIN pin, and a DOUT pin of the main control unit U19 are connected with a controller through an SPI bus, the controller adopted in the present technical solution is an STM32F103 model chip, which is not further improved in the present patent application, the pin connection of a specific chip is not described any further, an AVDD pin of the main control unit U19 is connected with a VCC terminal through a resistor R51, an AVDD pin of the main control unit U19 is further grounded through a capacitor C33, a capacitor C37, a capacitor C33 and a capacitor C37 are connected in parallel, a dd pin of the main control unit U19 is connected with a DVDD pin 3.3V 3, and a power supply terminal of the main control unit U19 is also grounded through a capacitor C867, the GND pin of master control unit U19 is connected to ground.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (8)
1. A general acquisition circuit of analog signal which characterized in that: the sensor comprises a gain amplifier, wherein the input end of the gain amplifier is connected with a switch matrix, the switch matrix is connected with a plurality of access channels, each access channel can be connected with a sensor, and the sensor comprises a resistance sensor, a differential voltage sensor, a single-ended voltage sensor and a current sensor;
the output end of the gain amplifier is connected with the digital-to-analog conversion unit, and the digital-to-analog conversion unit and the gain amplifier are both connected with the controller through the SPI communication bus;
the switch matrix comprises a signal acquisition circuit, the input end of the signal acquisition circuit is connected with the access channel, the output end of the signal acquisition circuit is connected with a signal selection circuit, and the signal selection circuit is connected with the gain amplifier.
2. The general analog signal acquisition circuit of claim 1, wherein: the access channel comprises an access channel I, an access channel II, an access channel III and an access channel IV, each access channel is provided with a connecting port for connecting the sensor, and the connecting port comprises four terminals;
the access channel I comprises a connection port J1, a terminal I of the connection port J1 is connected with a signal acquisition circuit through a resistor R11, a terminal II of the connection port J1 is connected with the signal acquisition circuit through a resistor R12, a terminal III of the connection port J1 is connected with the signal acquisition circuit through a resistor R13, a terminal IV of the connection port J1 is connected with the signal acquisition circuit, a connection line between a terminal IV of the connection port J1 and the signal acquisition circuit is grounded through a resistor R14 and a resistor R15 in sequence, and a connection line between a resistor R14 and a resistor R15 is also connected with the signal acquisition circuit;
the access channel II comprises a connection port J2, a terminal II of the connection port J2 is connected with the signal acquisition circuit through a resistor R22, and a terminal III of the connection port J1 is connected with the signal acquisition circuit through a resistor R23;
the access channel III comprises a connection port J3, a first terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R31, a second terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R32, and a third terminal of the connection port J3 is connected with the signal acquisition circuit through a resistor R33;
the access channel IV comprises a connection port J4, a connection line between the terminal IV of the connection port J4 and the signal acquisition circuit is grounded through a resistor R44 and a resistor R45 in sequence, and a connection line between a resistor R44 and a resistor R45 is connected with the signal acquisition circuit.
3. The general analog signal acquisition circuit of claim 2, wherein: the signal acquisition circuit comprises a main control unit U14, a main control unit U15, a main control unit U16, a main control unit U17, a main control unit U39 and a main control unit U20; the S1 pin of the main control unit U14 is respectively connected with the other end of the resistor R11 and the other end of the resistor R21, the A0, A1 and A2 pins of the main control unit U14 are connected with the gain amplifier, the D pin of the main control unit U14 is connected with the signal selection circuit through the resistor R53, the D pin of the main control unit U14 is also connected with the main control unit U20 through R52, the VCC pin of the main control unit U14 is connected with a +15V power supply end, the VSS pin of the main control unit U14 is connected with a-15V power supply end, and the GND pin of the main control unit U14 is grounded;
the S1 pin of the main control unit U15 is respectively connected with the other end of the resistor R12, the other end of the resistor R22 and the other end of the resistor R32, the A0, A1 and A2 pins of the main control unit U15 are connected with a gain amplifier, the D pin of the main control unit U15 is connected with a digital-to-analog conversion unit, the VCC pin of the main control unit U15 is connected with a +15V power supply end, the VSS pin of the main control unit U15 is connected with a-15V power supply end, and the GND pin of the main control unit U15 is grounded;
the S1 pin of the main control unit U16 is respectively connected with the other end of the resistor R13, the other end of the resistor R23 and the other end of the resistor R33, the A0, A1 and A2 pins of the main control unit U16 are connected with a gain amplifier, the D pin of the main control unit U16 is connected with a digital-to-analog conversion unit, the VCC pin of the main control unit U16 is connected with a +15V power supply end, the VSS pin of the main control unit U16 is connected with a-15V power supply end, and the GND pin of the main control unit U16 is grounded;
the S1 pin of the main control unit U17 is respectively connected with the fourth terminal of the connection port J1 and the fourth terminal of the connection port J4, the A0, A1 and A2 pins of the main control unit U17 are connected with the gain amplifier, the D pin of the main control unit U17 is connected with the digital-to-analog conversion unit, the VCC pin of the main control unit U17 is connected with the +15V power supply end, the VSS pin of the main control unit U17 is connected with the-15V power supply end, and the GND pin of the main control unit U16 is grounded;
the S1 pin of the main control unit U39 is connected with a connecting line between the resistor R14 and the resistor R15, the A0, A1 and A2 pins of the main control unit U39 are connected with the gain amplifier, the D pin of the main control unit U39 is connected with the digital-to-analog conversion unit, the VCC pin of the main control unit U39 is connected with a +15V power supply end, the VSS pin of the main control unit U39 is connected with-15V power supply end, and the GND pin of the main control unit U39 is grounded;
the S1A pin of the main control unit U20 is connected with the other end of the resistor R52, the DA pin and the A0 pin of the main control unit U20 are both connected with a gain amplifier, the A1 pin of the main control unit U20 is connected with a signal selection circuit, the VCC pin of the main control unit U20 is connected with a +15V power supply end, the VSS pin of the main control unit U20 is connected with a-15V power supply end, and the GND pin of the main control unit U20 is grounded.
4. A general analog signal acquisition circuit according to claim 3, characterized in that: the signal selection circuit comprises a main control unit U12 and a main control unit U13, wherein an S1 pin and an S3 pin of the main control unit U12 are both connected with a D pin of a main control unit U15, an S2 pin of the main control unit U12 is connected with the other end of a resistor R53, an S4 pin of the main control unit U12 is connected with a D pin of a main control unit U16, an S5 pin of the main control unit U12 is connected with a D pin of a main control unit U17, a D pin of the main control unit U12 is connected with a gain amplifier, A0, A1 and A2 pins of the main control unit U12 are all connected with the gain amplifier, a VCC pin of the main control unit U12 is connected with +15V power supply terminal, VSS of the main control unit U12 is connected with-15V power supply terminal, and a GND pin of the main control unit U12 is grounded;
the S1 pin of the main control unit U13 is connected with the D pin of the main control unit U16, the S2 pin, the S3 pin and the S4 pin of the main control unit U13 are all connected with the A1 pin of the main control unit U20, the S5 pin of the main control unit U13 is connected with the D pin of the main control unit U39, the A0, A1 and A2 pins of the main control unit U13 are all connected with a gain amplifier, the VCC pin of the main control unit U13 is connected with a +15V power supply terminal, the VSS pin of the main control unit U13 is connected with a-15V power supply terminal, and the GND pin of the main control unit U13 is grounded.
5. The general analog signal acquisition circuit of claim 4, wherein: the booster amplifier comprises a main control unit U21, an INP1 pin of a main control unit U21 connected to a D pin of the main control unit U12, an INN1 pin of the main control unit U21 connected to a D pin of the main control unit U13, a GPIO 21 pin of the main control unit U21 connected to an A21 pin of the main control unit U21, an A21 pin of the main control unit U21 and an A21 pin of the main control unit U21, a GPIO 21 pin of the main control unit U21 connected to an A21 pin of the main control unit U21, a 21 pin of the main control unit U21 and A21 pin of the main control unit U21, a 21 of the main control unit U21 and a 21 of the main control unit U21, a 21 pin of the main control unit U21, a 21 and a 21 of the main control unit U21, a 21 of the main control unit U21 and a 21 of the main control unit U21 are connected to the main control unit U21, a 21 of the main control unit U21 of the U21 and U21 of the U21, a 21 of the main control unit U21, a 21 of the U21 are connected to the main control unit U21 and a 21 of the main control unit U21, a 21 of the U21 of the main control unit U21, a GPIO3 pin of the main control unit U21 is respectively connected with an A0 pin of the main control unit U12 and an A0 pin of the main control unit U13, a GPIO4 pin of the main control unit U21 is respectively connected with an A1 pin of the main control unit U12 and an A1 pin of the main control unit U13, and a GPIO5 pin of the main control unit U21 is respectively connected with an A2 pin of the main control unit U12 and an A2 pin of the main control unit U13; the GPIO6 pin of the main control unit U21 is respectively connected with the A0 pin of the main control unit U20;
the VOP pin of the main control unit U21 is connected with the analog-digital conversion unit through a resistor R3, one end of the resistor R3 close to the analog-digital conversion unit is also connected with a capacitor C13, the other end of the capacitor C13 is grounded, the VON pin of the main control unit U21 is connected with the analog-digital conversion unit through the resistor R2, one end of the resistor R2 close to the analog-digital conversion unit is also connected with a capacitor C39, the other end of the capacitor C39 is grounded, and a capacitor C14 is also connected between the capacitor C13 and the capacitor C39; the SDO pin, the SDI pin and the SCLK pin of the main control unit U21 are connected with the controller through an SPI bus, the VSP pin of the main control unit U21 is connected with a +15V power supply end, the VSN pin of the main control unit U21 is connected with a-15V power supply end, the VSOP pin of the main control unit U21 is connected with an AVCC end, the DVDD pin of the main control unit U21 is connected with a 3.3V power supply end, and the VSON pin and the DGND pin of the main control unit U21 are grounded.
6. The general analog signal acquisition circuit of claim 5, wherein: a capacitor DC21A and a capacitor DC21B are connected in series between the VSP pin and the VSN pin of the main control unit U21, and a connection line between the capacitor DC21A and the capacitor DC21B is grounded;
a capacitor DC12A and a capacitor DC12B are connected in series between a VCC pin and a VSS pin of the main control unit U12, and a connecting line between the capacitor DC12A and the capacitor DC12B is grounded;
a capacitor DC13A and a capacitor DC13B are connected in series between a VCC pin and a VSS pin of the main control unit U13, and a connecting line between the capacitor DC13A and the capacitor DC13B is grounded;
a capacitor DC14A and a capacitor DC14B are connected in series between the VCC pin and the VSS pin of the main control unit U14, and a connecting line between the capacitor DC14A and the capacitor DC14B is grounded;
a capacitor DC15A and a capacitor DC15B are connected in series between the VCC pin and the VSS pin of the main control unit U15, and a connecting line between the capacitor DC15A and the capacitor DC15B is grounded;
a capacitor DC16A and a capacitor DC16B are connected in series between the VCC pin and the VSS pin of the main control unit U16, and a connecting line between the capacitor DC16A and the capacitor DC16B is grounded;
a capacitor DC17A and a capacitor DC17B are connected in series between the VCC pin and the VSS pin of the main control unit U17, and a connecting line between the capacitor DC17A and the capacitor DC17B is grounded;
a capacitor DC20A and a capacitor DC20B are connected in series between the VCC pin and the VSS pin of the main control unit U20, and a connecting line between the capacitor DC20A and the capacitor DC20B is grounded;
a capacitor DC39A and a capacitor DC39B are connected in series between the VCC pin and the VSS pin of the main control unit U39, and a connection line between the capacitor DC39A and the capacitor DC39B is grounded.
7. The general analog signal acquisition circuit of claim 5, wherein: the EN pins of the main control unit U12, the main control unit U13, the main control unit U14, the main control unit U14, the main control unit U15, the main control unit U16, the main control unit U17, the main control unit U20 and the main control unit U39 are connected with an AVCC terminal through a resistor R1.
8. The general analog signal acquisition circuit of claim 5, wherein: the analog-to-digital conversion unit comprises a main control unit U19, an AIN1+ pin connecting resistor R3 of the main control unit U19, an AIN 1-pin connecting resistor R2 of the main control unit U19, an IOUT1 pin of the main control unit U19 is connected with a DA pin of the main control unit U20, an SCLK pin, a DIN pin and a DOUT pin of the main control unit U19 are connected with a controller through an SPI bus, an AVDD pin of the main control unit U19 is connected with a VCC end through a resistor R51, the AVDD pin of the main control unit U19 is further grounded through a capacitor C33 and a capacitor C37, a capacitor C33 and a capacitor C37 are connected in parallel, the DVDD pin of the main control unit U19 is connected with a 3.3V power supply end, the DVDD pin of the main control unit U19 is further grounded through a capacitor C36, and the GND pin of the main control unit U19 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122984607.6U CN216486061U (en) | 2021-11-30 | 2021-11-30 | General acquisition circuit of analog signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122984607.6U CN216486061U (en) | 2021-11-30 | 2021-11-30 | General acquisition circuit of analog signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216486061U true CN216486061U (en) | 2022-05-10 |
Family
ID=81403454
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122984607.6U Active CN216486061U (en) | 2021-11-30 | 2021-11-30 | General acquisition circuit of analog signal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216486061U (en) |
-
2021
- 2021-11-30 CN CN202122984607.6U patent/CN216486061U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101889863A (en) | High-performance direct current amplification device for acquiring biological electric signals | |
| CN102323466A (en) | Weak signal acquisition and processing circuit | |
| CN216486061U (en) | General acquisition circuit of analog signal | |
| CN106707895A (en) | High-precision synchronous vibration data collection card for various types of detection signals | |
| CN113970900A (en) | General acquisition circuit of analog signal | |
| CN203479876U (en) | Digital multimeter based on PXI/PCI bus | |
| CN210119521U (en) | Multichannel differential sampling system and battery charging equipment | |
| US11610638B2 (en) | Sample holding circuit of reduced complexity and electronic device using the same | |
| CN203693603U (en) | Environment-light-interference-resisting blood oxygen measuring equipment | |
| CN113064097A (en) | Parameter detection device | |
| CN211426816U (en) | Low-power consumption wireless seismic data recording device | |
| CN205506211U (en) | Light signal detection circuit | |
| CN218006205U (en) | Optical acquisition amplifying circuit and device | |
| CN116466123A (en) | High-precision high-current acquisition circuit and method supporting multi-gear switching | |
| CN212675023U (en) | Direct-current micro-current detection circuit | |
| CN104807559A (en) | Multi-channel low-temperature measuring circuit supporting multiple sensors | |
| CN206920019U (en) | A kind of photoelectric detective circuit | |
| CN108469775B (en) | 4-20 mA signal isolation circuit and multifunctional isolation transmitter | |
| CN205608161U (en) | Be applied to full difference mould data acquisition appearance and converting circuit of battery monitoring chip | |
| CN216927392U (en) | Multichannel analog acquisition circuit based on singlechip | |
| CN112147399A (en) | Analog quantity acquisition module and type automatic identification circuit thereof | |
| CN110132427A (en) | A kind of infrared acquisition amplifier applied to Multi spectral thermometry instrument | |
| CN213633597U (en) | Multichannel acquisition system of electric potential acquisition instrument | |
| CN219935966U (en) | High-precision high-current acquisition circuit supporting multi-gear switching | |
| CN220553227U (en) | Data acquisition device of automobile teaching aid and automobile teaching aid system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |