CN216350901U - Current detection device, semiconductor chip, battery management system and electric equipment - Google Patents
Current detection device, semiconductor chip, battery management system and electric equipment Download PDFInfo
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- CN216350901U CN216350901U CN202122202563.7U CN202122202563U CN216350901U CN 216350901 U CN216350901 U CN 216350901U CN 202122202563 U CN202122202563 U CN 202122202563U CN 216350901 U CN216350901 U CN 216350901U
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Abstract
The present disclosure provides a current detection device, including: the detection circuit and the acquisition processing circuit; the detection circuit includes: the charging control field effect transistor and the charging current auxiliary detection field effect transistor; the temperature detection device detects the current temperature of the detection circuit; the acquisition processing circuit includes: an auxiliary current generating device for generating an auxiliary current to flow through at least the charging current auxiliary detection field effect transistor in a conducting state; the voltage acquisition device at least acquires the voltage between the source and the drain of the charging current auxiliary detection field effect transistor through which the auxiliary current flows and the voltage between the source and the drain of the charging control field effect transistor through which the charged current flows; and the logic processing circuit is used for acquiring the magnitude of the charging current at least based on the charging current auxiliary detection field effect transistor source-drain electrode voltage, the charging control field effect transistor source-drain electrode voltage and the auxiliary current. The disclosure also provides a semiconductor chip, a battery management system and electric equipment.
Description
Technical Field
The present disclosure relates to the field of current detection/measurement technologies, and in particular, to a current detection device, a semiconductor chip, a battery management system, and an electric device.
Background
In the prior art, electric vehicles, mobile phones and the like use battery packs (or battery units and battery packs) to provide electric energy, the electric energy needs to be provided for loads through discharging of the battery packs, and an external charger is also needed to charge the battery packs.
In the charging and discharging processes of the battery pack, the charging current and the discharging current need to be detected, so that safety accidents are avoided.
In the prior art, a current detection mode is generally provided with a detection resistor in a battery pack loop, however, the arrangement of the detection resistor inevitably causes energy loss, heat generation and the like, and a plurality of adverse results are caused.
In addition, the magnitude of the charge and discharge current is often changed, and the charge and discharge current needs to be accurately measured.
In the prior art, the charging and discharging current is generally measured by adopting a current detecting resistor Rsns, however, due to the use of Rsns, higher requirements are put on the on-resistance of the charging and discharging control FET, so that the manufacturing of the charging and discharging control FET is more complicated.
SUMMERY OF THE UTILITY MODEL
In order to solve at least one of the above technical problems, the present disclosure provides a current detection device, a semiconductor chip, a battery management system, and an electric device.
According to an aspect of the present disclosure, there is provided a current detection apparatus including:
the detection circuit and the acquisition processing circuit;
the detection circuit includes: the grid electrode of the charging control field effect transistor is used for receiving a control signal to be in a conducting state; the drain electrode of the charging current auxiliary detection field effect tube is connected with the drain electrode of the charging control field effect tube, and the grid electrode of the charging current auxiliary detection field effect tube is used for receiving a control signal to be in a conducting state; and a temperature detection device that detects a current temperature of the detection circuit;
the acquisition processing circuit includes:
an auxiliary current generating device that generates an auxiliary current to flow through at least the charging current auxiliary detection field effect transistor in a conduction state; the voltage acquisition device at least acquires the voltage between the source and the drain of the charging current auxiliary detection field effect transistor through which the auxiliary current flows and the voltage between the source and the drain of the charging control field effect transistor through which the charged current flows; and the logic processing circuit obtains the magnitude of the charging current at least based on the voltage between the source and the drain of the charging current auxiliary detection field effect transistor, the voltage between the source and the drain of the charging control field effect transistor and the auxiliary current.
According to the current detection device of at least one embodiment of the present disclosure, the detection circuit is disposed or formed on a first semiconductor chip, and the collection processing circuit is disposed or formed on a second semiconductor chip.
According to the current detection device of at least one embodiment of this disclosure, the detection circuit further includes: the grid electrode of the discharge control field effect transistor is used for receiving a control signal to be in a conducting state; and the drain electrode of the discharge current auxiliary detection field effect tube is connected with the drain electrode of the discharge control field effect tube, and the grid electrode of the discharge current auxiliary detection field effect tube is used for receiving a control signal to be in a conducting state.
According to the current detection device of at least one embodiment of the present disclosure, the charge control fet and the discharge control fet are connected in series so that the charge control fet and the discharge control fet can be disposed in a charge and discharge circuit.
According to the current detection device of at least one embodiment of the present disclosure, the drain electrode of the charge control fet is connected to the drain electrode of the discharge control fet, the drain electrode of the charge current auxiliary detection fet is connected to the drain electrode of the charge control fet, and the drain electrode of the discharge current auxiliary detection fet is connected to the drain electrode of the discharge control fet.
According to the current detection device of at least one embodiment of the present disclosure, the temperature detection device detects the present temperature of the charge control fet.
According to the current detection device of at least one embodiment of the present disclosure, the charge control fet and the discharge control fet are disposed between the positive terminal of the battery pack and the positive terminal of the battery device in the battery pack.
According to the current detection device of at least one embodiment of the present disclosure, the acquisition processing circuit further includes a FET driver, and the FET driver is configured to provide a control signal to the gate of the charge control FET, provide a control signal to the gate of the discharge control FET, provide a control signal to the gate of the charge current auxiliary detection FET, and provide a control signal to the gate of the discharge current auxiliary detection FET.
The current detection device according to at least one embodiment of the present disclosure further includes a zero temperature coefficient resistor; the auxiliary current generated by the auxiliary current generating device can respectively flow through the zero-temperature-coefficient resistor and the charging current auxiliary detection field effect transistor in a conducting state; the voltage acquisition device comprises a first voltage acquisition part, and the first voltage acquisition part acquires the voltage at two ends of the zero temperature coefficient resistor when the auxiliary current flows through the zero temperature coefficient resistor.
According to the current detection device of at least one embodiment of the present disclosure, the logic processing circuit includes a multiplication-division operation circuit.
According to the current detection device of at least one embodiment of the present disclosure, the voltage acquisition device includes a second voltage acquisition portion and a third voltage acquisition portion, the second voltage acquisition portion at least acquires the voltage between the source and the drain when the charging current auxiliary detection field effect transistor is flowed through by the auxiliary current, and the third voltage acquisition portion at least acquires the voltage between the source and the drain when the charging control field effect transistor is flowed through by the charging current.
According to the current detection device of at least one embodiment of the present disclosure, the auxiliary current generation device is a current mirror, and the current mirror is preferably a 1:1 current mirror.
According to the current detection device of at least one embodiment of the present disclosure, the logic processing circuit obtains the on-resistance of the charging current auxiliary detection field-effect transistor at the current temperature based on the resistance value of the zero temperature coefficient resistor, the voltage at two ends of the zero temperature coefficient resistor, and the voltage between the source and the drain of the charging current auxiliary detection field-effect transistor when the charging current auxiliary detection field-effect transistor is flowed by the auxiliary current;
the logic processing circuit obtains a proportionality coefficient of the conduction impedance of the field effect transistor along with the temperature change based on the conduction impedance of the charging current auxiliary detection field effect transistor at the current temperature and the conduction impedance of the charging current auxiliary detection field effect transistor at the reference temperature;
the logic processing circuit obtains the on-resistance of the charging control field effect transistor at the current temperature based on the proportionality coefficient and the on-resistance of the charging control field effect transistor at the reference temperature;
namely: the multiplication and division operation circuit obtains the on-resistance of the charging control field effect transistor at the current temperature based on the on-resistance of the charging current auxiliary detection field effect transistor at the current temperature, the on-resistance of the charging control field effect transistor at the reference temperature and the on-resistance of the charging control field effect transistor at the reference temperature.
According to the current detection device of at least one embodiment of the present disclosure, the multiplication-division operation circuit obtains the charging current flowing through the charge control fet based on the voltage between the source and the drain when the charge control fet is flowed by the charging current and the on-resistance at the present temperature.
According to the current detection device of at least one embodiment of the present disclosure, the on-resistance of the charge control fet at the reference temperature is a previously obtained on-resistance.
According to the current detection device of at least one embodiment of the present disclosure, the FET driver supplies control signals to the gate of the charge control FET, the gate of the discharge control FET, the gate of the charge current auxiliary detection FET, and the gate of the discharge current auxiliary detection FET, so that the charging control field effect tube, the discharging control field effect tube, the charging current auxiliary detection field effect tube and the discharging current auxiliary detection field effect tube are all in a conducting state, the testing charging current is injected into the positive terminal of the battery pack, the third voltage acquisition part acquires the voltage between the source electrode and the drain electrode of the charge control field effect transistor, and the logic processing circuit obtains the on-resistance of the charge control field effect transistor at the reference temperature based on the voltage between the source and the drain when the charge control field effect transistor is passed through the test charging current and the test charging current.
According to the current detection device of at least one embodiment of the present disclosure, the charging current assists in detecting that the on-resistance of the field effect transistor at the reference temperature is the on-resistance obtained in advance.
According to the current detection device of at least one embodiment of the present disclosure, the logic processing circuit obtains the on-resistance of the charging current auxiliary detection field-effect transistor at the reference temperature based on the resistance value of the zero temperature coefficient resistor, the voltage at two ends of the zero temperature coefficient resistor, and the voltage between the source and the drain of the charging current auxiliary detection field-effect transistor when the charging current auxiliary detection field-effect transistor is flowed by the auxiliary current.
According to the current detection device of at least one embodiment of the present disclosure, the charge control fet, the charge current auxiliary detection fet, the discharge control fet, and the discharge current auxiliary detection fet are all manufactured or formed using the same material and manufacturing process.
According to the current detection device of at least one embodiment of the present disclosure, a ratio of a channel width-to-length ratio of the charging current auxiliary detection fet to a channel width-to-length ratio of the charging control fet is 1: m, wherein M is greater than or equal to 1.
According to the current detection device of at least one embodiment of the present disclosure, a ratio of a channel width-length ratio of the discharge current auxiliary detection field-effect transistor to a channel width-length ratio of the discharge control field-effect transistor is 1: m, wherein M is greater than or equal to 1.
According to another aspect of the present disclosure, there is provided a semiconductor chip formed with the current detection device of any one of the embodiments of the present disclosure.
According to still another aspect of the present disclosure, there is provided a battery management system including: the current detection device according to any one of the embodiments of the present disclosure controls charging/discharging of the battery device and detects a charging current/discharging current of the battery device.
According to still another aspect of the present disclosure, there is provided an electric device including: a battery device; and the above battery management system, which performs at least charge/discharge control of the battery device and detects a charge current/discharge current of the battery device.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.
Fig. 1 is a schematic circuit configuration diagram of a current detection device according to an embodiment of the present disclosure.
Fig. 2 is one of the operation principle diagrams of the current detection device according to one embodiment of the present disclosure.
Fig. 3 is a second schematic diagram of the operation principle of the current detection device according to an embodiment of the present disclosure.
Fig. 4 is a block diagram schematic structure of a powered device according to one embodiment of the present disclosure.
Description of the reference numerals
10 detection circuit
20 acquisition processing circuit
30 battery device
105 temperature detection device
201 first voltage collecting part
202 second voltage collecting part
203 third voltage collecting part
210 FET driver
220 current source device
230 logic processing circuit
C1 first sampling filter capacitor
C2 second sampling filter capacitor
Res1 first sample filter resistance
Res2 second sampling filter resistance
Res3 third sample filter resistance
Rext zero temperature coefficient resistance.
Detailed Description
The present disclosure will be described in further detail with reference to the drawings and embodiments. It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limitations of the present disclosure. It should be further noted that, for the convenience of description, only the portions relevant to the present disclosure are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict. Technical solutions of the present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
Unless otherwise indicated, the illustrated exemplary embodiments/examples are to be understood as providing exemplary features of various details of some ways in which the technical concepts of the present disclosure may be practiced. Accordingly, unless otherwise indicated, features of the various embodiments may be additionally combined, separated, interchanged, and/or rearranged without departing from the technical concept of the present disclosure.
The use of cross-hatching and/or shading in the drawings is generally used to clarify the boundaries between adjacent components. As such, unless otherwise noted, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, proportion, commonality between the illustrated components and/or any other characteristic, attribute, property, etc., of a component. Further, in the drawings, the size and relative sizes of components may be exaggerated for clarity and/or descriptive purposes. While example embodiments may be practiced differently, the specific process sequence may be performed in a different order than that described. For example, two processes described consecutively may be performed substantially simultaneously or in reverse order to that described. In addition, like reference numerals denote like parts.
When an element is referred to as being "on" or "on," "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the other element or intervening elements may be present. However, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there are no intervening elements present. For purposes of this disclosure, the term "connected" may refer to physically, electrically, etc., and may or may not have intermediate components.
For descriptive purposes, the present disclosure may use spatially relative terms such as "below … …," below … …, "" below … …, "" below, "" above … …, "" above, "" … …, "" higher, "and" side (e.g., "in the sidewall") to describe one component's relationship to another (other) component as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and/or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below … …" can encompass both an orientation of "above" and "below". Further, the devices may be otherwise positioned (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, when the terms "comprises" and/or "comprising" and variations thereof are used in this specification, the presence of stated features, integers, steps, operations, elements, components and/or groups thereof are stated but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof. It is also noted that, as used herein, the terms "substantially," "about," and other similar terms are used as approximate terms and not as degree terms, and as such, are used to interpret inherent deviations in measured values, calculated values, and/or provided values that would be recognized by one of ordinary skill in the art.
The current detection device, the semiconductor chip, the battery management system, and the electric device according to the present disclosure will be described in detail below with reference to fig. 1 to 4.
Referring first to fig. 1, a current detection apparatus according to an embodiment of the present disclosure includes:
a detection circuit 10 and an acquisition processing circuit 20;
the detection circuit 10 includes:
the grid electrode of the charging control field effect transistor Ma is used for receiving a control signal to be in a conducting state;
the drain electrode of the charging current auxiliary detection field effect transistor Sa is connected with the drain electrode of the charging control field effect transistor Ma, and the grid electrode of the charging current auxiliary detection field effect transistor Sa is used for receiving a control signal to be in a conducting state; and the number of the first and second groups,
a temperature detection device Dio1, a temperature detection device Dio1 detects the current temperature T of the detection circuit;
the acquisition processing circuit 20 includes:
an auxiliary current generating means (including a current source means 220) that generates an auxiliary current to flow through at least the charging current auxiliary detection fet Sa in the on state;
the voltage acquisition device at least acquires the voltage between the source and the drain of the charging current auxiliary detection field effect transistor Sa through which the auxiliary current flows and the voltage between the source and the drain of the charging control field effect transistor Ma through which the charged current flows; and the number of the first and second groups,
and the logic processing circuit 230, wherein the logic processing circuit 230 obtains the magnitude of the charging current at least based on the charging current auxiliary detection voltage between the source and the drain of the field effect transistor Sa, the charging control voltage between the source and the drain of the field effect transistor Ma and the auxiliary current.
The logic processing circuit 230 may include a multiplication-division operation circuit to execute a preset operation processing logic to obtain the magnitude of the charging current.
The logic processing circuit 230 may be in the form of a chip or a part of a chip, the circuit structure of the multiplication and division operation circuit may be in the prior art, and the present disclosure is not intended to limit the circuit structure of the logic processing circuit 230.
In fig. 1, the detection circuit 10 is disposed or formed on a first semiconductor chip (or a first portion of a semiconductor chip), and the acquisition processing circuit 20 is disposed or formed on a second semiconductor chip (or a second portion of a semiconductor chip).
In fig. 1, the detection circuit 10 includes a plurality of ports D1, S3, S3R, S1, S1R, G1, G2, S2R, S2, and the like.
In fig. 1, the detection circuit 10 further includes a first sampling filter resistor Res1 (disposed between the source of the Sa tube and the port S1R), a second sampling filter resistor Res2 (disposed between the source of the Sb tube and the port S2R), a third sampling filter resistor Res3 (disposed between the source of the Ma tube and the port S3R), and the detection circuit 10 further includes a first sampling filter capacitor C1 (disposed between the port S3R and the port S1R), and a second sampling filter capacitor C2 (disposed between the port S1R and the port S2R).
In fig. 1, the acquisition processing circuit 20 includes a plurality of ports S3H, D1H, S3RH, S1H, S1RH, CHG, DSG, S2RH, S2H, RT.
The connection mode between each port of the detection circuit 10 and each port of the acquisition processing circuit 20 is shown in fig. 1.
In FIG. 1, PACK + is the positive terminal of the battery PACK, and PACK-is the negative terminal of the battery PACK.
The battery device 30 may be a battery cell or a battery pack composed of a plurality of battery cells.
With the current detection device of the above embodiment, the detection circuit 10 further includes:
a discharge control field effect transistor Mb having a gate for receiving a control signal to be in a conducting state; and the number of the first and second groups,
and the grid electrode of the discharge current auxiliary detection field effect tube Sb is used for receiving a control signal to be in a conducting state.
In fig. 1, each of the field effect transistors Ma, Mb, Sa, Sb of the current detection apparatus of the present disclosure is exemplified by an N-type FET, which can be adjusted by those skilled in the art and falls within the protection scope of the present disclosure.
As shown in fig. 1, the charge control fet Ma and the discharge control fet Mb of the current detection device are connected in series so that the charge control fet Ma and the discharge control fet Mb can be disposed in the charge/discharge circuit.
The drain electrode of the charging control field effect transistor Ma is connected with the drain electrode of the discharging control field effect transistor Mb, the drain electrode of the charging current auxiliary detection field effect transistor Sa is connected with the drain electrode of the charging control field effect transistor Ma, and the drain electrode of the discharging current auxiliary detection field effect transistor Sb is connected with the drain electrode of the discharging control field effect transistor Mb.
With the current detection device of each of the above embodiments, the temperature detection device 105 detects the current temperature of the charge control field effect transistor Ma.
The temperature detection device 105 is preferably a temperature detection diode Dio 1. Fig. 1 exemplarily shows the arrangement position and arrangement manner of the temperature detection diode Dio1, and those skilled in the art can adjust the arrangement position, arrangement manner, and the like of the temperature detection device based on the technical solution of the present disclosure to detect the temperature of the charge control fet Ma and/or the discharge control fet Mb, or detect the temperature of the vicinity of the two.
In the current detection device according to each of the above embodiments, the charge control fet Ma and the discharge control fet Mb are preferably provided between the positive terminal PACK + of the battery PACK and the positive terminal B + of the battery device 30 in the battery PACK.
With the current detection device of each of the above embodiments, the acquisition processing circuit 20 further includes the FET driver 210, and the FET driver 210 is configured to provide a control signal to the gate of the charging control FET Ma, a control signal to the gate of the discharging control FET Mb, a control signal to the gate of the charging current auxiliary detection FET Sa, and a control signal to the gate of the discharging current auxiliary detection FET Sb.
The FET driver generates a control signal (drive signal) which belongs to the prior art, the FET driver may generate the control signal (drive signal) based on preset drive logic, the FET driver may be a semiconductor chip or a part of the semiconductor chip, and the present disclosure is not intended to particularly limit a circuit configuration of the FET driver.
As shown in fig. 1, the FET driver may provide control signals to the gates of the Ma and Sa transistors through ports CHG and G1, and to the gates of the Mb and Sb transistors through ports DSG and G2.
For the current detection device of each of the above embodiments, the current detection device further includes a zero temperature coefficient resistor Rext; the auxiliary current (which may be 1mA during testing and actual use) generated by the auxiliary current generating device 220 can respectively flow through the zero temperature coefficient resistor Rext and the charging current auxiliary detection field effect transistor Sa in a conducting state;
the voltage acquisition device comprises a first voltage acquisition part 201, and the first voltage acquisition part 201 acquires voltage V at two ends of a zero temperature coefficient resistor Rext when an auxiliary current flows through the zero temperature coefficient resistor RextRext。
With regard to the current detection device of each of the above embodiments, it is preferable that the voltage sampling device includes the second voltage sampling portion 202 and the third voltage sampling portion 203, the second voltage sampling portion 202 at least samples the source-drain voltage (Vds _ SaT) when the charging current auxiliary detection fet Sa is flowed by the auxiliary current, and the third voltage sampling portion 203 at least samples the source-drain voltage (Vds _ MaT) when the charging current is flowed by the charging control fet Ma.
As shown in fig. 1, the auxiliary current generating device 220 is a current mirror, preferably a 1:1 current mirror.
With the current detection device of each of the above embodiments, it is preferable that the logic processing circuit 230 is based on the resistance value of the zero temperature coefficient resistor Rext and the voltage V between both ends of the zero temperature coefficient resistor RextRextAnd the charging current assists the voltage Vds _ SaT between the source and the drain when the detection field effect tube Sa is passed by the auxiliary current, and the on-resistance Ron _ SaT of the charging current assists the detection field effect tube Sa under the current temperature T is obtained;
the logic processing circuit 230 obtains a proportionality coefficient β T of the fet on-resistance with temperature change, Ron _ SaT/Ron _ Sa0, based on the on-resistance Ron _ SaT of the charging current auxiliary detection fet Sa at the current temperature T and the on-resistance Ron _ Sa0 of the charging current auxiliary detection fet Sa at the reference temperature (T0, namely FT);
the logic processing circuit 230 obtains the on-resistance Ron _ MaT of the charge control fet Ma at the current temperature T based on the scaling coefficient β T and the on-resistance Ron _ Ma0 of the charge control fet Ma at the reference temperature (T0, that is, at FT);
Ron_MaT＝βT×Ron_Ma0。
according to the method, the charging control field-effect tube Ma, the charging current auxiliary detection field-effect tube Sa, the discharging control field-effect tube Mb and the discharging current auxiliary detection field-effect tube Sb are made or formed by the same material and the same manufacturing process, so that the proportionality coefficient beta T measured by the Sa tube is suitable for the Ma tube.
Namely: the logic processing circuit 230 (multiplication-division operation circuit) obtains the on-resistance Ron _ MaT of the charge control fet Ma at the current temperature T based on the on-resistance Ron _ SaT of the charge current auxiliary detection fet Sa at the current temperature T, the on-resistance Ron _ Sa0 at the reference temperature, and the on-resistance Ron _ Ma0 of the charge control fet Ma at the reference temperature (T0, that is, at FT).
Further, the logic processing circuit 230 (multiplication-division operation circuit) obtains the charging current Ids _ Ma flowing through the charge control field effect transistor Ma based on the voltage Vds _ MaT between the source and the drain when the charge control field effect transistor Ma is flowed by the charging current and the on-resistance Ron _ MaT at the present temperature T.
With the current detection device of each of the above embodiments, the on-resistance Ron _ Ma0 of the charge control fet Ma at the reference temperature (T0, that is, at FT) is the on-resistance obtained in advance. For example, by obtaining it at package test time (FT).
In the current detection device according to each of the above embodiments, it is preferable that the FET driver 210 supplies control signals to the gate of the charge control FET Ma, the gate of the discharge control FET Mb, the gate of the charge current auxiliary detection FET Sa, and the gate of the discharge current auxiliary detection FET Sb so that the charge control FET Ma, the discharge control FET Mb, the charge current auxiliary detection FET Sa, and the discharge current auxiliary detection FET Sb are all in the on state, a test charge current (for example, 1A) is injected into the positive terminal PACK + of the battery PACK, the third voltage collection unit 203 collects the source-drain voltage Vds _ Ma0_1A of the charge control FET Ma at this time, and the logic processing circuit 230 obtains the charge control FET Ma at the reference temperature based on the source-drain voltage s _ Ma0_1A when the charge control FET Ma is flowing through the test charge current 1A and the test charge current (1A) On-resistance Ron _ Ma0 in degrees (T0, i.e., FT), namely Ron _ Ma0 — Vds _ Ma0_ 1A/1A.
Fig. 2 is a schematic diagram showing directions of the test charging current in a form of thick lines, and the third voltage acquisition unit 203 acquires the voltage Vds _ Ma0_1A between the source and the drain of the Ma tube through the port S3RH, the port S3R, and the third sampling filter resistor Res3, and through the port S1RH, the port S1R, the first sampling filter resistor Res1, and the Sa tube, respectively.
With the current detection device according to each of the above embodiments, it is preferable that the on-resistance Ron _ Sa0 of the charging current auxiliary detection fet Sa at the reference temperature T0 be an on-resistance obtained in advance. Can be obtained at the time of package testing.
As shown in FIG. 3, the logic processing circuit 230 of the current detection device is based on the resistance value of the zero temperature coefficient resistor Rext and the voltage V between the two ends of the zero temperature coefficient resistor RextRext0And a source-drain voltage Vds _ Sa0 when the charging current auxiliary detection fet Sa is passed by the auxiliary current, and an on-resistance Ron _ Sa0 of the charging current auxiliary detection fet Sa at a reference temperature T0 is obtained, that is, Ron _ Sa0 is Rext × Vds _ Sa0/VRext0。
FIG. 3 shows the direction of the auxiliary current (1mA) and the voltage V across the zero temperature coefficient resistor Rext through the port RT by the first voltage pickup 201, shown in the form of a thick lineRext0And acquiring, by the second voltage acquiring unit 202, the voltage Vds _ Sa0 between the source and the drain of the Sa tube via the port S1RH, the port S1R, and the first sampling filter resistor Res1, and via the port S2RH, the port S2R, the second sampling filter resistor Res2, and the Sb tube, respectively.
The auxiliary current (1mA) is generated by the current source device 220 so that the auxiliary current flows through the Sa tube, and the mirrored auxiliary current flows through the zero temperature coefficient resistor Rext.
As shown in fig. 1 to 3, the voltage acquisition device preferably includes a first voltage acquisition part 201, a second voltage acquisition part 202, and a third voltage acquisition part 203, and the measurement process of the charging current is described in fig. 1 to 3 by being assisted by a Ma tube, and a person skilled in the art can adjust the number of the voltage acquisition parts to detect the discharging current by being assisted by an Mb tube, which is not described again.
As shown in fig. 1 to 3, each voltage acquisition unit has the same circuit structure, and includes a charge transfer capacitor, a switch group (4 switches), an amplifier and an ADC converter, and it should be noted that the circuit structures of the voltage acquisition units shown in fig. 1 to 3 are only preferred circuit structures of the present disclosure, and those skilled in the art can adjust the circuit structures of the voltage acquisition units according to the teachings of the present disclosure, and all of them fall within the protection scope of the present disclosure.
For the current detection device of each of the above embodiments, it is preferable that the ratio of the channel width-length ratio of the charging current auxiliary detection fet Sa to the channel width-length ratio of the charging control fet Ma is 1: m, wherein M is greater than or equal to 1.
In the present disclosure, the channel width-to-length ratio of the charging current auxiliary detection fet Sa and the channel width-to-length ratio of the charging control fet Ma are preferably equal to each other.
Preferably, the ratio of the channel width-to-length ratio of the discharge current auxiliary detection fet Sb to the channel width-to-length ratio of the discharge control fet Mb is 1: m, wherein M is greater than or equal to 1.
In the present disclosure, the channel width-to-length ratio of the discharge current auxiliary detection fet Sb and the channel width-to-length ratio of the discharge control fet Mb are preferably equal to each other.
According to a semiconductor chip according to an embodiment of the present disclosure, the current detection device according to any one of the above embodiments is formed.
A battery management system according to an embodiment of the present disclosure includes: in the current detection device according to any of the above embodiments, the current detection device controls the charge/discharge of the battery device 30 and detects the charge current/discharge current of the battery device 30.
The present disclosure also provides an electric device, such as a power tool, a portable terminal, an electric vehicle, and the like. As shown in fig. 4, the electric device may include the above-described battery device 30 and the above-described battery management system that performs at least charge/discharge control of the battery device 30 and detects a charge current/discharge current of the battery device 30.
In the description herein, reference to the description of the terms "one embodiment/mode," "some embodiments/modes," "example," "specific example" or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the present disclosure. In this specification, the schematic representations of the terms used above are not necessarily intended to be the same embodiment/mode or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/aspects or examples and features of the various embodiments/aspects or examples described in this specification can be combined and combined by one skilled in the art without conflicting therewith.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, "a plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise.
It will be understood by those skilled in the art that the foregoing embodiments are merely for clarity of illustration of the disclosure and are not intended to limit the scope of the disclosure. Other variations or modifications may occur to those skilled in the art, based on the foregoing disclosure, and are still within the scope of the present disclosure.
Claims (18)
1. A current detecting device, comprising:
the detection circuit and the acquisition processing circuit;
the detection circuit includes:
the grid electrode of the charging control field effect transistor is used for receiving a control signal to be in a conducting state;
the drain electrode of the charging current auxiliary detection field effect tube is connected with the drain electrode of the charging control field effect tube, and the grid electrode of the charging current auxiliary detection field effect tube is used for receiving a control signal to be in a conducting state; and
a temperature detection device that detects a current temperature of the detection circuit;
the acquisition processing circuit includes:
an auxiliary current generating device that generates an auxiliary current to flow through at least the charging current auxiliary detection field effect transistor in a conduction state;
the voltage acquisition device at least acquires the voltage between the source and the drain of the charging current auxiliary detection field effect transistor through which the auxiliary current flows and the voltage between the source and the drain of the charging control field effect transistor through which the charged current flows; and
and the logic processing circuit is used for acquiring the magnitude of the charging current at least based on the voltage between the source electrode and the drain electrode of the charging current auxiliary detection field effect transistor, the voltage between the source electrode and the drain electrode of the charging control field effect transistor and the auxiliary current.
2. The current sensing device of claim 1, wherein the sensing circuit is disposed or formed on a first semiconductor chip and the pick-and-place circuit is disposed or formed on a second semiconductor chip.
3. The current detection device according to claim 1 or 2, wherein the detection circuit further comprises:
the grid electrode of the discharge control field effect transistor is used for receiving a control signal to be in a conducting state; and
the drain electrode of the discharge current auxiliary detection field effect transistor is connected with the drain electrode of the discharge control field effect transistor, and the grid electrode of the discharge current auxiliary detection field effect transistor is used for receiving a control signal to be in a conducting state.
4. The current detecting device according to claim 3, wherein the charge control fet is connected in series with the discharge control fet such that the charge control fet and the discharge control fet can be disposed in a charge/discharge circuit.
5. The current detecting device according to claim 4, wherein a drain of the charge control fet is connected to a drain of the discharge control fet, a drain of the charge current auxiliary detection fet is connected to a drain of the charge control fet, and a drain of the discharge current auxiliary detection fet is connected to a drain of the discharge control fet.
6. The current detection device according to claim 1, wherein the temperature detection device detects a present temperature of the charge control fet.
7. The current sensing device of claim 3, wherein the charge control fet and the discharge control fet are disposed between a positive terminal of the battery pack and a positive terminal of the battery device within the battery pack.
8. The current detecting device according to claim 3, wherein the collecting and processing circuit further comprises a FET driver for providing a control signal to the gate of the charging control FET, a control signal to the gate of the discharging control FET, a control signal to the gate of the charging current auxiliary detecting FET, and a control signal to the gate of the discharging current auxiliary detecting FET.
9. The current sensing device of claim 1, further comprising a zero temperature coefficient resistance; the auxiliary current generated by the auxiliary current generating device can respectively flow through the zero-temperature-coefficient resistor and the charging current auxiliary detection field effect transistor in a conducting state;
the voltage acquisition device comprises a first voltage acquisition part, and the first voltage acquisition part acquires the voltage at two ends of the zero temperature coefficient resistor when the auxiliary current flows through the zero temperature coefficient resistor.
10. The current sensing device of claim 1, wherein the logic processing circuit comprises a multiply-divide circuit.
11. The current detection device according to claim 1 or 10, wherein the voltage acquisition device includes a second voltage acquisition portion and a third voltage acquisition portion, the second voltage acquisition portion at least acquires a source-drain voltage when the charging current auxiliary detection field-effect transistor is flowed by the auxiliary current, and the third voltage acquisition portion at least acquires a source-drain voltage when the charging control field-effect transistor is flowed by the charging current.
12. The current sensing device of claim 9, wherein the auxiliary current generating device is a current mirror, and the current mirror is a 1:1 current mirror.
13. The current detecting device according to claim 3, wherein the charge control fet, the charge current auxiliary detecting fet, the discharge control fet, and the discharge current auxiliary detecting fet are made or formed of the same material and by the same manufacturing process.
14. The current detection device according to claim 1, wherein a ratio of a channel width-to-length ratio of the charging current auxiliary detection fet to a channel width-to-length ratio of the charging control fet is 1: m, wherein M is greater than or equal to 1.
15. The current detecting device according to claim 3, wherein a ratio of a channel width-to-length ratio of the discharge current auxiliary detecting fet to a channel width-to-length ratio of the discharge controlling fet is 1: m, wherein M is greater than or equal to 1.
16. A semiconductor chip characterized in that the current detection device according to any one of claims 1 to 15 is formed.
17. A battery management system, comprising:
the current detection device according to any one of claims 1 to 15, which performs charge/discharge control of a battery device and detects a charge current/discharge current of the battery device.
18. An electrical device, comprising:
a battery device; and
the battery management system according to claim 17, which performs at least charge/discharge control of the battery device and detects a charge current/discharge current of the battery device.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122202563.7U CN216350901U (en) | 2021-09-10 | 2021-09-10 | Current detection device, semiconductor chip, battery management system and electric equipment |
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| CN202122202563.7U CN216350901U (en) | 2021-09-10 | 2021-09-10 | Current detection device, semiconductor chip, battery management system and electric equipment |
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| CN216350901U true CN216350901U (en) | 2022-04-19 |
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