CN216250717U - Ceramic high-voltage silicon stack with high-voltage-resistant upper cover - Google Patents

Ceramic high-voltage silicon stack with high-voltage-resistant upper cover Download PDF

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Publication number
CN216250717U
CN216250717U CN202122879398.9U CN202122879398U CN216250717U CN 216250717 U CN216250717 U CN 216250717U CN 202122879398 U CN202122879398 U CN 202122879398U CN 216250717 U CN216250717 U CN 216250717U
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China
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voltage
ceramic
upper cover
silicon stack
utility
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CN202122879398.9U
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Chinese (zh)
Inventor
张蕾
刘洋
孙晨亮
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Fuxin Jialong Electronics Co ltd
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Fuxin Jialong Electronics Co ltd
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Abstract

The utility model discloses a high-voltage-resistant ceramic high-voltage silicon stack of an upper cover, which relates to the technical field of ceramic high-voltage silicon stacks and aims to solve the problem that when the voltage exceeds a certain value, a chip is easy to generate arc discharge, discharge breakdown and other phenomena with the upper cover.

Description

Ceramic high-voltage silicon stack with high-voltage-resistant upper cover
Technical Field
The utility model relates to the technical field of ceramic high-voltage silicon stacks, in particular to a high-voltage-resistant ceramic high-voltage silicon stack with an upper cover.
Background
In the case of the existing ceramic high-voltage silicon stack, the housing thereof is mainly composed of a ceramic housing and a metal upper cover. The upper cover is a metal parallel seal welding structure, in other words, the upper cover is a layer of metal cover. Referring to fig. 2, fig. 2 shows a housing structure of a ceramic high voltage silicon stack in the prior art. When the voltage exceeds a certain value, the internal chip is easy to affect the safe use of the product due to the phenomena of insulation, arc discharge, discharge breakdown and the like generated by the upper cover.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems, namely when the voltage exceeds a certain value, the chip and the upper cover are easy to generate the phenomena of arc discharge, discharge breakdown and the like, the utility model provides a high-voltage-resistant ceramic high-voltage silicon stack of the upper cover, which comprises a ceramic shell and a metal cover, wherein the inner side of the metal cover is also provided with two layers of insulating covers.
The utility model is further provided with: the ceramic shell is provided with a concave platform for placing the two layers of insulating covers.
The utility model is further provided with: the two layers of insulating covers are made of ceramic materials.
The beneficial technical effects of the utility model are as follows:
1. through setting up two layers of insulating covers, kept apart chip and metal covering, greatly increased the holistic reliability of product and withstand voltage nature.
2. The concave table is designed to facilitate the positioning of the placement of the two layers of insulating covers and not to influence the installation of the metal cover.
Drawings
Fig. 1 is a cross-sectional view of a ceramic high-voltage silicon stack according to the present invention.
Fig. 2 is a cross-sectional view of a prior art ceramic high voltage silicon stack.
Reference numerals: 1. a ceramic housing; 11. a concave platform; 2. a metal cover; 3. two layers of insulating covers.
Detailed Description
Preferred embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood by those skilled in the art that these embodiments are only for explaining the technical principle of the present invention, and are not intended to limit the scope of the present invention.
Referring to fig. 1, the utility model provides a high-voltage resistant ceramic high-voltage silicon stack with an upper cover, which comprises a ceramic shell 1 and a metal cover 2. The inner side of the metal cover 2 is also provided with a two-layer insulating cover 3, and the two-layer insulating cover 3 is made of ceramic materials. The two layers of insulating covers 3 play a role in isolating the chip from the metal cover 2, and the overall reliability and pressure resistance of the product are greatly improved. The specific mounting structure is as follows: the ceramic shell 1 is provided with a concave platform 11 for placing the two-layer insulating cover 3, and the concave platform can be bonded and fixed or installed in an interference fit manner. The mounting structure has the advantages that: 1. the two-layer insulating cover 3 is convenient to place and position; 2. the installation of the metal cover 2 is not influenced; 3. the outer contour of the ceramic shell 1 is not changed, so that the ceramic shell can be continuously used by referring to the existing practical scene.
While the utility model has been described with reference to a preferred embodiment, various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the utility model, and particularly, features shown in the various embodiments may be combined in any suitable manner without departing from the scope of the utility model. It is intended that the utility model not be limited to the particular embodiments disclosed, but that the utility model will include all embodiments falling within the scope of the appended claims.
In the description of the present invention, the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like, which indicate directions or positional relationships, are based on the directions or positional relationships shown in the drawings, which are for convenience of description only, and do not indicate or imply that the devices or elements must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Furthermore, it should be noted that, in the description of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The terms "comprises," "comprising," or any other similar term are intended to cover a non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus.
So far, the technical solutions of the present invention have been described in connection with the preferred embodiments shown in the drawings, but it is easily understood by those skilled in the art that the scope of the present invention is obviously not limited to these specific embodiments. Equivalent changes or substitutions of related technical features can be made by those skilled in the art without departing from the principle of the utility model, and the technical scheme after the changes or substitutions can fall into the protection scope of the utility model.

Claims (3)

1. The utility model provides a high pressure resistant pottery high pressure silicon stack of upper cover, includes ceramic housing (1) and metal covering (2), its characterized in that: the inner side of the metal cover (2) is also provided with a two-layer insulating cover (3).
2. The ceramic high-voltage silicon stack with the high-pressure-resistant upper cover according to claim 1, wherein: the ceramic shell (1) is provided with a concave platform (11) for placing the two layers of insulating covers (3).
3. The ceramic high-voltage silicon stack with the high-pressure-resistant upper cover according to claim 1, wherein: the two layers of insulating covers (3) are made of ceramic materials.
CN202122879398.9U 2021-11-23 2021-11-23 Ceramic high-voltage silicon stack with high-voltage-resistant upper cover Active CN216250717U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122879398.9U CN216250717U (en) 2021-11-23 2021-11-23 Ceramic high-voltage silicon stack with high-voltage-resistant upper cover

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122879398.9U CN216250717U (en) 2021-11-23 2021-11-23 Ceramic high-voltage silicon stack with high-voltage-resistant upper cover

Publications (1)

Publication Number Publication Date
CN216250717U true CN216250717U (en) 2022-04-08

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202122879398.9U Active CN216250717U (en) 2021-11-23 2021-11-23 Ceramic high-voltage silicon stack with high-voltage-resistant upper cover

Country Status (1)

Country Link
CN (1) CN216250717U (en)

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