CN216249993U

CN216249993U - High-capacity high-speed dump board and solid-state storage device of portable PCIE interface

Info

Publication number: CN216249993U
Application number: CN202122955989.XU
Authority: CN
Inventors: 李国超; 陈月玲; 张敏; 田成; 唐畅
Original assignee: Hunan Bojiang Information Technology Co Ltd
Current assignee: Hunan Bojiang Information Technology Co Ltd
Priority date: 2021-11-29
Filing date: 2021-11-29
Publication date: 2022-04-08
Anticipated expiration: 2031-11-29

Abstract

The utility model is suitable for the technical field of storage equipment, and provides a large-capacity high-speed dump board of a portable PCIE interface and solid-state storage equipment, wherein the large-capacity high-speed dump board comprises: the device comprises a PCIE Switch chip, an FPGA chip, a plurality of M.2 memory strips and a PCIE connector, wherein the PCIE connector is provided with an PCIE3.0X8 interface for connecting with an external host; the FPGA chip is connected with the PCIE Switch chip, the M.2 storage strips are respectively connected with the PCIE Switch chip, and the PCIE connector is connected with the FPGA chip. The utility model can increase the storage capacity of the dump board, is suitable for various hosts so as to be convenient for carrying, and can increase the read-write bandwidth of the dump board.

Description

High-capacity high-speed dump board and solid-state storage device of portable PCIE interface

Technical Field

The utility model belongs to the technical field of storage equipment, and particularly relates to a high-capacity high-speed dump board of a portable PCIE interface and solid-state storage equipment.

Background

At present, most interfaces of solid-state storage devices are NVME, SATA, m.2, mSATA, etc., the maximum capacity of the solid-state storage devices is generally 4T, the highest read-write bandwidth is 32Gbps, the scheme of a storage circuit is generally a scheme of a hard disk controller + FLASH, and the storage devices need to be fixed in a chassis or other host devices.

In some application scenarios requiring carrying and high-speed dumping of large-capacity files, the existing solid-state storage device cannot meet the application requirements, and therefore, a portable high-speed dumping device with large capacity is urgently needed to meet the application requirements.

SUMMERY OF THE UTILITY MODEL

The embodiment of the utility model provides a high-capacity high-speed dump board of a portable PCIE interface, which aims to solve at least one problem that the existing solid-state storage equipment cannot be carried, has small capacity and low read-write bandwidth.

The embodiment of the utility model provides a high-capacity high-speed dump board of a portable PCIE interface, which comprises: the system comprises a PCIE Switch chip, an FPGA chip, a plurality of M.2 memory banks and a PCIE connector, wherein the PCIE connector is provided with a PCIE3.0X8 interface for connecting with an external host; the FPGA chip is connected with the PCIE Switch chip, the M.2 storage strips are respectively connected with the PCIE Switch chip, and the PCIE connector is connected with the FPGA chip.

Further, the FPGA chip is loaded with a plurality of DDR3 particles.

Furthermore, the FPGA chip carries 16 DDR3 particles through 2 72-bit channels, and each 72-bit channel carries 8 DDR3 particles.

Furthermore, the FPGA chip and the PCIE Switch chip are connected through two PCIE3.0X8 buses.

Furthermore, the m.2 memory bank and the PCIE Switch chip are connected through a PCIE3.0X 4 bus.

Furthermore, the PCIE connector is connected to the FPGA chip through a PCIE3.0X8 bus.

Further, the model of the PCIE Switch chip is PEX 8764.

Furthermore, the model of the FPGA chip is JFM7VX690T 36.

Further, the number of m.2 memory banks is 8.

The embodiment of the utility model also provides a solid-state storage device, which comprises the high-capacity high-speed dump board of the portable PCIE interface and a shell, wherein the high-capacity high-speed dump board of the portable PCIE interface is contained in the shell.

Compared with the prior art, the utility model can improve the storage capacity of the dump board by forming the dump board by using the PCIE Switch chip, the FPGA chip, the M.2 storage strips and the PCIE connector, is connected with various external hosts by the PCIE connector, is suitable for various hosts so as to be convenient to carry, and can improve the read-write bandwidth of the dump board by using the PCIE3.0X8 interface configured by the PCIE connector.

Drawings

Fig. 1 is a schematic frame diagram of a large-capacity high-speed dump board of a portable PCIE interface according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of a motherboard of a large-capacity high-speed dump board of a portable PCIE interface according to an embodiment of the present invention.

10, a high-capacity high-speed dump board of a portable PCIE interface; 11. a PCIE Switch chip; 12. an FPGA chip; 13. m.2 memory bank, 14, PCIE connector; 15. DDR3 particles.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.

The utility model provides a high-capacity high-speed dump board 10 of a portable PCIE interface, as shown in figure 1, comprising a PCIE Switch chip 11, an FPGA chip 12, a plurality of M.2 memory strips 13 and a PCIE connector 14, wherein the PCIE connector 14 is configured with a PCIE3.0X8 interface for connecting with an external host; the FPGA chip 12 is connected to the PCIE Switch chip 11, the m.2 memory banks 13 are connected to the PCIE Switch chip 11, and the PCIE connector 14 is connected to the FPGA chip 12.

The m.2 storage bank 13 is also referred to as an m.2 solid-state storage bank, an m.2 solid-state hard disk, and the like.

The FPGA chip 12 and the PCIE Switch chip 11 are connected through two PCIE3.0X8 buses, and correspondingly, the FPGA chip 12 or/and the PCIE Switch chip 11 are configured with corresponding PCIE3.0X8 interfaces, and then the two are connected through the PCIE3.0X8 bus. The FPGA chip 12 and the PCIE Switch chip 11 adopt a dual-port virtual switching mode, which can ensure high-speed stability of PCIE channels.

The m.2 memory bank 13 is connected to the PCIE Switch chip 11 through a PCIE3.0X 4 bus, and correspondingly, the PCIE Switch chip 11 is configured with a corresponding PCIE3.0X 4 interface, and then the m.2 memory bank 13 is connected to the PCIE3.0X 4 interface of the PCIE Switch chip 11 through a PCIE3.0X 4 bus.

The PCIE connector 14 and the FPGA chip 12 are connected through a PCIE3.0X8 bus, and correspondingly, the PCIE connector 14 or/and the FPGA chip 12 is configured with a corresponding PCIE3.0X8 interface, and then the two are connected through the PCIE3.0X8 bus.

In this embodiment, the number of m.2 memory banks is 8.

Specifically, the model of the PCIE Switch chip 11 is PEX8764, and of course, according to actual requirements, other chip models may be selected, which is not illustrated here.

Specifically, the model of the FPGA chip 12 is JFM7VX690T36, and of course, other chip models may be selected according to actual requirements, which is not limited herein.

Specifically, the FPGA chip 12 is loaded with a plurality of DDR3 particles 15.

In this embodiment, the FPGA chip 12 mounts 16 DDR3 particles 15 through 2 72-bit channels, and each 72-bit channel mounts 8 DDR3 particles 15.

The 72-bit channel is also called a 72-bit DDR3 channel and is used for mounting DDR3 particles 15 on the FPGA chip 12.

By mounting 16 DDR3 particles 15 on the FPGA chip 12 through 2 72-bit channels, the memory capacity of the FPGA chip can reach 16GB to meet the performance requirement of dynamic cache, and meanwhile, the speed can reach 1600 MT/s.

Referring to fig. 2, the large-capacity high-speed dump board 10 of the portable PCIE interface further includes a motherboard, which is used to carry the PCIE Switch chip 11, the FPGA chip 12, the 8 m.2 memory banks 13, and the PCIE connector 14.

Of course, the mass high-speed dump board 10 of the portable PCIE interface may also include other technical features (devices, parts, and the like), which is not limited herein.

Compared with the prior art, the dump board 10 is formed by the PCIE Switch chip 11, the FPGA chip 12, the 8 M.2 memory strips 13 and the PCIE connector 14, so that the storage capacity of the dump board 10 can be increased to 32TB, the dump board is connected with various external hosts through the PCIE connector 14, the dump board is suitable for various hosts to be convenient to carry, and meanwhile, the read-write bandwidth of the dump board 10 can be increased to 64Gbps through the PCIE3.0X8 interface configured on the PCIE connector 14.

The embodiment of the present invention further provides a solid-state storage device, including the above-mentioned high-capacity high-speed dump board 10 of the portable PCIE interface and a housing, where the high-capacity high-speed dump board 10 of the portable PCIE interface is accommodated in the housing. The solid-state storage device has all the advantages of a high-capacity high-speed dump board of a portable PCIE interface, which is not described herein again. Wherein the housing may be provided as a portable housing.

The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A high-capacity high-speed dump board of a portable PCIE interface is characterized by comprising a PCIE Switch chip, an FPGA chip, a plurality of M.2 memory banks and a PCIE connector, wherein the PCIE connector is provided with a PCIE3.0X8 interface used for being connected with an external host;

the FPGA chip is connected with the PCIE Switch chip, the M.2 storage strips are respectively connected with the PCIE Switch chip, and the PCIE connector is connected with the FPGA chip.

2. The large capacity high speed dump board for a portable PCIE interface of claim 1, wherein the FPGA chip is mounted with a plurality of DDR3 particles.

3. The large capacity high speed dump board of claim 2, wherein the FPGA chip mounts 16 DDR3 particles through 2 72-bit channels, and each 72-bit channel mounts 8 DDR3 particles.

4. The large capacity dump board for a portable PCIE interface of claim 1, wherein the FPGA chip and the PCIE Switch chip are connected through two PCIE3.0X8 buses.

5. The large capacity dump pad for portable PCIE interface of claim 1, wherein the m.2 stripe is connected to the PCIE Switch chip through a PCIE3.0X 4 bus.

6. The large capacity high speed dump board of portable PCIE interface of claim 1, wherein the PCIE connector is connected to the FPGA chip through a PCIE3.0X8 bus.

7. The large capacity dump pad for a portable PCIE interface of claim 1, wherein the PCIE Switch chip has a model number PEX 8764.

8. The large capacity high speed dump board for portable PCIE interface of claim 1, wherein the model of the FPGA chip is JFM7VX690T 36.

9. The portable PCIE interface mass storage express memory board of any one of claims 1 to 8, wherein the m.2 memory banks are 8.

10. A solid-state storage device comprising the bulk express dump board of a portable PCIE interface as recited in any one of claims 1 to 9, and a housing, wherein the bulk express dump board of the portable PCIE interface is accommodated in the housing.