CN216216581U - Semiconductor circuit having a plurality of transistors - Google Patents

Abstract

The utility model discloses a semiconductor circuit, which comprises a high-voltage integrated circuit and a three-phase inverter bridge, wherein the high-voltage integrated circuit comprises a PWM (pulse-width modulation) signal cache module, a high-voltage driving module, a low-voltage driving module and a bootstrap module; the bootstrap module is provided with three signal input ends and three high-side floating power supply output ends, the three signal input ends are correspondingly and electrically connected with three level output ends of the PWM signal caching module, and the three high-side floating power supply output ends respectively and correspondingly supply power to three upper bridge arms of the three-phase inverter bridge; three paths of high-voltage driving output ends of the high-voltage driving module respectively drive three upper bridge arms of the three-phase inverter bridge, and three paths of low-voltage driving output ends of the low-voltage driving module respectively drive three lower bridge arms of the three-phase inverter bridge. The technical scheme of the utility model solves the problems that the bootstrap voltage is unstable and the power supply is insufficient or the circuit is invalid.

Description

Semiconductor circuit having a plurality of transistors

Technical Field

The present invention relates to the field of semiconductor technologies, and in particular, to a semiconductor circuit.

Background

Intelligent Power Module (IPM) is a Power-driven product that combines Power electronics and integrated circuit technology. The power switch device and the high-voltage driving device are integrated inside the circuit, and the circuit is widely applied to systems such as a frequency converter, a welding machine and a servo driving system. During the work of the intelligent power module, on one hand, the intelligent power module receives a control signal of the MCU and drives a subsequent circuit to work, and on the other hand, a state detection signal of the system is sent back to the MCU for processing to form a loop drive so as to achieve the purposes of driving and detecting.

The intelligent power module is internally divided into an upper bridge arm, a lower bridge arm, a logic circuit, a protection circuit and the like, and drive control and protection feedback are realized through a half-bridge or full-bridge singlechip or a logic chip. When the lower bridge arm is switched on, the upper bridge is bootstrapped to charge and discharge so as to ensure that the upper bridge arm can be switched on when the lower bridge arm is switched off. Therefore, the bootstrap circuit is one of the normal working conditions of the bridge on the intelligent power module.

At present, the intelligent power module is not internally provided with a bootstrap function, and a bootstrap circuit is usually built on a peripheral application main control board so as to realize the charging and discharging function of an upper bridge of the intelligent power module. According to the scheme of the bootstrap circuit adopted at present, after the main control board works for a long time, electromigration can occur, so that the bootstrap voltage is unstable, and the condition of insufficient power supply or circuit failure is easily caused.

SUMMERY OF THE UTILITY MODEL

The utility model mainly aims to provide a semiconductor circuit, aiming at solving the problems that bootstrap voltage is unstable, and power supply is insufficient or the circuit is easy to fail.

In order to achieve the above object, the semiconductor circuit provided by the present invention comprises a high voltage integrated circuit and a three-phase inverter bridge, wherein the high voltage integrated circuit comprises a PWM signal buffer module, a high voltage driving module, a low voltage driving module and a bootstrap module, and the PWM signal buffer module is electrically connected to the high voltage driving module and the low voltage driving module;

the bootstrap module is provided with three signal input ends and three high-side floating power supply output ends, the three signal input ends are correspondingly and electrically connected with three level output ends of the PWM signal caching module, and the three high-side floating power supply output ends respectively and correspondingly supply power to three upper bridge arms of the three-phase inverter bridge; the three paths of high-voltage driving output ends of the high-voltage driving module respectively drive three upper bridge arms of the three-phase inverter bridge, and the three paths of low-voltage driving output ends of the low-voltage driving module respectively drive three lower bridge arms of the three-phase inverter bridge.

Preferably, the bootstrap module includes three identical bootstrap units, the three signal input ends correspond to the three bootstrap units one to one, and the three high-side floating power supply output ends correspond to the three bootstrap units one to one.

Preferably, each bootstrap unit comprises an energy storage capacitor, a first switch tube, a second switch tube, a comparison unit and a logic conversion unit;

the signal input end is electrically connected with the conduction control end of the first switch tube and the first input end of the logic conversion unit, and the high-side floating power supply output end is electrically connected with the first conduction end of the first switch tube and the first conduction end of the second switch tube;

a first input end of the comparison unit is electrically connected with a power supply, a second input end of the comparison unit is electrically connected with a second conducting end of the first switching tube, and an output end of the comparison unit is electrically connected with a second input end of the logic conversion unit;

the output end of the logic conversion unit is electrically connected with the conduction control end of a second switching tube, the second conduction end of the second switching tube is electrically connected with the power supply, and the first conduction end of the second switching tube is grounded through the energy storage capacitor;

when the voltage of the high-side floating power supply output end is lower than a preset first threshold voltage, the signal input end receives a high level signal output by the PWM signal caching module, the first switch tube is conducted, the second switch tube is conducted, and the power supply charges the energy storage capacitor; when the voltage of the high-side floating power supply output end is higher than a preset second threshold voltage, the signal input end receives a low level signal output by the PWM signal caching module, the first switch tube is cut off, the second switch tube is cut off, and the energy storage capacitor discharges.

Preferably, the comparing unit includes a first resistor, a second resistor, a delay capacitor and a comparator, a non-inverting input terminal of the comparator is a first input terminal of the comparing unit, and an inverting input terminal of the comparator is grounded via the second resistor and the delay capacitor, respectively; one end of the first resistor is a second input end of the comparison unit, and the other end of the first resistor is electrically connected with an inverted input end of the comparator.

Preferably, the logic conversion unit includes a schmitt trigger, a nand gate and a phase inverter, a first input end of the nand gate is electrically connected to an output end of the schmitt trigger, an input end of the schmitt trigger is a first input end of the logic conversion unit, a second input end of the nand gate is a second input/output end of the logic conversion unit, an output end of the nand gate is electrically connected to an input end of the phase inverter, and an output end of the phase inverter is an output end of the logic conversion unit.

Preferably, the bootstrap unit further includes a filter capacitor, and the power supply is grounded via the filter capacitor.

Preferably, the device further comprises three detection units and three voltage feedback ends which are electrically connected with an external MCU, wherein the three detection units correspond to the three high-side floating power supply output ends one by one, and the three detection units correspond to the three voltage feedback ends one by one; the detection end of each detection unit is electrically connected with the corresponding high-side floating power supply output end, and the output end of each detection unit is electrically connected with the corresponding voltage feedback end.

Preferably, the three-way detection unit is built in the high-voltage integrated circuit.

Preferably, the high-voltage integrated circuit further comprises a protection module electrically connected with the high-voltage driving module and the low-voltage driving module, and the protection module comprises a voltage under-voltage protection circuit, an overcurrent protection circuit, an over-temperature protection circuit and a short-circuit protection circuit.

Preferably, the high-voltage integrated circuit further includes a driving enable circuit, the protection module further includes a fault detection circuit, and the fault detection circuit is electrically connected to the driving enable circuit, the under-voltage protection circuit, the over-current protection circuit, the over-temperature protection circuit, and the short-circuit protection circuit, respectively.

According to the technical scheme, the bootstrap module is internally integrated in the high-voltage integrated circuit, so that a bootstrap circuit does not need to be built on the peripheral main control board, and the high-voltage integrated circuit is packaged through a packaging process, so that the situation of electromigration does not occur after the semiconductor circuit works for a long time, and the stability of the bootstrap voltage is ensured. .

Drawings

FIG. 1 is a block diagram of a semiconductor circuit according to an embodiment of the present invention;

FIG. 2 is a block diagram of a semiconductor circuit according to an embodiment of the present invention;

FIG. 3 is a circuit diagram of a bootstrap unit in an embodiment of the present invention;

fig. 4 is a block diagram of a semiconductor circuit according to an embodiment of the utility model.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.

It will also be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.

In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.

The semiconductor circuit provided by the utility model is a circuit module which integrates a power switch device, a high-voltage driving circuit and the like together and is sealed and packaged on the outer surface, and is widely applied to the field of power electronics, such as the fields of frequency converters of driving motors, various inversion voltages, variable frequency speed regulation, metallurgical machinery, electric traction, variable frequency household appliances and the like. The semiconductor circuit herein may be referred to by various other names, such as Modular Intelligent Power System (MIPS), Intelligent Power Module (IPM), or hybrid integrated circuit, Power semiconductor Module, Power Module, etc. In the following embodiments of the present invention, collectively referred to as a Modular Intelligent Power System (MIPS).

The utility model provides an MIPS.

Referring to fig. 1, in this embodiment, the MIPS includes a high voltage integrated circuit 100(HVIC) and a three-phase inverter bridge 200, where the high voltage integrated circuit 100 includes a PWM signal buffer module 10, a high voltage driving module 20, a low voltage driving module 30 and a bootstrap module 40, and the PWM signal buffer module 10 is electrically connected to the high voltage driving module 20 and the low voltage driving module 30. The three high-voltage driving output ends Ho of the high-voltage driving module 20 respectively drive three upper bridge arms of the three-phase inverter bridge 200, and the three low-voltage driving output ends Lo of the low-voltage driving module 30 respectively drive three lower bridge arms of the three-phase inverter bridge 200.

The bootstrap module 40 has three signal input terminals Vin and three high-side floating power supply output terminals VB, the three signal input terminals Vin are correspondingly electrically connected to three level output terminals of the PWM signal cache module 10, and the three high-side floating power supply output terminals VB respectively and correspondingly supply power to three upper bridge arms of the three-phase inverter bridge 200, that is, each high-side floating power supply output terminal VB correspondingly supplies power to one upper bridge arm.

The PWM signal buffer module 10 receives a control signal sent by an external MCU, and the PWM signal buffer module 10 filters and amplifies the control signal, and outputs the filtered control signal to the high voltage driving module 20, the low voltage driving module 30, and the bootstrap module 40, so as to control the operating states of the high voltage driving module 20, the low voltage driving module 30, and the bootstrap module 40.

The MIPS of this embodiment, with the built-in integration of bootstrap module 40 in high-voltage integrated circuit 100, make need not to build the bootstrap circuit again on the peripheral main control board, because high-voltage integrated circuit 100 encapsulates through packaging technology, consequently, after MIPS long-term work operation, the condition of electromigration can not take place yet, guarantee the bootstrap voltage stability, consequently, the MIPS of this embodiment has effectively avoided peripheral main control board long-term work after, take place the electromigration and lead to the bootstrap voltage unstable, and then cause the problem of power supply deficiency or circuit failure.

In addition, the bootstrap circuit is changed from an external scheme to an internal integration scheme, so that the integration level of the MIPS becomes higher and the MIPS is more intelligent. Moreover, the scheme of the embodiment fundamentally solves a series of problems that the existing bootstrap circuit is realized by a peripheral main control board, and during production operation, devices used by the bootstrap circuit are likely to be damaged in pasting operation, so that voltage is unstable and under-voltage protection occurs in the long run.

Further, referring to fig. 2, in this embodiment, the bootstrap module 40 includes three identical bootstrap units 41, three signal input terminals Vin correspond to the three bootstrap units 41 one to one, and three high-side floating power supply output terminals VB correspond to the three bootstrap units 41 one to one. Each bootstrap unit 41 is controlled by a signal of a corresponding signal input terminal Vin, and supplies power to an upper bridge arm of the three-phase inverter bridge 200 by a corresponding high-side floating power supply output terminal VB.

Further, referring to fig. 3, in the present embodiment, each bootstrap unit 41 includes an energy storage capacitor C1, a first switch tube QX1, a second switch tube QX2, a comparison unit 411, and a logic conversion unit 412;

the signal input terminal Vin is electrically connected with the conducting control terminal of the first switch tube QX1 and the first input terminal of the logic conversion unit 412, and the high-side floating power supply output terminal VB is electrically connected with the first conducting terminal of the first switch tube QX1 and the first conducting terminal of the second switch tube QX 2;

a first input end of the comparing unit 411 is electrically connected to the power VCC, a second input end of the comparing unit 411 is electrically connected to the second conducting end of the first switching tube QX1, and an output end of the comparing unit 411 is electrically connected to the second input end of the logic converting unit 412;

the output end of the logic converting unit 412 is electrically connected to the conducting control end of the second switch tube QX2, the second conducting end of the second switch tube QX2 is electrically connected to the power VCC, and the first conducting end of the second switch tube QX2 is grounded through the energy storage capacitor C1;

the working principle of the bootstrap unit 41 of this embodiment is as follows:

1. when the voltage of the high-side floating power supply output end VB is lower than a preset first threshold voltage (lower than the voltage of the power supply VCC), the signal input end Vin receives a high-level signal output by the PWM signal cache module 10, the first switch tube QX1 is turned on, the voltage of the first input end of the comparison unit 411 is higher than the voltage of the second input end thereof, the comparison unit 411 outputs a high level to the second input end of the logic conversion unit 412, the logic conversion unit 412 outputs a high level to drive the second switch tube QX2 to be turned on, the power supply VCC is communicated with the energy storage capacitor C1, and the power supply VCC charges the energy storage capacitor C1; 2. when the voltage of the high-side floating power supply output terminal VB is higher than a preset second threshold voltage (higher than the voltage of the power supply VCC), the voltage of the first input terminal of the comparing unit 411 is lower than the voltage of the second input terminal thereof, the comparing unit 411 outputs a low level to the second input terminal of the logic converting unit 412, the logic converting unit 412 outputs a low level, the second switch tube QX2 is turned off, the energy storage capacitor C1 discharges, the signal input terminal Vin receives a low level signal output by the PWM signal buffer module 10, and the first switch tube QX1 is turned off.

Further, referring to fig. 3, in the present embodiment, the comparing unit 411 includes a first resistor R1, a second resistor R2, a delay capacitor C2 and a comparator Y1, a non-inverting input terminal of the comparator Y1 is a first input terminal of the comparing unit 411, and an inverting input terminal of the comparator Y1 is grounded via the second resistor R2 and the delay capacitor C2, respectively; one end of the first resistor R1 is a second input terminal of the comparing unit 411, and the other end is electrically connected to the inverting input terminal of the comparator Y1.

Further, referring to fig. 3, the logic converting unit 412 includes a schmitt trigger a1, a nand gate a2 and an inverter A3, a first input terminal of the nand gate a2 is electrically connected to an output terminal of the schmitt trigger a1, an input terminal of the schmitt trigger a1 is a first input terminal of the logic converting unit 412, a second input terminal of the nand gate a2 is a second input terminal of the logic converting unit 412, an output terminal of the nand gate a2 is electrically connected to an input terminal of the inverter A3, and an output terminal of the inverter A3 is an output terminal of the logic converting unit 412.

In this embodiment, the specific working principle of the bootstrap unit 41 is as follows:

1. when the voltage of the high-side floating power supply output end VB is lower than a preset first threshold voltage, the voltage of the non-inverting input end of the comparator Y1 is higher than the voltage of the inverting input end thereof (a voltage division value on the second resistor R2), the output end of the comparator Y1 outputs a high level to the second input end of the nand gate a2, at this time, the signal input end Vin receives a high level signal output by the PWM signal cache module 10, the first switch tube QX1 is turned on, the high level received by the signal input end Vin outputs a high level signal to the first input end of the nand gate a2 after passing through the schmitt trigger a1, so that the nand gate a2 outputs a low level to the input end of the inverter A3, the output end of the inverter A3 outputs a high level to drive the second switch tube QX2 to be turned on, the power supply VCC is communicated with the energy storage capacitor C1, and the power supply VCC charges the energy storage capacitor C1; 2. when the voltage of the high-side floating power supply output end VB is higher than a preset second threshold voltage, the voltage of the non-inverting input end of the comparator Y1 is lower than that of the inverting input end thereof, and the output end of the comparator Y1 outputs a low level to the second input end of the NAND gate A2; at this time, the signal input terminal Vin receives the low level signal output by the PWM signal buffer module 10, the first switching tube QX1 is turned off, and due to the function of the delay capacitor C2, the voltage at the inverting input terminal of the comparator Y1 does not suddenly decrease, but gradually decreases, and remains higher than the voltage at the non-inverting input terminal of the comparator Y1 for a period of time, that is, the output terminal of the comparator Y1 remains outputting the low level for a period of time; the low level signal received by the signal input end Vin is converted into a high level signal through the schmitt trigger a1 and is output to the first input end of the nand gate a2, the nand gate a2 outputs a high level signal to the input end and the output end of the inverter A3, the output end of the inverter A3 outputs a low level signal, the second switch tube QX2 is cut off, the power supply VCC is disconnected with the energy storage capacitor C1, the current of the energy storage capacitor C1 is prevented from flowing backwards to the power supply VCC, and the energy storage capacitor C1 discharges. And the processes 1 and 2 are circulated, the energy storage capacitor C1 is charged and discharged circularly, and the power supply voltage of the high-side floating power supply output end VB for the upper bridge arm is kept stable.

Further, in this embodiment, the bootstrap unit 41 further includes a filter capacitor C3, and the power source VCC is grounded through the filter capacitor C3. The interference signal of the power supply VCC is filtered through the filter capacitor C3, and the voltage stability of the power supply VCC is ensured.

Further, referring to fig. 4, the MIPS of this embodiment further includes three detection units 50 and three voltage feedback terminals F for electrically connecting with an external MCU, the three detection units 50 are in one-to-one correspondence with the three high-side floating power supply output terminals VB, and the three detection units 50 are in one-to-one correspondence with the three voltage feedback terminals F; the detection end of each path of detection unit 50 is electrically connected with the corresponding high-side floating power supply output end VB, and the output end of each path of detection unit 50 is electrically connected with the corresponding voltage feedback end F. The voltage of the corresponding high-side floating power supply output end VB is detected through the detection unit 50, the detected voltage is output to an external MCU through a corresponding voltage feedback end F, the external MCU outputs a corresponding level signal to the PWM signal cache module 10 according to the voltage fed back by the voltage feedback end F, and the PWM signal cache module 10 filters and amplifies the level signal input by the external MCU and outputs the level signal to a corresponding signal input end Vin; thus, the external MCU controls the charge/discharge switching of the bootstrap unit 41 according to the voltage of the high-side floating power supply output terminal VB of the bootstrap unit 41 detected by the detection unit 50.

Further, the MIPS of the embodiment adopts the three-way detection unit 50 to be embedded in the high-voltage integrated circuit 100, so as to further improve the function and the integration level of the high-voltage integrated circuit 100. Of course, in other embodiments, the detecting unit 50 may also be disposed outside the high-voltage integrated circuit 100, disposed on a substrate of the MIPS, and integrated with the MIPS package, so that the MIPS is more intelligent. In addition, in some embodiments, the detecting unit 50 may also be a peripheral external circuit as MIPS.

Further, in this embodiment, the high-voltage integrated circuit 100 further includes a protection module electrically connected to the high-voltage driving module 20 and the low-voltage driving module 30, and the protection module includes a voltage under-voltage protection circuit, an overcurrent protection circuit, an over-temperature protection circuit, and a short-circuit protection circuit. The voltage undervoltage protection circuit monitors whether undervoltage occurs inside the circuit, the overcurrent protection circuit monitors whether current in the circuit overflows, the overtemperature protection circuit monitors whether the whole module is overtemperature (for example, overheat), and the short-circuit protection circuit monitors whether a short-circuit condition occurs in the circuit.

Further, the high voltage integrated circuit 100 further includes a driving enable circuit to implement an enable function; the protection module further comprises a fault detection circuit which is electrically connected with the drive enabling circuit, the voltage under-voltage protection circuit, the over-current protection circuit, the over-temperature protection circuit and the short-circuit protection circuit respectively. When the signal of any one of the voltage and air pressure protection circuit, the overcurrent circuit, the over-temperature protection circuit and the short-circuit protection circuit is detected to be abnormal, the output signal of the fault detection circuit is converted from a high level to a low level state and is fed back to an external MCU, and the MCU outputs a corresponding control signal to control the MIPS to stop working so as to protect the safety of the MIPS.

The above description is only a part of or preferred embodiments of the present invention, and neither the text nor the drawings should be construed as limiting the scope of the present invention, and all equivalent structural changes, which are made by using the contents of the present specification and the drawings, or any other related technical fields, are included in the scope of the present invention.

Claims (10)

1. A semiconductor circuit is characterized by comprising a high-voltage integrated circuit and a three-phase inverter bridge, wherein the high-voltage integrated circuit comprises a PWM signal cache module, a high-voltage driving module, a low-voltage driving module and a bootstrap module, and the PWM signal cache module is electrically connected with the high-voltage driving module and the low-voltage driving module;

the bootstrap module is provided with three signal input ends and three high-side floating power supply output ends, the three signal input ends are correspondingly and electrically connected with three level output ends of the PWM signal caching module, and the three high-side floating power supply output ends respectively and correspondingly supply power to three upper bridge arms of the three-phase inverter bridge; the three paths of high-voltage driving output ends of the high-voltage driving module respectively drive three upper bridge arms of the three-phase inverter bridge, and the three paths of low-voltage driving output ends of the low-voltage driving module respectively drive three lower bridge arms of the three-phase inverter bridge.

2. The semiconductor circuit of claim 1, wherein the bootstrap module comprises three identical bootstrap units, the three signal input terminals correspond to the three bootstrap units one to one, and the three high-side floating power supply output terminals correspond to the three bootstrap units one to one.

3. The semiconductor circuit of claim 2, wherein each bootstrap unit comprises an energy storage capacitor, a first switch tube, a second switch tube, a comparison unit and a logic conversion unit;

the signal input end is electrically connected with the conduction control end of the first switch tube and the first input end of the logic conversion unit, and the high-side floating power supply output end is electrically connected with the first conduction end of the first switch tube and the first conduction end of the second switch tube;

a first input end of the comparison unit is electrically connected with a power supply, a second input end of the comparison unit is electrically connected with a second conducting end of the first switching tube, and an output end of the comparison unit is electrically connected with a second input end of the logic conversion unit;

the output end of the logic conversion unit is electrically connected with the conduction control end of a second switching tube, the second conduction end of the second switching tube is electrically connected with the power supply, and the first conduction end of the second switching tube is grounded through the energy storage capacitor;

when the voltage of the high-side floating power supply output end is lower than a preset first threshold voltage, the signal input end receives a high level signal output by the PWM signal caching module, the first switch tube is conducted, the second switch tube is conducted, and the power supply charges the energy storage capacitor; when the voltage of the high-side floating power supply output end is higher than a preset second threshold voltage, the signal input end receives a low level signal output by the PWM signal caching module, the first switch tube is cut off, the second switch tube is cut off, and the energy storage capacitor discharges.

4. The semiconductor circuit according to claim 3, wherein the comparison unit comprises a first resistor, a second resistor, a delay capacitor, and a comparator, wherein a non-inverting input terminal of the comparator is the first input terminal of the comparison unit, and an inverting input terminal of the comparator is grounded via the second resistor and the delay capacitor, respectively; one end of the first resistor is a second input end of the comparison unit, and the other end of the first resistor is electrically connected with an inverted input end of the comparator.

5. The semiconductor circuit according to claim 3, wherein the logic conversion unit comprises a Schmitt trigger, a NAND gate, and an inverter, wherein a first input of the NAND gate is electrically connected to an output of the Schmitt trigger, an input of the Schmitt trigger is a first input of the logic conversion unit, a second input of the NAND gate is a second input and output of the logic conversion unit, an output of the NAND gate is electrically connected to an input of the inverter, and an output of the inverter is an output of the logic conversion unit.

6. The semiconductor circuit of claim 3, wherein the bootstrap unit further comprises a filter capacitor, and the power supply is grounded via the filter capacitor.

7. The semiconductor circuit according to any one of claims 2 to 6, further comprising three detection units and three voltage feedback terminals for electrically connecting to an external MCU, wherein the three detection units correspond to the three high-side floating power supply output terminals one to one, and the three detection units correspond to the three voltage feedback terminals one to one; the detection end of each detection unit is electrically connected with the corresponding high-side floating power supply output end, and the output end of each detection unit is electrically connected with the corresponding voltage feedback end.

8. The semiconductor circuit of claim 7, wherein the three-way detection unit is built into the high voltage integrated circuit.

9. The semiconductor circuit according to any one of claims 1 to 6, wherein the high-voltage integrated circuit further comprises a protection module electrically connected to the high-voltage driving module and the low-voltage driving module, and the protection module comprises an undervoltage protection circuit, an overcurrent protection circuit, an overtemperature protection circuit, and a short-circuit protection circuit.

10. The semiconductor circuit according to claim 9, wherein the high-voltage integrated circuit further comprises a drive enable circuit, and the protection module further comprises a fault detection circuit electrically connected to the drive enable circuit, the undervoltage protection circuit, the overcurrent protection circuit, the over-temperature protection circuit, and the short-circuit protection circuit, respectively.

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