CN216210538U - GPS tame synchronous clock device - Google Patents

Abstract

The utility model relates to the field of electric power systems, and particularly discloses a GPS tame synchronous clock device which comprises a satellite signal receiving module, a central processing unit, a high-precision temperature compensation crystal oscillator and a signal output circuit. The high-precision temperature compensation crystal oscillator oscillates to generate a signal with fixed frequency and sends the signal to a frequency dividing circuit inside a central processing unit, the internal frequency dividing circuit is connected with and drives a clock inside the central processing unit to time, a second pulse signal output by an internal clock and a second pulse received by a satellite signal are simultaneously sent to the central processing unit to time and capture an array, so that a time difference value between the two signals is obtained, the difference value is averaged for many times, the value of an internal frequency divider is adjusted, the random error of a GPS second pulse is eliminated, the internal clock approaches to the satellite to receive the second pulse, and accurate PPS second pulse and timestamp information of NMEA0183 ZDA format can be output when no satellite signal exists after synchronization.

Description

GPS tame synchronous clock device

Technical Field

The utility model relates to a GPS tame synchronous clock device used in the field of power measurement.

Background

The matching of various data processors in a power system requires a precise and uniform time. When a problem occurs, the monitoring and fault analysis of all the systems of the total station under the unified time reference can be realized, and the reason and the process of the accident can be analyzed through accurate time. The scale of the power grid is gradually increasing, making uniform standard time an urgent need for power plants, substations and even entire power systems.

The global satellite navigation positioning system such as the Beidou or the GPS can provide real-time and high-precision time information for users at any position free of charge. The time system of the satellite consists of an atomic clock with high precision and high stability. The hydrogen atom or cesium atom clock of the ground control system provides time and frequency fine adjustment parameters for the main running clock, so that the main running clock keeps extremely high long-term stability and has no accumulated error.

High-precision clock systems are required in synchronous measurement of modern power and communication systems and the like, and the precision of the clock systems reaches microsecond or even nanosecond level. The measurement of fixed places such as a transformer substation and the like is generally provided with a fixed GPS signal receiving device with an external antenna, but when the mobile synchronous measurement is carried out, and no GPS signal exists in a basement, a room and the like, how to simply and inexpensively acquire the high-precision satellite system time synchronous with other places is necessary.

Disclosure of Invention

In order to solve the above current situation, an electronic system generally uses a crystal oscillator as a clock source, and the crystal oscillator is used as a system clock after frequency division, and the frequency of the crystal oscillator has a certain deviation along with the change of the ambient temperature and voltage and the lapse of time, but the crystal oscillator has a short frequency, good stability and no random error. The utility model provides a GPS tame synchronous clock device, which combines the characteristics of no accumulated error of a GPS clock and no random error of a crystal oscillator clock, adopts the GPS clock to tame the synchronous crystal oscillator clock and realizes a high-precision synchronous clock.

The utility model GPS tame synchronous clock device comprises a central processing unit, a GPS receiving module and a high-precision temperature compensation crystal oscillator; the central processing unit is internally provided with a counting frequency division circuit, an internal clock and a timing capture array. After the system is powered on, the high-precision temperature compensation crystal oscillator generates an oscillation signal with fixed frequency, the oscillation signal is sent to a frequency division circuit in the central processing unit, and an internal clock is driven to time after frequency division. The central processing unit extracts information from the GPS receiver through the serial port, decodes the information to obtain time information, and is used for comparing and timing the internal clock. The central processing unit utilizes the timing capture array to simultaneously receive the GPS second pulse and the second pulse signal output by the internal clock, eliminates the random error of the GPS second pulse according to the time difference between the two signals, adjusts the value of the internal frequency divider, and ensures that the internal clock approaches the receiving second pulse, thereby ensuring the working precision of the internal clock when the GPS signal does not exist.

The utility model discloses should connect the GPS antenna before the device uses for receive the GPS signal, outdoor or can receive the local start work of GPS signal, work about 3 minutes GPS signal lamp bright express receive the GPS signal and begin oneself tame the clock, oneself tame about 10 minutes can be indoor use, device output interface provides the timestamp information of accurate PPS second pulse and NMEA 0183's ZDA format, do not shut down during the use.

Compared with the prior art, the utility model achieves the remarkable effects that: the utility model discloses a method utilizes the real-time measurement crystal oscillator clock frequency of GPS clock and output clock phase place, utilizes crystal oscillator frequency difference and output clock phase difference regulating circuit frequency dividing ratio, keeps in step with the GPS clock when eliminating crystal oscillator clock cumulative error. Specifically, the central processing unit receives the GPS second pulse and the second pulse signal output by the internal clock at the same time by using the timing capture array, eliminates the random error of the GPS second pulse by using multiple averaging according to the difference value between the GPS second pulse and the second pulse signal, and adjusts the value of the internal frequency divider, so that the internal clock approaches to receive the second pulse, and the working precision and the clock synchronism of the internal clock are ensured when the GPS signal does not exist.

Drawings

The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the principles of the utility model and not to limit the utility model.

The utility model is further illustrated by the following examples in conjunction with the accompanying drawings:

FIG. 1 is a schematic diagram showing the right and top views of the present embodiment;

fig. 2 is a schematic view of the overall structure of the system according to this embodiment.

Detailed Description

In the description of the present invention, it should be noted that the terms "vertical", "upper", "lower", "horizontal", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.

In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "connected" and "connected" are to be interpreted broadly, e.g., as meaning either a fixed connection, a detachable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, and it should be understood that the embodiments described herein are merely for the purpose of illustrating and explaining the present invention and are not intended to limit the present invention.

Referring to fig. 1, the present embodiment includes a power switch 2, a power indicator 1, a charging interface 3, a GPS antenna interface 4, a GPS signal lamp 5, and an output interface 6.

Specifically, the utility model power switch 2 is used for a switching device;

the utility model power indicator lamp 1 is used for indicating the starting state of the device;

the utility model is provided with a rechargeable lithium battery, and the charging interface 3 is used for charging the device;

the utility model GPS antenna interface 4 needs to be provided with a GPS antenna before the device is used, so as to effectively acquire GPS satellite signals;

the utility model GPS signal lamp 5 is turned on by the off after the device acquires the GPS satellite signal;

the utility model discloses output interface 6 outputs accurate PPS second pulse and UTC time information.

Referring to fig. 2, the utility model discloses GPS tames synchronous clock device structure picture, the utility model discloses the device system wholly includes: the device comprises a tame clock output 6, a GPS receiving module 7, a central processing unit 8, a temperature compensation crystal oscillator 9, a timing capture array 10, an internal clock 11 and an internal frequency division 12. The GPS antenna provides signals for the GPS receiving module 7 through the GPS antenna interface 4; the GPS module 7 is connected with the central processing unit 8; the high-precision temperature compensation crystal oscillator 9 oscillates to generate a signal with fixed frequency and sends the signal to the internal frequency division circuit 12 of the central processing unit 8, the internal frequency division circuit 12 is connected with and drives the internal clock 11 of the central processing unit to time, the second pulse signal output by the internal clock 11 and the second pulse received by the satellite signal are simultaneously sent to the central processing unit to time and capture the array 10, the time difference between the two signals is obtained, the central processing unit averagely processes the time difference for multiple times, the value of the internal frequency divider is adjusted according to the averagely processed time information, the random error of the GPS second pulse is eliminated, the internal clock signal is enabled to approach the satellite receiving second pulse signal, the clock is tamed, the synchronization of the clocks is ensured, after the synchronization, when the satellite signal does not exist, the internal clock still keeps high-precision time information, and also outputs precise PPS second pulse and time stamp information of NMEA0183 in ZDA format.

In specific implementation, the central processing unit 8 of the utility model can select any high-frequency single chip microcomputer, such as an STM32 series single chip microcomputer, and the internal part of the single chip microcomputer can be used for capturing, frequency division and clock processing;

the high-precision temperature compensation crystal oscillator of the utility model can select a 1ppm crystal oscillator;

the utility model adopts a common GPS communication module, and obtains time information through satellite communication;

the utility model discloses but power supply circuit alternative rechargeable lithium cell and DCDC circuit.

Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the utility model. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (1)

1. The GPS taming synchronous clock device is characterized in that the device structure comprises a taming clock output, a GPS receiving module, a central processing unit and a temperature compensation crystal oscillator; the central processing unit comprises a capture array, an internal clock and an internal frequency division;

   the GPS receiving module is connected with the central processing unit, the GPS receiving module outputs GPS time information and PPS second pulse to be sent to the central processing unit, the PPS second pulse is connected with the capturing array of the central processing unit, and the capturing array of the central processing unit receives PPS second pulse signals;

   the temperature compensation crystal oscillator is connected with the internal frequency division of the central processing unit, and a signal with fixed frequency generated by the oscillation of the high-precision temperature compensation crystal oscillator is connected and input to the internal frequency division of the central processing unit;

   the internal frequency division is connected with an internal clock, and the internal frequency division of the central processing unit drives the internal clock of the central processing unit to time;

   the internal clock is connected with the capture array, the capture array of the central processing unit synchronously receives the pulse per second signal output by the internal clock and the received PPS pulse per second signal, and the central processing unit obtains the direct time difference of the two signals;

   the internal clock is connected with the tame clock to output, the time difference value of the two signals is subjected to multiple times of average processing, then the internal frequency division value is adjusted, the internal clock signal approaches a PPS second pulse signal received by a satellite, and the tame clock second pulse is output to the tame clock to output.

Images