CN216081789U - Composite film layer structure with high infrared absorption rate and thermopile chip - Google Patents
Composite film layer structure with high infrared absorption rate and thermopile chip Download PDFInfo
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- CN216081789U CN216081789U CN202121747428.4U CN202121747428U CN216081789U CN 216081789 U CN216081789 U CN 216081789U CN 202121747428 U CN202121747428 U CN 202121747428U CN 216081789 U CN216081789 U CN 216081789U
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Abstract
The utility model provides a high-infrared-absorptivity composite film layer structure and a thermopile chip, wherein the high-infrared-absorptivity composite film layer structure comprises a silicon nitride film layer and a silicon dioxide film layer positioned on the upper surface of the silicon nitride film layer; the thermopile chip comprises a silicon substrate, a thermal oxidation layer, an isolation layer, a first thermocouple layer, a first insulation layer, a second thermocouple layer, a second insulation layer, an electrode pad layer and the high infrared absorptivity composite film layer structure. The utility model can greatly improve the infrared absorption rate, effectively reduce the heat conductivity and has higher absorption rate in the human body radiation wave band.
Description
Technical Field
The utility model relates to the technical field of infrared sensors, in particular to a composite film structure with high infrared absorptivity and a thermopile chip.
Background
The thermopile chip is based on the Seebeck effect principle, and dozens to hundreds of pairs of thermocouple materials are connected in series on the chip by adopting an MEMS processing technology. When infrared rays irradiate a sensitive area at the center of the chip, the temperature of a thermocouple hot junction at the center of the chip is increased, the edge of the thermopile chip is a cold junction of the thermocouple, and the temperature of the cold junction is ambient temperature and is not changed along with the temperature increase at the center; there is a certain temperature difference between the hot junction and the cold junction, thereby outputting a voltage signal. Thus, the thermopile sensor chip may convert infrared radiation energy into heat energy and then into an electrical signal.
In the prior art, the infrared absorption layer of the thermopile chip is usually a single-component film, so that the absorptivity is low; or a layer of black material is added on the single-component film, the absorption rate is increased, but the process is complex and incompatible, so that the infrared absorption layer of the thermopile chip has low absorption rate and low infrared radiation conversion heat energy efficiency, the responsivity and the detectivity of the chip are low, and the large-scale application of the thermopile sensor is restricted.
In order to solve the above problems, people are always seeking an ideal technical solution.
Disclosure of Invention
The utility model aims to overcome the defects of the prior art, and provides a composite film structure with high infrared absorptivity and a thermopile chip.
In order to achieve the purpose, the utility model adopts the technical scheme that:
the utility model provides a composite film structure with high infrared absorptivity, which comprises a silicon nitride film layer and a silicon dioxide film layer positioned on the upper surface of the silicon nitride film layer.
The second aspect of the present invention provides a thermopile chip comprising a silicon substrate, a thermal oxide layer, an insulating layer, a first thermocouple layer, a first insulating layer, a second thermocouple layer, a second insulating layer, an electrode pad layer, and the above-mentioned high infrared absorptivity composite film layer structure,
the thermal oxidation layer is positioned on the upper surface of the silicon substrate;
the isolation layer is positioned on the upper surface of the thermal oxidation layer;
the first thermocouple layer is positioned on the upper surface of the isolation layer;
the first insulating layer is positioned on the upper surface of the first thermocouple layer and extends to the isolation region of the first thermocouple layer;
the second thermocouple layers are positioned on the upper surfaces of the first insulating layers and are connected with the corresponding first thermocouple layers through the first insulating layers;
the second insulating layer is positioned on the upper surface of the second thermocouple layer;
the electrode pad layer is positioned on the upper surface of the second insulating layer and penetrates through the second insulating layer to be connected with the corresponding second thermocouple layer;
the composite film layer structure with high infrared absorptivity is located on the upper surface of the electrode pad layer and extends to the upper surfaces of the second insulating layer and the first insulating layer.
The utility model has the beneficial effects that:
1) the utility model provides a composite film layer structure with high infrared absorption rate, which adopts a double-layer infrared absorption layer structure consisting of a silicon nitride film layer and a silicon dioxide film layer, selects proper film layer thickness, can greatly improve the infrared absorption rate, and effectively reduces the heat conductivity;
2) the thickness of the silicon nitride film layer is 100nm to 500nm, and when the thickness of the silicon dioxide film layer is 400nm to 800nm, the composite film structure has high absorptivity in a human body radiation wave band, and is particularly suitable for a thermopile chip special for human body detection;
3) the utility model also provides a thermopile chip comprising the high infrared absorptivity composite film structure, wherein the thermopile chip adopts a heavily doped polysilicon layer, and an isolation layer for preventing ion migration and diffusion is arranged below the heavily doped polysilicon layer, so that the resistivity of a thermocouple material is reduced, the thermoelectric conversion efficiency is improved, and the responsiveness and the detection rate of the thermopile chip are improved.
Drawings
FIG. 1 is a schematic diagram of a thermopile chip structure of the present invention;
FIG. 2 is a partial schematic view of the first embodiment of the present invention;
FIG. 3 is a second partial schematic structural view of the present invention;
FIG. 4 is a schematic structural view of a high IR absorbing composite film structure of the present invention;
in the figure: 1. a silicon substrate; 2. a thermal oxidation layer; 3. an insulating layer; 4. a first thermocouple layer; 5. a first insulating layer; 6. a second thermocouple layer; 7. a second insulating layer; 8. an electrode pad layer; 9. a high infrared absorption rate composite film layer structure; 91. a silicon dioxide thin film layer; 92. a silicon nitride film layer.
Detailed Description
The technical solution of the present invention is further described in detail by the following embodiments.
Example 1
Fig. 4 shows a high ir absorption composite film structure, which includes a silicon nitride film layer 92, and a silicon dioxide film layer 91 on the upper surface of the silicon nitride film layer 92.
Note that the silicon dioxide thin film layer 91 is provided with a wiring window which is located above the electrode pad layer 8 of the thermopile chip.
In one embodiment, a PECVD process may be used to deposit a layer of low-stress ir absorbing material SiN/SiO2 and pattern the film to expose the die pad area for outward transmission of the detection signal.
It should be noted that the composite film layer structure with high infrared absorption rate is a silicon nitride (SiN) film layer and a silicon dioxide (SiO 2) film layer, and as the thickness of the infrared absorption layer increases, the infrared absorption rate of the composite film structure also increases, but as the thickness of the film increases, the thermal conductivity also increases, which results in faster heat dissipation at the center, no large temperature difference between the hot junction and the cold junction, and lower chip responsivity and detectivity. Therefore, when the infrared absorption layer of the thermopile is designed, the infrared absorption rate of the film layer is ensured, and the heat dissipation is reduced; through simulation calculation analysis and sample contrast test, be 100nm to 500nm at the thickness of silicon nitride thin layer, when the thickness of silicon dioxide thin layer was 400nm to 800nm, can enough guarantee the infrared absorption rate of thermopile chip, can reduce the heat dissipation of thermopile chip again, and have higher absorption rate in the human radiation wave band, can improve the responsivity and the detectivity that the thermopile chip was applied to human body detection greatly.
Example 2
On the basis of embodiment 1, this embodiment provides a specific implementation of a thermopile chip, as shown in fig. 1 to 3;
the thermopile chip includes a silicon substrate 1, a thermal oxidation layer 2, an insulating layer 3, a first thermocouple layer 4, a first insulating layer 5, a second thermocouple layer 6, a second insulating layer 7, an electrode pad layer 8, and a high infrared absorption rate composite film layer structure 9 of example 1, wherein,
the thermal oxidation layer 2 is positioned on the upper surface of the silicon substrate 1;
the isolation layer 3 is positioned on the upper surface of the thermal oxidation layer 2;
the first thermocouple layer 4 is positioned on the upper surface of the isolation layer 3, an isolation region is arranged in the central region of the first thermocouple layer 4, and the isolation region is used as the hot end of the thermopile chip;
the first insulating layer 5 is positioned on the upper surface of the first thermocouple layer 4 and extends to the isolation region of the first thermocouple layer 4;
the second thermocouple layers 6 are positioned on the upper surfaces of the first insulating layers 5, and are connected with the corresponding first thermocouple layers 4 through the first insulating layers 5;
the second insulating layer 7 is positioned on the upper surface of the second thermocouple layer 6;
the electrode pad layer 8 is located on the upper surface of the second insulating layer 7, and penetrates through the second insulating layer 7 to be connected with the corresponding second thermocouple layer 6;
the composite film layer structure 9 with high infrared absorptivity is located on the upper surface of the electrode pad layer 8 and extends to the upper surfaces of the second insulating layer 7 and the first insulating layer 5.
In one embodiment, the first thermocouple layer 4 is a heavily doped polysilicon layer, and the second thermocouple layer 6 is a metal aluminum layer; growing a low-stress thermocouple material Poly-Si layer on the isolation layer 3, and performing patterned etching treatment on the thermocouple material Poly-Si layer by adopting a photoetching method to obtain a certain number (for example, 50-300) of thermocouple strips; and depositing another thermocouple material metal Al layer on the upper surface of the first insulating layer 5, and performing patterned etching treatment to ensure that the thermocouple materials Al and Poly-Si are communicated only at hot junctions and cold junctions to form the same number of thermocouple pairs.
Specifically, the thickness of the heavily doped polysilicon layer is 200nm to 500nm, and the thickness of the metal aluminum layer is 100nm to 500 nm.
The thermocouple material Poly-Si layer is heavily doped and annealed by adopting an ion implantation method, and the resistivity of the Poly-Si layer can be changed by doping, so that the noise of the thermopile chip is reduced; however, the doped Poly-Si layer will undergo ion migration and diffusion to different degrees in the subsequent annealing process, so an isolation layer 3 needs to be deposited in advance under the Poly-Si layer 4 to prevent migration and diffusion of the doped ions and ensure the effective concentration of ion doping.
Specifically, the isolation layer 3 is a silicon nitride isolation layer, and the thickness of the silicon nitride isolation layer is 100nm to 300nm, so as to prevent migration and diffusion of doped ions in the heavily doped polysilicon layer.
Specifically, the first insulating layer 5 and the second insulating layer 7 are both silicon dioxide insulating layers, the thickness of the first insulating layer 5 is 100nm to 500nm, and the thickness of the second insulating layer 7 is 100nm to 500 nm.
As shown in fig. 2, the first insulating layer 5 is provided with a plurality of first windows through which the second thermocouple layers 6 are connected to the corresponding first thermocouple layers 4;
in one embodiment, a first insulating layer 5 is deposited on the upper surface of the first thermocouple layer 4 (the upper surface of the first thermocouple layer 4), and patterned by etching, wherein the first insulating layer 5 isolates and insulates two thermocouple materials, and avoids conduction in other areas outside a hot junction area and a cold junction area.
As shown in fig. 3, the second insulating layer 7 is provided with a plurality of second windows through which the electrode pad layers 8 are connected to the corresponding second thermocouple layers 6.
In a specific embodiment, a second insulating layer 7 is deposited on the upper surface of the second thermocouple layer 6, and is subjected to a patterned etching process to provide a second window, wherein the second window is used for exposing a region where the second thermocouple layer 6 is connected with the electrode pad layer 8, and ensuring insulation of other regions.
Specifically, the thermal oxidation layer 2 is a silicon dioxide layer and plays a role in supporting and stopping etching; the electrode pad layer 8 is a metal Al layer, and is subjected to patterning etching treatment, and has a positive electrode and a negative electrode.
In a specific embodiment, the thickness of the silicon substrate 1 is 300-600 um, and a dry etching method is adopted to etch the back cavity of the back surface of the silicon substrate, except for the peripheral supporting area of the chip, the middle part of the back cavity is completely etched; the etching depth is the thickness of the silicon wafer, and the etching is stopped until the silicon oxide layer is etched.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention and not to limit it; although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art will understand that: modifications to the specific embodiments of the utility model or equivalent substitutions for parts of the technical features may be made; without departing from the spirit of the present invention, it is intended to cover all aspects of the utility model as defined by the appended claims.
Claims (7)
1. A thermopile chip, characterized by: the high-infrared-absorptivity composite film structure comprises a silicon substrate, a thermal oxidation layer, an isolation layer, a first thermocouple layer, a first insulating layer, a second thermocouple layer, a second insulating layer, an electrode pad layer and a high-infrared-absorptivity composite film structure, wherein the high-infrared-absorptivity composite film structure comprises a silicon nitride film layer and a silicon dioxide film layer positioned on the upper surface of the silicon nitride film layer; wherein the content of the first and second substances,
the thermal oxidation layer is positioned on the upper surface of the silicon substrate;
the isolation layer is positioned on the upper surface of the thermal oxidation layer;
the first thermocouple layer is positioned on the upper surface of the isolation layer;
the first insulating layer is positioned on the upper surface of the first thermocouple layer and extends to the isolation region of the first thermocouple layer;
the second thermocouple layers are positioned on the upper surfaces of the first insulating layers and are connected with the corresponding first thermocouple layers through the first insulating layers;
the second insulating layer is positioned on the upper surface of the second thermocouple layer;
the electrode pad layer is positioned on the upper surface of the second insulating layer and penetrates through the second insulating layer to be connected with the corresponding second thermocouple layer;
the composite film layer structure with high infrared absorptivity is located on the upper surface of the electrode pad layer and extends to the upper surfaces of the second insulating layer and the first insulating layer.
2. The thermopile chip of claim 1, wherein: the first thermocouple layer is a heavily doped polysilicon layer, and the second thermocouple layer is a metal aluminum layer;
the thickness of the heavily doped polysilicon layer is 200nm to 500nm, and the thickness of the metal aluminum layer is 100nm to 500 nm.
3. The thermopile chip of claim 2, wherein: the isolation layer is a silicon nitride isolation layer, the thickness of the silicon nitride isolation layer is 100nm to 300nm, and the silicon nitride isolation layer is used for preventing migration and diffusion of doped ions in the heavily doped polycrystalline silicon layer.
4. The thermopile chip of claim 1, wherein: the first insulating layer and the second insulating layer are both silicon dioxide insulating layers, the thickness of the first insulating layer is 100nm to 500nm, and the thickness of the second insulating layer is 100nm to 500 nm.
5. The thermopile chip of claim 1, wherein: the first insulating layer is provided with a plurality of first windows, and the second thermocouple layer is connected with the corresponding first thermocouple layer through the first windows;
the second insulating layer is provided with a plurality of second windows through which the electrode pad layers are connected with the corresponding second thermocouple layers.
6. The thermopile chip of claim 1, wherein: the thickness of the silicon nitride film layer is 100nm to 500 nm.
7. The thermopile chip of claim 1, wherein: the thickness of the silicon dioxide film layer is 400nm to 800 nm.
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