CN216054705U

CN216054705U - Power device

Info

Publication number: CN216054705U
Application number: CN202122383523.7U
Authority: CN
Inventors: 刘利书
Original assignee: Meiken Semiconductor Technology Co ltd
Current assignee: Meiken Semiconductor Technology Co ltd
Priority date: 2021-09-28
Filing date: 2021-09-28
Publication date: 2022-03-15
Anticipated expiration: 2031-09-28

Abstract

The embodiment of the application discloses a power device. The power device includes: a first control electrode, a second control electrode, a first electrode and a second electrode; wherein a semiconductor structure is arranged between the first electrode and the second electrode; the second control electrode is used for switching the on or off state between the first electrode and the second electrode under the action of the voltage on the first control electrode.

Description

Power device

Technical Field

The embodiment of the application relates to the field of semiconductor devices, and relates to but is not limited to a power device.

Background

Throughout the life cycle of a semiconductor power device, the impact of electrostatic Discharge (ESD) is constantly encountered from manufacturing, packaging, shipping, and even in the finished semiconductor power device. When static charges accumulated in a semiconductor power device flow into the interior of the device through electrodes of the device, the generated transient current or voltage may damage or even fail the device.

Therefore, how to perform ESD protection on a semiconductor power device becomes an urgent problem to be solved.

SUMMERY OF THE UTILITY MODEL

In view of this, the present application provides a power device.

An embodiment of the present application provides a power device, including:

a first control electrode, a second control electrode, a first electrode and a second electrode; wherein the first electrode and the second electrode are connected through a semiconductor material; the second control electrode is used for switching the on or off state between the first electrode and the second electrode under the action of the voltage on the first control electrode;

a driving resistor connected between the first control electrode and the second control electrode;

and the electrostatic protection component is connected between the first control electrode and the first electrode and is used for conducting and releasing the electrostatic charges when the electrostatic charges appear on the first control electrode.

In some embodiments, the electrostatic protection assembly comprises: the first electrostatic protection unit and the second electrostatic protection unit are connected in series;

the second control electrode is also connected between the first electrostatic protection unit and the second electrostatic protection unit.

In some embodiments, the electrostatic protection assembly comprises: p-type semiconductor regions and N-type semiconductor regions are alternately arranged.

In some embodiments, the first electrostatic protection unit is composed of X groups of alternately arranged P-type semiconductor regions and N-type semiconductor regions; the second electrostatic protection unit is composed of Y groups of P-type semiconductor regions and N-type semiconductor regions which are alternately arranged.

In some embodiments, the power device further comprises: a semiconductor substrate;

the oxide layer covers the semiconductor substrate;

a polysilicon layer covering the oxide layer; the polycrystalline silicon layer comprises a first doping area and a second doping area; the first doped region is used for forming the electrostatic protection component; the second doped region is used for forming the driving resistor.

In some embodiments, the polysilicon layer is covered with a conductive layer;

the first control electrode, the second control electrode and the first electrode are respectively positioned in different conductive areas of the conductive layer; and an isolation groove is arranged between the different conductive areas.

In some embodiments, there is also an isolation layer between the conductive layer and the polysilicon layer;

the isolation layer includes: a discrete plurality of isolation regions;

the isolation region is located in the isolation trench between the different conductive regions.

In some embodiments, the second control electrode in the conductive layer further comprises a first contact structure and a second contact structure connected to each other;

the first contact structure is used for connecting the electrostatic protection component;

the second contact structure is used for connecting the driving resistor.

In some embodiments, the first contact structure is connected to the electrostatic protection component at a location at an interface of the first electrostatic protection unit and the second electrostatic protection unit.

In some embodiments, the second contact structure is connected to a surface of the first end of the second doped region; the first control electrode is connected with the surface of the second end of the second doping area.

The technical scheme provided by the embodiment of the application has the following beneficial effects: the power device in the embodiment of the application has the first control electrode and the second control electrode, the driving resistor is arranged between the first control electrode and the second control electrode, and the electrostatic protection assembly is arranged between the first control electrode and the first electrode, so that the driving resistor and the electrostatic protection assembly can be integrated in the power device at the same time, the integration level of the power device is improved, and the electrostatic protection effect is improved.

Drawings

Fig. 1 is an equivalent circuit diagram of a power device according to an embodiment of the present disclosure;

fig. 2 is an equivalent circuit diagram of another power device provided in an embodiment of the present application;

fig. 3 is a cross-sectional view of an esd protection structure according to an embodiment of the present application;

fig. 4 is a partial cross-sectional view of a power device provided in an embodiment of the present application;

FIG. 5 is an equivalent circuit diagram of an ESD protection structure;

fig. 6 is a top view of a power device according to an embodiment of the present disclosure;

fig. 7 is an equivalent circuit diagram of another power device provided in an embodiment of the present application;

fig. 8 is an equivalent circuit diagram of another power device provided in an embodiment of the present application.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

An embodiment of the present application provides a power device 100, as shown in fig. 1, including:

a first control electrode 101, a second control electrode 102, a first electrode 201, and a second electrode 301; wherein the first electrode 201 is connected with the second electrode 301 through a semiconductor material; the second control electrode 102 is used for switching the on or off state between the first electrode 201 and the second electrode 301 under the action of the voltage on the first control electrode 101;

a driving resistor 401 connected between the first control electrode 101 and the second control electrode 102;

an electrostatic protection component 402 connected between the first control electrode 101 and the first electrode 201, for conducting and discharging electrostatic charges when the electrostatic charges appear on the first control electrode 101.

The power device provided by the embodiment of the present application includes, but is not limited to, an IGBT (Insulated Gate Bipolar Transistor) device and an MOS (Metal-Oxide-Semiconductor Field Effect Transistor) device.

If the power device is an IGBT device, the second control electrode may be used to connect the gate, the first electrode, and the second electrode of the IGBT device and may be used to connect the emitter or the collector of the IGBT device.

If the power device is a MOS device, the second control electrode may be used to connect the gate, the first electrode, and the second electrode of the MOS device and may be used to connect the source or the drain of the MOS device.

A driving resistor is arranged between the first control electrode and the second control electrode, and a voltage signal of the first control electrode reaches the second control electrode through the partial pressure of the driving resistor. The voltage of the second control electrode is used for controlling the on or off of the power device: when the voltage of the second control electrode is higher than the grid opening voltage of the power device and lower than the maximum voltage born by the grid oxide layer, the first electrode and the second electrode are in a conducting state; when the voltage of the second control electrode is lower than the gate-on voltage of the power device, the first electrode and the second electrode are not conducted, that is, the power device is in an off state.

In addition, if the voltage of the second control electrode is higher than the breakdown voltage of the gate oxide layer of the power device, the power device is broken down. That is, when the first control electrode of the power device generates static electricity, it is possible to break down the power device through the second control electrode.

Therefore, in the embodiment of the present application, the first control electrode and the second control electrode have a driving resistance therebetween.

Therefore, the voltage on the control electrode of the power device, namely the first control electrode, is divided by the driving resistor, so that the high voltage caused by static electricity is reduced and is directly applied to the second control electrode, the power device is broken down, and the effect of protecting the power device is achieved.

In addition, in the embodiment of the application, an electrostatic protection component is arranged between the first control electrode and the first electrode, and the electrostatic protection component is used for providing an electrostatic leakage channel between the first control electrode and the first electrode. The electrostatic protection component is connected with the driving resistor and the power device in parallel.

Since the first control electrode is used to apply a signal from an external voltage source to the power device, the first control electrode is susceptible to electrostatic interaction, i.e., generates a high voltage. Therefore, the electrostatic protection component and the driving resistor can play a role of electrostatic protection.

In some embodiments, when the first control electrode is abnormally over-voltage, the abnormal voltage may be forward dropped to reduce the abnormal voltage when passing through the electrostatic protection component.

In some embodiments, when the first control electrode is abnormally over-voltage, the abnormal voltage may be discharged by breaking down the electrostatic protection component while passing through the electrostatic protection component, thereby protecting the power device.

In some embodiments, when the first control electrode has abnormal overvoltage, the abnormal voltage can clamp the overvoltage within a safe voltage range when passing through the electrostatic protection component, so as to protect the power device.

The power device provided in the embodiment of the present application has a first control electrode and a second control electrode, and sets a driving resistor between the first control electrode and the second control electrode, and sets an electrostatic protection component between the first control electrode and the first electrode, where the driving resistor is used to prevent the device from being broken down due to an excessively fast switching rate of the device, and the electrostatic protection component is used to provide an electrostatic leakage channel between the first control electrode and the first electrode.

Therefore, the driving resistor and the electrostatic protection component can be integrated in the power device at the same time, the integration level of the power device is improved, and the electrostatic protection effect is improved.

In some embodiments, as shown in fig. 2, the electrostatic protection component 402 includes: a first electrostatic protection unit 403 and a second electrostatic protection unit 404 connected in series;

Therefore, the electrostatic protection component between the first control electrode and the first electrode can be used as a discharge path of static electricity, and the electrostatic charges on the first control electrode can be discharged to the first electrode through the electrostatic protection component, so that the power device is protected. The second electrostatic protection unit between the second control electrode and the first electrode can be used as another discharge path to discharge the electrostatic charges on the second control electrode to the first electrode, thereby improving the electrostatic protection effect.

In some embodiments, the electrostatic protection component 402, as shown in fig. 3, includes: p-type semiconductor regions and N-type semiconductor regions are alternately arranged.

The alternating arrangement of the P-type semiconductor regions and the N-type semiconductor regions for forming the electrostatic protection component can be formed by doping the semiconductor material a plurality of times. Wherein the semiconductor material is doped with P-type ions to form a P-type semiconductor region and the semiconductor material is doped with N-type ions to form an N-type semiconductor region. One P-type semiconductor region and one N-type semiconductor region adjacent to each other may constitute a PN junction. The semiconductor material may be polysilicon or germanium, and the doping method includes, but is not limited to, thermal diffusion and ion implantation.

Fig. 3 is a schematic diagram of only one embodiment, and the positions and the number of the P-type regions and the N-type regions may be changed.

In some embodiments, as shown in fig. 3, the first electrostatic protection unit 403 is composed of P-type semiconductor regions and N-type semiconductor regions alternately arranged; the second electrostatic protection unit 404 is composed of P-type semiconductor regions and N-type semiconductor regions which are alternately arranged;

the first electrostatic protection unit of the electrostatic protection component can be composed of at least one PN junction and can play a role in voltage division, and the first electrostatic protection unit can also play a role in current sharing together with the driving resistor.

The second electrostatic protection unit of the electrostatic protection component can also be composed of at least one PN junction, and the second electrostatic protection component is used for clamping the voltage of the second control electrode between the gate-on voltage which is higher than the gate-on voltage of the power device and lower than the maximum voltage which can be borne by the gate oxide layer.

In some embodiments, as shown in fig. 4, the power device 100 further includes: a semiconductor substrate 110;

an oxide layer 120 covering the semiconductor substrate 110;

a polysilicon layer 130 covering the oxide layer 120; the polysilicon layer 130 comprises a first doped region 501 and a second doped region 502; the first doped region 501 is used for forming the electrostatic protection component 403; the second doped region 502 is used to form the driving resistor 401.

In some embodiments, the first doped region 501 and the second doped region 502 may be isolated from each other by the dielectric layer 131.

The semiconductor substrate may include a P-type semiconductor material substrate, such as a silicon (Si) substrate or a germanium (Ge) substrate, an N-type semiconductor substrate, such as an indium phosphide (InP) substrate, a composite semiconductor material substrate, such as a silicon germanium (SiGe) substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator (GeOI) substrate, and the like. An oxidation process including, but not limited to, wet oxygen oxidation and dry oxygen oxidation processes is performed on the semiconductor substrate to form an oxide layer.

In some embodiments, a polysilicon layer may be formed on the oxide layer in a manner including, but not limited to, a growth process and a deposition process, wherein the deposition process includes, but is not limited to, dry, wet diffusion, low pressure chemical vapor deposition, and in situ vapor reaction, among others.

In some embodiments, a dielectric layer may be formed on the oxide layer, a layer of photoresist may be deposited on the dielectric layer, a patterned mask may be used to align the photoresist layer with the exposure, the non-polymeric photoresist layer may be removed, openings for the first doped region and the second doped region may be formed, and polysilicon may be formed in the openings in the first doped region and the second doped region by using a deposition process or a growth process. The first doped region and the second doped region are separated by a dielectric layer, and the deposited dielectric layer material may be Boro-phospho-silicate Glass (BPSG).

In some embodiments, the first doped region and the second doped region may be formed by doping in a polysilicon layer, i.e. the first doped region and the second doped region are separated by the polysilicon layer. The doping method includes, but is not limited to, thermal diffusion and ion implantation processes, and the doping ions may be N-type ions and P-type ions, wherein the N-type ions mainly include phosphorus, arsenic, antimony and other elements, and the P-type ions mainly include boron, indium and other elements.

In some embodiments, the first doping region may be formed by: depositing a layer of photoresist on a polycrystalline silicon layer, aligning and exposing a patterned mask plate and the photoresist layer to form a plurality of openings, aligning the positions of the openings with all regions needing to be implanted with P-type ions on the polycrystalline silicon layer one by one, then implanting the P-type ions or N-type ions by adopting first ion implantation, and forming all P-type ion regions or N-type ion regions in a first doping region. And then covering a barrier layer on the formed P-type ion implantation area, and then carrying out second ion implantation on the residual area of the first doping area, wherein the implanted ions are N-type ions (when the ions implanted for the first time are P-type ions) or P-type ions (when the ions implanted for the first time are N-type ions), and all N-type ion areas in the first doping area are formed. And after the first doping area is implanted with the P-type ions and the N-type ions, annealing is carried out, so that a plurality of PN junctions and/or NP junctions are formed in the first doping area, and the electrostatic protection component is formed.

For example, when the doped region is PNPNPN, 2 steps of photolithography-ion implantation-removal of the non-polymerized photoresist are required.

In some embodiments, the first doping region may be formed by: depositing a layer of photoresist on a polysilicon layer, aligning and exposing the photoresist layer by adopting a patterned mask plate, then removing a non-polymerized photoresist layer, thus forming an opening on the photoresist layer, exposing the polysilicon layer below the photoresist layer, then carrying out first ion implantation on the exposed polysilicon layer, wherein the implanted ions can be P-type ions or N-type ions, then removing the polymerized photoresist layer, and at the moment, finishing the first ion implantation.

And continuously forming another opening in the adjacent area where the first ion implantation is finished by using a photoetching process, carrying out second ion implantation, wherein the ions implanted for the second time can be P-type ions or N-type ions, and then removing the polymerized photoresist layer. At this point the second ion implantation is completed.

The steps of photolithography, ion implantation and removal of the polymerized photoresist layer are repeated in this manner to form the first doped region.

For example, when the doped region is PNPNPN, 6 steps of photolithography-ion implantation-removal of non-polymerized photoresist are required.

In some embodiments, the second doped region may be formed by depositing a layer of photoresist on the polysilicon layer, exposing the polysilicon layer in alignment with the patterned mask, removing the non-polymerized photoresist layer, forming an opening in the photoresist layer, exposing the polysilicon layer under the photoresist layer, performing a first ion implantation on the exposed polysilicon layer, wherein the implanted ions may be N-type ions or P-type ions, and removing the polymerized photoresist on the polysilicon layer after completing the ion implantation.

And after the second doping area is implanted with the P-type ions and the N-type ions, annealing is carried out, and the driving resistor is formed in the second doping area. The resistance value of the driving resistor may be between 4 and 20 ohms, and the resistance value R of the driving resistor is related to parameters such as the type of implanted ions, the ion concentration, the length of the second doped region, and the depth of the second doped region. The resistance of the drive resistor can be adjusted to be within a desired range by adjusting these parameters.

In some embodiments, the first doped region and the second doped region may be annealed together after ion implantation is completed.

Different doping regions can be formed in the selected region by doping the polycrystalline silicon layer through ion implantation or ion diffusion, so that different semiconductor structures, including electrostatic protection components formed by diodes and the like, driving resistors and the like can be integrated in the device. On one hand, the manufacturing process is simple and easy to realize, and on the other hand, the formed device is high in integration level and small in occupied area.

In some embodiments, as shown in fig. 4, the polysilicon layer 130 is covered with a conductive layer 160;

the first control electrode 101, the second control electrode 102 and the first electrode 201 are respectively located in different conductive areas of the conductive layer 160; with an isolation trench 150 between the different conductive regions.

And depositing or growing a layer of metal on the polycrystalline silicon layer to serve as a conductive layer. Depositing a layer of photoresist on the metal, aligning and exposing the photoresist layer by adopting a patterned mask plate, then removing the nonpolymeric photoresist layer, forming a plurality of openings on the photoresist layer, exposing the metal layer below the openings, etching the metal downwards by a dry etching or wet etching process, forming a plurality of isolation grooves at the etching stop positions of the isolation grooves on the polycrystalline silicon layer, and then removing the polymerized photoresist layer.

At this time, different conductive regions are respectively used as a first control electrode, a second control electrode and a first electrode, and different isolation grooves are isolated.

Thus, a plurality of electrodes can be formed by forming a conductive layer and then separating the conductive layer into different regions. In addition, the metal has good conductive performance, and is used as a conductive electrode to be connected with each end of the power device, so that the control of the device is facilitated.

In some embodiments, as shown in fig. 4, an isolation layer 140 is further disposed between the conductive layer 160 and the polysilicon layer 130;

the isolation layer 140 includes: a discrete plurality of

isolation regions

141, 142, and 143;

the

isolation regions

141, 142 and 143 are located in the isolation trenches 150 between the different conductive regions.

Before depositing or growing a layer of metal medium on the polysilicon layer, an isolation layer can be deposited on the polysilicon layer, and the process for depositing the isolation layer can be a chemical vapor deposition process or a plasma enhanced atomic layer deposition process. The deposited spacer material may be borophosphosilicate glass.

Depositing a layer of photoresist on an isolation layer, aligning and exposing the photoresist layer by adopting a patterned mask, removing a non-polymerized photoresist layer, forming a plurality of openings on the photoresist layer, exposing the isolation layer below the openings, and etching the isolation layer downwards by using a dry etching or wet etching process, wherein the isolation layer is divided into different isolation regions including an isolation region positioned on a first doping region, the isolation region incompletely covers the first doping region and an isolation region positioned on a second doping region, and the isolation region incompletely covers the second doping region.

And depositing or growing a layer of metal on the polycrystalline silicon layer and the isolation layer to serve as a conductive layer. An isolation trench is then formed in the conductive layer using photolithography and etching processes. In the first doping region, the etching stop position of the isolation trench between the first control electrode and the second control electrode may be on the isolation layer, and the etching stop position of the isolation trench formed by photolithography between the second control electrode and the first electrode may also be on the isolation layer. In the second doping region, a position where etching of the isolation groove formed between the first electrode and the second control electrode is stopped may also be on the isolation layer.

There are different isolation regions in the isolation trenches between the different conductive regions. The isolation region is used to improve the charge interference resistance of an electrostatic protection component or a driving resistor formed in the underlying polysilicon layer.

In some embodiments, the second control electrode 102 in the conductive layer 160 further comprises a first contact structure 103 and a second contact structure 104 connected to each other;

the first contact structure 103 is used for connecting the electrostatic protection component 402;

the second contact structure 104 is used for connecting the driving resistor 401.

The second control electrode in the conductive layer further comprises a first contact structure and a second contact structure connected to each other. That is, the second control electrode may have an irregular shape with a plurality of contact structures extending therefrom, and the first contact structure is a portion of the second control electrode for connection with the electrostatic protection device, i.e., a portion of the polysilicon layer connected with the first contact structure, i.e., the electrostatic protection device on the polysilicon layer. The second contact structure is also part of the second control electrode, and the second contact structure covers part of the driving resistor and/or part of the isolation region, i.e. the second contact structure is connected with the driving resistor.

In some embodiments, the connection location of the first contact structure 103 and the electrostatic protection component 402 is at the intersection area of the first electrostatic protection unit 403 and the second electrostatic protection unit 404.

The first contact structure covers at least a partial region of the electrostatic protection component in the polysilicon layer, and divides the electrostatic protection component into a first electrostatic protection unit and a second electrostatic protection unit which are connected in series. The first contact structure is connected with the electrostatic protection component, and the connection point is arranged at the junction of the first electrostatic protection unit and the second electrostatic protection unit

In some embodiments, the second contact structure 104 is connected to a surface of the first end of the second doped region 502; the first control electrode 101 is connected to the second end surface of the second doped region 502.

The second doped region is used for forming a driving resistor, and the second contact structure covers part of the driving resistor and/or part of the isolation region, namely the second contact structure is connected with the first end of the driving resistor. The first control electrode covers a part of the driving resistor and/or a part of the isolation region, namely the first control electrode is connected with the second end of the driving resistor. And an isolation groove is arranged between the first control electrode and the second contact structure, namely the first control electrode is not connected with the second contact structure. The embodiments of the present application also have the following examples:

the ESD phenomenon often occurs in the process of packaging, transporting, assembling and using the device, and a high electric field is generated on a grid electrode of the device, so that a grid dielectric layer is subjected to insulation breakdown under the high electric field, and the device is failed.

The conventional ESD protection structure is shown in fig. 5, and a zener diode is connected to the gate and the source to form a leakage path.

Due to the manufacturing process of the traditional ESD protection structure, the ESD protection structure and the integrated driving resistor cannot be simultaneously and compatibly manufactured in the device.

According to the embodiment of the application, the ESD protection structure and the integrated driving resistor are simultaneously and compatibly manufactured in the device, so that the integration level of the device and the ESD protection capability of the device are improved.

As shown in fig. 6, a top view of the power device provided in the embodiment of the present application is that a driving resistor 401 made of symmetric polysilicon is designed between the first control electrode 101 and the second control electrode 102, and the two driving resistors 401 are in a parallel structure and are equivalently a driving resistor. Symmetrical electrostatic protection structures 402 are arranged among the first control electrode 101, the second control electrode 102 and the first electrode 201, and the structures are formed by multiple groups of diode structures such as PNPNPNP. The clamping voltage of the electrostatic protection component should be larger than the normal power supply voltage, for example, 15V, and the clamping voltage of the electrostatic protection component should be smaller than the breakdown voltage of the device gate oxide, for example, 40V, so that the clamping voltage can be designed to be 30V, and the diode in the electrostatic protection component can be configured to be a PNPNPNP structure.

Different diode groups can be arranged between the second control electrode and the emitter according to requirements. The diode is a polysilicon diode and is consistent with a polysilicon resistor, so that the ESD protection and driving resistor structure can be simultaneously integrated in the device.

In addition, the second control electrode is connected with the emitter, so that the potential energy of the second control electrode is output to the active area, and the normal work of the device is ensured.

Fig. 2 shows an equivalent circuit diagram of the device in a dashed box 200 in fig. 6, and fig. 4 shows a cross-sectional view of the dashed box 200 in fig. 6.

In one embodiment, the equivalent circuit diagram is shown in fig. 7, wherein the first electrostatic protection unit is composed of a forward diode, and the second electrostatic protection unit is composed of a forward diode and a reverse diode.

In one embodiment, the equivalent circuit diagram is shown in fig. 8, wherein the first electrostatic protection unit is composed of a forward diode and a backward diode connected in series, and the second electrostatic protection unit is composed of a forward diode and a backward diode.

The combination form of the first electrostatic protection unit and the second electrostatic protection unit is not limited to this, and it is only necessary that the voltage of the second control electrode is embedded by the electrostatic protection component into a maximum voltage which is higher than the gate-on voltage of the power device and lower than the maximum voltage that can be borne by the gate oxide layer.

Because the clamping voltage of the electrostatic protection component is greater than the normal power voltage, and the clamping voltage of the electrostatic protection component should be less than the breakdown voltage of the device gate oxide, when the clamping voltage is 15V and the breakdown voltage of the device gate oxide is 40V, the clamping voltage at this time can be designed to be any value of 15 to 40V, and when the clamping voltage is set to be 30V, the diode in the electrostatic protection component can be set to be a pnpnp structure at this time.

It can be understood that the embodiments of the present application have at least the following advantages over the related art for performing device ESD protection:

1. the driving resistor is integrated, so that the device has a current equalizing effect;

2. an electrostatic discharge channel of the first control electrode and the first electrode is provided, so that the ESD reliability is improved;

3. the ESD protection component and the driving resistor may be integrated in the same device including, but not limited to, a trench gate or planar gate device, an IGBT power device, and a MOSFET power device.

It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The above description is only for the embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A power device, comprising:

2. The power device of claim 1, wherein the electrostatic protection component comprises: the first electrostatic protection unit and the second electrostatic protection unit are connected in series;

3. The power device of claim 2, wherein the electrostatic protection component comprises: p-type semiconductor regions and N-type semiconductor regions are alternately arranged.

4. The power device according to claim 2, wherein the first electrostatic protection unit is composed of X groups of P-type semiconductor regions and N-type semiconductor regions alternately arranged, X being greater than or equal to 1; the second electrostatic protection unit is composed of Y groups of P-type semiconductor regions and N-type semiconductor regions which are alternately arranged, and Y is greater than or equal to 2.

5. The power device of claim 1, further comprising: a semiconductor substrate;

the oxide layer covers the semiconductor substrate;

6. The power device of claim 5,

a conductive layer covers the polycrystalline silicon layer;

7. The power device of claim 6, wherein there is an isolation layer between the conductive layer and the polysilicon layer;

the isolation layer includes: a discrete plurality of isolation regions;

8. The power device of claim 6, wherein the second control electrode in the conductive layer further comprises a first contact structure and a second contact structure connected to each other;

the second contact structure is used for connecting the driving resistor.

9. The power device of claim 8, wherein the first contact structure is connected to the electrostatic protection assembly at a location at an interface of the first electrostatic protection unit and the second electrostatic protection unit.

10. The power device of claim 8, wherein the second contact structure is connected to a surface of the first end of the second doped region; the first control electrode is connected with the surface of the second end of the second doping area.