CN215971115U - Vehicle speed limiter - Google Patents
Vehicle speed limiter Download PDFInfo
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- CN215971115U CN215971115U CN202121646891.XU CN202121646891U CN215971115U CN 215971115 U CN215971115 U CN 215971115U CN 202121646891 U CN202121646891 U CN 202121646891U CN 215971115 U CN215971115 U CN 215971115U
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- vehicle speed
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Abstract
The embodiment of the application relates to a vehicle speed limiter, which comprises a controller; the ADC processor is in data communication with the control signal sensor and is used for acquiring a control signal and feeding the control signal back to the controller; the first relay circuit is respectively connected with the control signal sensor and the electronic control unit; the signal output unit is in data communication with the controller and is used for outputting a speed-limiting control signal to the electronic control unit; and the input end of the second relay circuit is connected with the output end of the signal output unit, the output end of the second relay circuit is connected with the input end of the electronic control unit, and the control ends of the first relay circuit and the second relay circuit are connected with the controller. The vehicle speed limiter disclosed by the embodiment of the application can improve the safety of vehicle running in speed limiting.
Description
Technical Field
The application relates to the technical field of control, in particular to a vehicle speed limiter.
Background
The vehicle can effectively reduce the accident probability when running at the safe speed, and currently, speed limiters are mostly used for speed control, but the condition that the control signals of a power control system are interrupted easily occurs in the control signal switching process.
Disclosure of Invention
The embodiment of the application provides a vehicle speed limiter, which can improve the safety of vehicle running in speed limiting.
The above object of the embodiments of the present application is achieved by the following technical solutions:
the embodiment of the application provides a vehicle overspeed governor, includes:
a controller;
the ADC processor is in data communication with the control signal sensor and is used for acquiring a control signal and feeding the control signal back to the controller;
the first relay circuit is respectively connected with the control signal sensor and the electronic control unit;
the signal output unit is in data communication with the controller and is used for outputting a speed-limiting control signal to the electronic control unit; and
the input end of the second relay circuit is connected with the output end of the signal output unit, and the output end of the second relay circuit is connected with the input end of the electronic control unit;
the control ends of the first relay circuit and the second relay circuit are connected with the controller.
In a possible implementation manner of the embodiment of the application, the ADC processor acquires a control parameter P1 of the vehicle power system at idle speed, and the controller generates a control parameter P2 according to the control parameter P1;
after the control parameter P2 is generated, the controller transitions from the learning state to the control state.
In a possible implementation manner of the embodiment of the present application, the apparatus further includes a power supply circuit, where the power supply circuit is configured to output electric energy.
In a possible implementation manner of the embodiment of the present application, the apparatus further includes a state display circuit, and the state display circuit is configured to display a working state of the controller.
In one possible implementation manner of the embodiment of the application, the system further comprises an overspeed warning circuit, and the overspeed warning circuit is configured to give an alarm when the feedback speed of the control signal sensor exceeds the set speed.
In a possible implementation manner of the embodiment of the application, the device further comprises a communication module, and the communication module is used for sending the speed instruction sent by the upper computer to the controller.
In a possible implementation manner of the embodiment of the present application, the communication module is a wireless communication module.
In one possible implementation manner of the embodiment of the application, the signal output unit includes a potentiometer.
In one possible implementation manner of the embodiment of the present application, the signal output unit includes a chip having a DAC function.
In a possible implementation manner of the embodiment of the application, when the signal output unit outputs the speed-limiting control signal to the electronic control unit, the ADC simultaneously acquires the control signal and feeds the control signal back to the controller for comparison.
In a possible implementation manner of the embodiment of the application, when the comparison result is inconsistent, the speed limit control signal output by the signal output unit is corrected.
The embodiment of the application has the following technical effects:
the vehicle speed limiter provided by the embodiment of the application uses the double-relay circuit to switch, can realize nondestructive switching, can not interrupt control signals of an automobile power control system in the switching process, and can ensure the consistency of the output power of an engine.
Drawings
Fig. 1 is a block diagram schematically illustrating a structure of a vehicle speed limiter according to an embodiment of the present application.
Fig. 2 is a block diagram schematically illustrating the structure of another vehicle speed limiter provided in the embodiment of the present application.
Fig. 3 is a block diagram schematically illustrating a structure of a controller according to an embodiment of the present disclosure.
Fig. 4 is a block diagram illustrating a structure of a wireless communication module according to an embodiment of the present disclosure.
Fig. 5 is a schematic mounting diagram of a vehicle speed limiter provided by an embodiment of the application.
Fig. 6 is a schematic diagram of an operating principle of a vehicle speed limiter provided by the embodiment of the application.
In the figure, 12, an ADC processor, 13, a first relay circuit, 14, a signal output unit, 15, a second relay circuit, 21, a power supply circuit, 22, a state display circuit, 23 and a communication module; 6. controller 601, CPU 602, RAM 603, ROM 604, system bus 231, antenna 232, radio frequency device 233 and baseband device.
Detailed Description
The technical solution of the present application will be described in further detail below with reference to the accompanying drawings.
In order to understand the technical scheme in the application more clearly, firstly, the working modes of an electronic accelerator system and an existing speed limiter are simply introduced, the electronic accelerator system comprises an accelerator pedal, a pedal sensor, an electronic control unit, a motor, a throttle valve structure and the like, when a driver steps on the accelerator pedal, the pedal sensor can obtain a current signal and transmit the current signal to the electronic control unit, the electronic control unit outputs a control signal according to the signal, and the motor is driven to drive the throttle valve structure to act, so that the change of the vehicle speed is realized. The vehicle speed has a direct correlation with the accelerator pedal, and generally speaking, the deeper the accelerator pedal is depressed, the faster the vehicle speed.
The existing speed limiter is generally arranged between a pedal sensor and an electronic control unit, when the speed of a vehicle reaches a limited speed, the communication between the pedal sensor and the electronic control unit is cut off, the speed limiter communicates with the electronic control unit, and the control signal interruption of an automobile power control system is easy to occur in the switching process.
Referring to fig. 1, the vehicle speed limiter disclosed in the embodiment of the present application is mainly composed of a controller 6, an ADC processor 12, a first relay circuit 13, a signal output unit 14, a second relay circuit 15, and the like, where the ADC processor 12 performs data communication with a control signal sensor, and is used for sensing the position of an accelerator pedal through a control signal given by the control signal sensor. It is possible for the controller 6 to control the speed of the vehicle in dependence on the signal.
The two ends of the first relay circuit 13 are respectively connected with the control signal sensor and the electronic control unit, and the function of the first relay circuit is to determine whether the control signal sensor and the electronic control unit perform data communication, for example, when the vehicle speed is within a limited speed, the first relay circuit 13 is in a closed state, and when the vehicle speed exceeds the limited speed, the first relay circuit 13 is in an open state, and the controller 6 performs data communication with the electronic control unit.
The signal output unit 14 performs data communication with the controller 6, and functions to output a speed limit control signal to the electronic control unit to control the speed of the vehicle within a required range.
In some possible implementations, the signal output unit 14 uses a potentiometer or a chip with a DAC function.
The input end of the second relay circuit 15 is connected with the output end of the signal output unit 14, and the output end is connected with the input end of the electronic control unit, so that the output of the signal output unit 14 is transmitted to the electronic control unit, that is, when the second relay circuit 15 works, it can be regarded that the electronic control unit is controlled by the controller 6.
The control ends of the first relay circuit 13 and the second relay circuit 15 are both connected with the controller 6, and the controller 6 determines whether the first relay circuit 13 and the second relay circuit 15 participate in the speed control process.
In conjunction with a specific vehicle speed control process, when the speed of the vehicle reaches a set maximum speed, the controller 6 will sense through the ADC processor 12 that the first relay circuit 13 is switched from the closed state to the open state, the second relay circuit 15 is switched from the open state to the closed state, the electronic control unit starts to be controlled by the controller 6, and the controller 6 communicates with the electronic control unit to control the speed of the vehicle within a required range.
On the whole, the vehicle speed limiter provided by the embodiment of the application uses a double-relay circuit for switching, so that lossless switching can be realized, in the switching process, the control signal of an automobile power control system cannot be interrupted, and the consistency of the output power of an engine can be ensured.
As a specific embodiment of the vehicle speed limiter provided by the application, the ADC processor 12 collects a control parameter P1 of the vehicle power system at idle, the controller 6 generates a control parameter P2 according to the control parameter P1, and after the control parameter P2 is generated, the controller 6 is switched from the learning state to the control state.
Specifically, the controller 6 has a learning function, and can automatically generate or adjust the control parameters to be used in the speed limiting process according to the driving parameters of different vehicles, so that the method avoids the complexity and errors of manually adjusting the parameters.
For the controller 6, there are two working states, i.e., a learning state and a control state, in which the controller 6 generates the control parameter P2 according to the control parameter P1; in the control state, the controller 6 limits the running speed of the vehicle using the control parameter P2.
Referring to fig. 2, as a specific embodiment of the vehicle speed limiter provided by the application, a power supply circuit 21 is further added, the power supply circuit 21 is used for outputting electric energy, for example, the controller 6, the ADC processor 12, the first relay circuit 13, the signal output unit 14 and the second relay circuit 15 all need to be driven by electric energy during operation, and the power supply circuit 21 may be powered on from a vehicle-mounted power supply and then output the electric energy to each part needing to be driven by electric energy.
In some possible implementations, the power supply circuit 21 is composed of two parts, namely a connection line and a power supply chip, and when voltage transformation is required, a transformer needs to be added into the circuit.
As a specific embodiment of the vehicle speed limiter provided by the application, a state display circuit 22 is added, and the state display circuit 22 is used for displaying the working state of the controller 6, so that a driver or other related personnel can know whether the vehicle meets the speed limiting condition.
As mentioned above, the controller 6 has two operating states, namely a learning state and a control state, and the vehicle speed limiter provided by the embodiment of the present application can limit the speed of the vehicle only in the control state.
The state display circuit 22 is connected to the controller 6 for displaying whether the controller 6 is in the learning state or the control state.
In some possible implementations, the status display circuit 22 is composed of a communication circuit and a display screen.
In other possible implementations, the status display circuit 22 is comprised of a communication circuit and an indicator light.
As a specific embodiment of the vehicle speed limiter provided by the application, a communication module 23 is added, and the communication module 23 is used for sending a speed command sent by an upper computer to the controller 6 so as to adjust the maximum limit speed of the controller 6, for example, to change 90Km/h to 120 Km/h.
In some possible implementations, the communication module 23 is composed of two parts, namely a communication circuit and a connection interface.
Further, the communication module 23 is a wireless communication module, so that the maximum limit speed of the controller 6 can be modified using a wireless network or a local area network, etc.
As a specific embodiment of the vehicle speed limiter provided by the application, an overspeed warning circuit is additionally arranged, the overspeed warning circuit performs data interaction with the controller 6, and the overspeed warning circuit can give an alarm when the feedback speed of the control signal sensor exceeds the set speed.
For example, the ADC processor 12 or continuously communicates with the control signal sensor to obtain the real-time speed of the vehicle, the limited maximum speed of the vehicle is 90Km/h, when the actual speed of the vehicle exceeds 90Km/h, the vehicle speed limiter provided in the embodiment of the present application starts to intervene, and at this time, the overspeed warning circuit also starts to work to send a warning signal to warn the driver that the actual speed of the current vehicle has exceeded the set maximum speed.
In some possible implementations, the warning signal emitted by the overspeed warning circuit is an audio signal.
In other possible implementations, the warning signal sent by the overspeed warning circuit is an optical signal.
As a specific implementation of the vehicle speed limiter provided by the application, when the signal output unit outputs the speed limiting control signal to the electronic control unit, the ADC simultaneously acquires the control signal and feeds the control signal back to the controller 6 for comparison, so as to detect whether the output of the signal output unit is correct, and improve the reliability of use.
Further, when the comparison result is inconsistent, the speed limit control signal output by the signal output unit needs to be corrected in a manner of re-outputting the speed limit control signal.
Referring to fig. 3, it should be understood that the controller 6 may be a CPU, a microprocessor, an ASIC, or one or more integrated circuits for controlling the execution of the programs, and the controller 6 mainly includes a CPU601, a RAM602, a ROM603, and a system bus 604, wherein the CPU601, the RAM602, and the ROM603 are all connected to the system bus 604.
The ADC processor 12, the signal output unit 14, and the communication module 23 are connected to the system bus 604 via corresponding communication circuits, the first relay circuit 13 and the second relay circuit 15 are connected to the system bus 604 via a control circuit, and the status display circuit 22 is connected to the system bus 604 via a display driving circuit.
Referring to fig. 4, it should be understood that when the communication module 23 is a wireless communication module, it includes an antenna 231, an rf device 232 and a baseband device 233, and the antenna 231 is connected to the rf device 232. In the uplink direction, the radio frequency device 232 receives information transmitted by the upper computer through the antenna 231, and transmits the information transmitted by the terminal equipment to the baseband device 233 for processing. In the downlink direction, the baseband device 233 processes the information of the terminal and sends the information to the radio frequency device 232, and the radio frequency device 232 processes the information of the terminal device and sends the information to the upper computer through the antenna 231.
Referring to fig. 5 and 6, the vehicle speed limiter provided in the embodiment of the present application can read an accelerator signal, and adjust a throttle valve in the control manner in fig. 6, so as to control the vehicle speed.
The embodiments of the present invention are preferred embodiments of the present application, and the scope of protection of the present application is not limited by the embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.
Claims (10)
1. A vehicle speed limiter, comprising:
a controller (6);
the ADC processor (12) is in data communication with the control signal sensor and is used for acquiring a control signal and feeding the control signal back to the controller (6);
a first relay circuit (13) connected to the control signal sensor and the electronic control unit, respectively;
a signal output unit (14) in data communication with the controller (6) for outputting a speed limit control signal to the electronic control unit; and
the input end of the second relay circuit (15) is connected with the output end of the signal output unit (14), and the output end of the second relay circuit is connected with the input end of the electronic control unit;
the control ends of the first relay circuit (13) and the second relay circuit (15) are connected with the controller (6).
2. A vehicle speed limiter in accordance with claim 1 wherein the ADC processor (12) collects control parameters P1 for the vehicle powertrain at idle, the controller (6) generates control parameters P2 in accordance with control parameters P1;
after the control parameter P2 is generated, the controller (6) is switched from the learning state to the control state.
3. A vehicle speed limiter in accordance with claim 1 further comprising a power supply circuit (21), the power supply circuit (21) being arranged to output electrical energy.
4. A vehicle speed limiter in accordance with claim 1 or claim 2 further comprising a status display circuit (22), the status display circuit (22) being arranged to display the operating status of the controller (6).
5. The vehicle speed limiter of claim 4, further comprising an overspeed warning circuit configured to generate an alarm when the feedback speed of the control signal sensor exceeds a set speed.
6. A vehicle speed limiter according to claim 1 further comprising a communication module (23), the communication module (23) being arranged to send a speed command from the upper computer to the controller (6).
7. A vehicle speed limiter in accordance with claim 6 wherein the communications module (23) is a wireless communications module.
8. A vehicle speed limiter according to claim 1, characterised in that the signal output unit (14) comprises a potentiometer or a chip with DAC functionality.
9. The vehicle speed limiter according to claim 1, wherein when the signal output unit (14) outputs the speed limiting control signal to the electronic control unit, the ADC processor (12) simultaneously collects the control signal and feeds the control signal back to the controller (6) for comparison.
10. A vehicle speed limiter according to claim 9 wherein if the comparison does not match, the speed limit control signal output by the signal output unit (14) is modified.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121646891.XU CN215971115U (en) | 2021-07-19 | 2021-07-19 | Vehicle speed limiter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121646891.XU CN215971115U (en) | 2021-07-19 | 2021-07-19 | Vehicle speed limiter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215971115U true CN215971115U (en) | 2022-03-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202121646891.XU Active CN215971115U (en) | 2021-07-19 | 2021-07-19 | Vehicle speed limiter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215971115U (en) |
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2021
- 2021-07-19 CN CN202121646891.XU patent/CN215971115U/en active Active
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