CN215910612U - Detection circuit with protection of positive pole of group battery - Google Patents
Detection circuit with protection of positive pole of group battery Download PDFInfo
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- CN215910612U CN215910612U CN202122279191.8U CN202122279191U CN215910612U CN 215910612 U CN215910612 U CN 215910612U CN 202122279191 U CN202122279191 U CN 202122279191U CN 215910612 U CN215910612 U CN 215910612U
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Abstract
The utility model discloses a detection circuit with battery pack anode protection, which comprises a battery pack A, AFE chip U1, an MOS tube Q3, an MOS tube Q4, an access detection module, a singlechip U2, a resistor R6 and an access detection pin DET, wherein the design can bypass the dummy load circuit formed by R2, R5 and Q1 no matter the indirect load impedance condition between P + and P-, so that the singlechip can correctly detect the short circuit condition of the access detection pin DET, a voltage stabilizing diode ZD1 effectively prevents the action of the triode Q2 from forming interference when the output is not switched on, and the singlechip adopts timing detection to save power consumption.
Description
Technical Field
The utility model relates to a detection circuit with battery pack A positive electrode protection.
Background
With the increasingly wide application of lithium ion batteries, more and more electronic products adopt the lithium ion batteries for power supply. The battery management system BMS is a link between a battery and a user, and is mainly used to improve the utilization rate of the battery, prevent the battery from being overcharged and overdischarged, prolong the service life of the battery, monitor the state of the battery, and the like. And the BMS design scheme is divided into two types, positive protection and negative protection, according to the protection polarity. The positive pole protection scheme does not have the cost advantage because of IC preparation technology restriction in earlier stage, so negative terminal protection scheme is promoted, because do the negative terminal protection during early design, so insert when detecting foot DET all is that the outside short-circuit receives P + negative terminal protection, P + is equivalent to B +, detection circuitry design only need to earth partial pressure collection. After the positive end protection design triggers protection, P + is pulled down to B-by unknown external load impedance, so that voltage division acquisition cannot be carried out.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the defects in the prior art and provides a detection circuit with battery pack A positive electrode protection.
In order to achieve the purpose, the utility model is realized by the following technical scheme:
the utility model provides a detection circuitry with anodal protection of group battery, includes group battery A, AFE chip U1, MOS pipe Q3, MOS pipe Q4, inserts detection module, singlechip U2, resistance R6, inserts detection foot DET, group battery A 'S positive pole is B +, group battery A' S negative pole is B-, B-connecting resistance R6 'S one end, resistance R6' S the other end is output P-, MOS pipe Q3 'S S utmost point is connected to B +, MOS pipe Q3' S G utmost point is connected AFE chip U1 'S CHG end, MOS pipe Q3' S D utmost point is connected MOS pipe Q4 'S D utmost point, AFE chip U1' S DSG end is connected to MOS pipe Q4 'S G utmost point, MOS pipe Q4' S S output P +, singlechip U2, output P-, output P +, access detection foot DET all connect and insert detection module.
Preferably, the MOS transistors Q3 and Q4 are both N-channel MOS transistors.
Preferably, the access detection module includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a transistor Q1, a transistor Q2, a diode D1, and a zener diode ZD1, an emitter of the transistor Q2 is connected to the output terminal P-, a collector of the transistor Q2 is connected to the single chip microcomputer U2, a collector of the transistor Q2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the single chip microcomputer U2, a base of the transistor Q2 is connected to an anode of the zener diode ZD 2 through the resistor R2, a cathode of the zener diode ZD 2 is connected to the access detection pin DET, a cathode of the zener diode 2 is connected to a cathode of the diode D2, an anode of the diode D2 is connected to one end of the resistor R2, and an emitter of the transistor Q2 is connected to the other end of the output terminal P- > -9, the output terminal ZD-P-1, and the collector of the diode Q2 are connected to the single chip microcomputer ZD 2, and the single chip microcomputer U2, the output terminal P-b 2, and the collector is connected to the single chip microcomputer U2, and the single chip microcomputer U2, the collector is connected to the single chip microcomputer unit, the base of the triode Q1 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the other end of a resistor R3, and the collector of the triode Q1 is connected with an output end P + through a resistor R2.
Preferably, the transistor Q1 and the transistor Q2 are both NPN transistors.
Preferably, the battery pack a is a lithium ion battery pack a.
The utility model has the following beneficial effects: the utility model can bypass the dummy load circuit composed of R2, R5 and Q1 no matter how the load impedance between P + and P-, so that the single chip can correctly detect the short circuit condition of the access detection pin DET, the voltage stabilizing diode ZD1 can effectively prevent the triode Q2 from acting to form interference when the output is not opened, and the single chip adopts timing detection to save power consumption.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
Detailed Description
The technical scheme of the utility model is further explained by combining the attached drawings of the specification:
as shown in fig. 1, a detection circuit with battery pack positive electrode protection includes a battery pack A, AFE chip U1, a MOS transistor Q3, a MOS transistor Q4, an access detection module 1, a single chip microcomputer U2, a resistor R6, and an access detection pin DET, where the positive electrode of the battery pack a is B +, the negative electrode of the battery pack a is B-, the B-is connected to one end of the resistor R6, the other end of the resistor R6 is an output terminal P-, the B + is connected to the S-pole of the MOS transistor Q3, the G-pole of the MOS transistor Q3 is connected to the CHG-terminal of the AFE chip U1, the D-pole of the MOS transistor Q3 is connected to the D-pole of the MOS transistor Q4, the G-pole of the MOS transistor Q4 is connected to the DSG-terminal of the chip U1, the S-pole of the MOS transistor Q4 is P +, and the U2, the output terminal P-, DET +, and the access detection pin is connected to the access detection module 1.
As shown in fig. 1, the MOS transistors Q3 and Q4 are both N-channel MOS transistors.
As shown in fig. 1, the access detection module 1 includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a transistor Q1, a transistor Q2, a diode D1, and a zener diode ZD1, an emitter of the transistor Q2 is connected to the output terminal P-, a collector of the transistor Q2 is connected to the single chip microcomputer U2, a collector of the transistor Q2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the single chip microcomputer U2, a base of the transistor Q2 is connected to an anode of the zener diode ZD 2 through the resistor R2, a cathode of the zener diode ZD 2 is connected to the detection pin DET, a cathode of the zener diode ZD 2 is connected to a cathode of the diode D2, an anode of the diode D2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to an emitter of the transistor Q2, and the output terminals P- & P-8672 are connected to the output terminals P-369 and P-P, the base of the triode Q1 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the other end of a resistor R3, and the collector of the triode Q1 is connected with an output end P + through a resistor R2. The other end of the resistor R1 is a DET-EN end, the anode of the diode D1 is a T-DET end, the collector of the triode Q2 is a T-P + end, the DET-EN end is used for controlling the IO of the single chip microcomputer to be used for controlling the circuit to be started and powered, the T-DET end is used for detecting the IO of the battery pack which is not started to output, and the T-P + is used for detecting the IO of the battery pack which is started to output.
As shown in fig. 1, the transistor Q1 and the transistor Q2 are NPN transistors, and the battery pack a is a lithium ion battery pack a.
The working principle is as follows:
the single chip microcomputer firstly enables DET-EN to be high in level, if DET and P + are short-circuited, T-DET can be identified to be low in level, otherwise, if the DET and P + are not short-circuited, the T-DET identifies the high level. After the battery pack is started to output, P + carries a potential, DET-EN gives a high level, if DET is short-circuited P +, T-P + recognizes a low level, otherwise, T-P + recognizes a high level.
The D1 can be replaced by a Zener diode or a TVS and other devices with one-way conductivity, the Q1 and the Q2 can be replaced by NMOS or N-type switching devices such as an N-type Darlington tube and the like, and the key point of the utility model is that in the positive end protection design, a DET external connection P + detection design can be used regardless of the external load impedance condition.
The utility model can bypass the dummy load circuit composed of R2, R5 and Q1 no matter how the load impedance between P + and P-, so that the single chip can correctly detect the short circuit condition of the access detection pin DET, the voltage stabilizing diode ZD1 can effectively prevent the triode Q2 from acting to form interference when the output is not opened, and the single chip adopts timing detection to save power consumption.
It should be noted that the above list is only one specific embodiment of the present invention. It is clear that the utility model is not limited to the embodiments described above, but that many variations are possible, all of which can be derived or suggested directly from the disclosure of the utility model by a person skilled in the art, and are considered to be within the scope of the utility model.
Claims (5)
1. The utility model provides a detection circuitry with protection of group battery positive pole, its characterized in that, includes group battery A, AFE chip U1, MOS pipe Q3, MOS pipe Q4, inserts detection module (1), singlechip U2, resistance R6, inserts detection pin DET, group battery A ' S positive pole is B +, group battery A ' S negative pole is B-, B-one end of connecting resistance R6, the other end of resistance R6 is output P-, B + is connected MOS pipe Q3 ' S S utmost point, MOS pipe Q3 ' S G utmost point is connected AFE chip U1 ' S CHG end, MOS pipe Q3 ' S D utmost point is connected MOS pipe Q4 ' S D utmost point, MOS pipe Q4 ' S G utmost point is connected the DSG end of MOS pipe U1, MOS pipe Q4 ' S S output P +, U2, output P-, DET output P +, inserts detection pin and all connects and inserts detection module (1) AFE.
2. The detection circuit with the battery pack anode protection function according to claim 1, wherein the MOS transistor Q3 and the MOS transistor Q4 are both N-channel MOS transistors.
3. The detection circuit with battery pack anode protection according to claim 1, wherein the access detection module (1) comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a transistor Q1, a transistor Q2, a diode D1, a zener diode ZD1, an emitter of the transistor Q2 is connected with the output terminal P-, a collector of the transistor Q2 is connected with the singlechip U2, a collector of the transistor Q2 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the singlechip U2, a base of the transistor Q2 is connected with an anode of the zener diode ZD1 through the resistor R4, a cathode of the zener diode ZD1 is connected with the access detection pin DET, a cathode of the zener diode 1 is connected with a cathode of the diode D1, an anode of the diode D1 is connected with one end of the resistor ZD1, the other end of the resistor R1 is connected with the other end of the resistor R3, the emitter of the triode Q1 is connected with the output end P-, the base of the triode Q1 is connected with one end of the resistor R5, the other end of the resistor R5 is connected with the other end of the resistor R3, and the collector of the triode Q1 is connected with the output end P + through the resistor R2.
4. The detection circuit with battery pack positive electrode protection as claimed in claim 3, wherein the transistors Q1 and Q2 are NPN transistors.
5. The detection circuit with battery pack positive electrode protection according to claim 1, wherein the battery pack A is a lithium ion battery pack A.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122279191.8U CN215910612U (en) | 2021-09-18 | 2021-09-18 | Detection circuit with protection of positive pole of group battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122279191.8U CN215910612U (en) | 2021-09-18 | 2021-09-18 | Detection circuit with protection of positive pole of group battery |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215910612U true CN215910612U (en) | 2022-02-25 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122279191.8U Active CN215910612U (en) | 2021-09-18 | 2021-09-18 | Detection circuit with protection of positive pole of group battery |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215910612U (en) |
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2021
- 2021-09-18 CN CN202122279191.8U patent/CN215910612U/en active Active
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| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20221201 Address after: Room 44, 23rd Floor, Building 1, New Drug Creation Center, No. 10 Yaoxi Road, Nanyu Town, Minhou County, Fuzhou City, Fujian Province, 350109 Patentee after: Scud Energy Technology Co.,Ltd. Address before: Floor 6, No.98, Jiangbin East Avenue, Mawei District, Fuzhou City, Fujian Province (in the pilot Free Trade Zone) Patentee before: FUJIAN FEIMAOTUI POWER TECHNOLOGY Co.,Ltd. |