CN215871381U - Anti-interference circuit and receiver - Google Patents
Anti-interference circuit and receiver Download PDFInfo
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- CN215871381U CN215871381U CN202120665512.5U CN202120665512U CN215871381U CN 215871381 U CN215871381 U CN 215871381U CN 202120665512 U CN202120665512 U CN 202120665512U CN 215871381 U CN215871381 U CN 215871381U
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Abstract
The application discloses an anti-interference circuit and a receiver, wherein the anti-interference circuit comprises a receiving circuit, a detection circuit, an amplitude limiting circuit and a selection circuit; the receiving circuit is used for receiving radio frequency signals; the detection circuit is connected with the receiving circuit and used for detecting the strength of an interference signal in the radio frequency signal and generating a first signal corresponding to the strength of the interference signal; the amplitude limiting circuit is used for reducing the strength of an interference signal in the radio frequency signal; the selection circuit is connected with the detection circuit and used for responding to the first signal to select whether to conduct a path between the receiving circuit and the amplitude limiting circuit. By means of the method, the interference reduction processing can be performed on the interference signals in time, and stability of the anti-interference capability is improved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to an anti-interference circuit and a receiver.
Background
The zero intermediate frequency receiver has the advantages of simple structure, small volume, high integration level, low cost and the like, has great advantages in the aspects of miniaturization, low cost and the like of a handheld end, gradually replaces a superheterodyne receiver, and becomes a current mainstream scheme.
In a long-term research and development process, the inventor of the present application finds that although the zero intermediate frequency receiver has high receiving sensitivity, the zero intermediate frequency receiver is poor in the aspect of resisting strong interference signals, and the ability of the terminal to resist strong interference signals is the most important index of the product quality, because it directly affects the user experience and the market competitiveness. In the prior art, a method of detecting the power of a rear useful signal and controlling the attenuation of a front end by software is mostly adopted to resist a strong interference signal, and the method can play a good role in resisting the strong interference signal when the useful signal is strong, and can fail when the useful signal is weak, so that the problems of discontinuous control and passive attenuation exist.
SUMMERY OF THE UTILITY MODEL
The technical problem that this application mainly solved provides an anti jamming circuit and receiver, can in time handle interference signal, has improved the stability of interference killing feature.
In order to solve the technical problem, the application adopts a technical scheme that: an anti-jamming circuit is provided, which comprises a receiving circuit, a detection circuit, a limiting circuit and a selection circuit; the receiving circuit is used for receiving radio frequency signals; the detection circuit is connected with the receiving circuit and used for detecting the strength of an interference signal in the radio frequency signal and generating a first signal corresponding to the strength of the interference signal; the amplitude limiting circuit is used for reducing the strength of an interference signal in the radio frequency signal; the selection circuit is connected with the detection circuit and used for responding to the first signal to select whether to conduct a path between the receiving circuit and the amplitude limiting circuit.
The selection circuit comprises a comparison circuit and a first switch circuit; the comparison circuit is connected with the detection circuit and used for comparing the amplitude of the first signal with the amplitude of the preset signal and outputting a second signal representing the magnitude relation between the amplitude of the first signal and the amplitude of the preset signal; the first switch circuit is connected with the comparison circuit and used for conducting a path between the receiving circuit and the amplitude limiting circuit when the second signal indicates that the amplitude of the first signal is larger than the amplitude of the preset signal.
The comparison circuit comprises an operational amplifier and a first resistor, wherein the first input end of the operational amplifier is connected with the detection circuit, the second input end of the operational amplifier is grounded, the output end of the operational amplifier is connected with the first end of the first resistor, and the second end of the first resistor is used as the output end of the comparison circuit and is connected with the first switch circuit; and/or the comparison circuit further comprises a first capacitor, and the output end of the comparison circuit is grounded through the first capacitor.
The anti-interference circuit further comprises a second switch circuit, the second switch circuit is connected with the comparison circuit and used for conducting a path between the output end of the amplitude limiting circuit and the radio frequency signal processor when the second signal indicates that the amplitude of the first signal is larger than the amplitude of the preset signal.
The amplitude limiting circuit comprises a second capacitor, an amplitude limiting transistor and a third capacitor which are sequentially connected in series.
The detection circuit comprises a diode, a fourth capacitor and a second resistor, wherein the first end of the diode is connected with the receiving circuit, the second end of the diode is connected with the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, the first end of the fourth capacitor is connected with the selection circuit, the first end of the second resistor is connected with the first end of the fourth capacitor, and the second end of the second resistor is grounded.
The anti-interference circuit further comprises a filter circuit, the first end of the fourth capacitor is connected with the selection circuit through the filter circuit, the filter circuit comprises a third resistor and a fifth capacitor, the first end of the third resistor is grounded through the second resistor, the second end of the third resistor is grounded through the fifth capacitor, the first end of the fifth capacitor is connected with the selection circuit, and the second end of the fifth capacitor is grounded.
The anti-interference circuit further comprises a coupling circuit, and the coupling circuit is connected with the receiving circuit; the selection circuit is used for conducting a path between the receiving circuit and the amplitude limiting circuit when the amplitude of the first signal is larger than the amplitude of the preset signal, and conducting a path between the coupling circuit and the receiving circuit when the amplitude of the first signal is smaller than or equal to the amplitude of the preset signal.
Wherein the coupling circuit comprises a sixth capacitor.
In order to solve the above technical problem, another technical solution adopted by the present application is: there is provided a receiver comprising an antenna and an anti-jamming circuit as described above, connected to each other.
The beneficial effect of this application is: different from the situation of the prior art, the anti-interference circuit comprises a receiving circuit, a detection circuit, an amplitude limiting circuit and a selection circuit; the receiving circuit is used for receiving radio frequency signals; the detection circuit is connected with the receiving circuit and used for detecting the strength of an interference signal in the radio frequency signal and generating a first signal corresponding to the strength of the interference signal; the amplitude limiting circuit is used for reducing the strength of an interference signal in the radio frequency signal; the selection circuit is connected with the detection circuit and used for responding to the first signal to select whether to conduct a path between the receiving circuit and the amplitude limiting circuit. The interference signal strength is detected through pure hardware, and whether a channel between the amplitude limiting circuit and the receiving circuit is switched on or not is selected based on the interference signal strength, so that the switching-on between the amplitude limiting circuit and the receiving circuit can be realized in time, interference reduction processing can be performed on the interference signal in time, and the stability of the anti-interference capability is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts. Wherein:
fig. 1 is a schematic structural diagram of an embodiment of a receiver provided in the present application;
FIG. 2 is a schematic block diagram of one embodiment of the immunity circuit of FIG. 1;
FIG. 3 is a schematic block diagram of another embodiment of the immunity circuit of FIG. 1;
fig. 4 is a schematic diagram of a specific structure of the detection circuit, the filter circuit, the selection circuit, the coupling circuit, the limiter circuit, and the second switch circuit shown in fig. 3.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that if descriptions related to "first", "second", etc. exist in the embodiments of the present application, the descriptions of "first", "second", etc. are only used for descriptive purposes, and are not to be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination of technical solutions should be considered to be absent and not be within the protection scope of the present application.
For a better understanding of the present application, a more detailed description of an anti-jamming circuit and receiver provided herein is provided below with reference to the accompanying drawings and specific embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a receiver according to the present application. The receiver 100 includes an antenna 10 and an anti-interference circuit 30, where the antenna 10 is configured to receive a radio frequency signal, and the anti-interference circuit 30 is connected to the antenna 10, and is configured to process an interference signal in the received radio frequency signal, so as to reduce the strength of the interference signal, improve the anti-interference performance of the receiver 100, and reduce the influence of the interference signal on the receiver 100.
The receiver 100 provided by the present application may adopt a zero-if architecture, and the receiver 100 of the zero-if architecture has the advantages of high integration level, miniaturization, low cost, simple architecture, etc., but its strong interference signal resistance is not good. The anti-interference circuit 30 is additionally arranged in the receiver 100, and the anti-interference circuit 30 can immediately process the interference signal when the intensity of the interference signal is detected to be too large, so that the intensity of the interference signal is reduced, the influence of the interference signal on the receiver 100 is reduced, and the anti-interference capability of the receiver 100 is improved.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an embodiment of the anti-jamming circuit shown in fig. 1. The present application provides a first embodiment, in which the interference rejection circuit 30 includes at least a receiving circuit 31, a detecting circuit 32, a limiting circuit 33, and a selecting circuit 34.
In particular, the receiving circuit 31 is used to receive radio frequency signals. The detection circuit 32 is connected to the receiving circuit 31, and is configured to detect a strength of an interference signal in the radio frequency signal and generate a first signal corresponding to the strength of the interference signal. The output form of the detection circuit 32 (i.e. the form of the first signal) can be set according to the specific use requirement, and the selection circuit 34 is used in this application to connect with the detection circuit 32, so the output first signal should be the form that can be recognized by the selection circuit 34, for example, the form of the first signal can be a voltage signal.
In this embodiment, since the useful signal strength in the rf signal is small and the detection of the interference signal strength in the rf signal is less affected, the detection circuit 32 may detect the rf signal to obtain the interference signal strength in the rf signal, and generate the first signal capable of reflecting the interference signal strength based on the detected interference signal strength. It is understood that in other embodiments, the rf signal may be subjected to dc removal or the like before the detection circuit 32 performs the interference signal strength detection, so as to filter out the useful signal in the rf signal, thereby eliminating the influence of the useful signal on the interference signal strength detection.
The amplitude limiting circuit 33 is used to reduce the intensity of an interference signal in the radio frequency signal, reduce the power of the interference signal entering the back-end circuit, reduce the influence of the interference signal, and improve the anti-interference capability.
In this embodiment, the limiter circuit 33 utilizes the saturation compression characteristic of the transistor to realize the function of limiting, and can reduce the strength of the interference signal according to a limited range, and reduce the power of the interference signal entering the back-end circuit, thereby reducing the influence of the interference signal. Taking the clipping output of the clipping circuit 33 as 0dBm as an example, if the strength of the interference signal is +10dBm at this time, the output is 0dBm after passing through the clipping circuit 33, thereby reducing the strength of the interference signal. It is understood that, in other embodiments, the strength of the interference signal may also be reduced by other circuits, and may be specifically set according to actual use requirements, which is not specifically limited herein.
The selection circuit 34 is connected to the detection circuit 32, and is used for selecting whether to turn on the path between the receiving circuit 31 and the amplitude limiting circuit 33 in response to the first signal; specifically, the selection circuit 34 determines whether to connect the limiter circuit 33 with the receiving circuit 31 based on the first signal, that is, the selection circuit 34 can select whether to connect the path between the limiter circuit 33 and the receiving circuit 31 according to the strength of the interference signal, the strength of the interference signal in the radio frequency signal is too high, and when the rear-end circuit is greatly affected, the selection circuit 34 selects to connect the path between the limiter circuit 33 and the receiving circuit 31, so that the radio frequency signal is introduced into the limiter circuit 33, so as to perform interference reduction processing on the interference signal in time, thereby reducing the strength of the interference signal in the radio frequency signal, reducing the power of the interference signal entering the rear-end circuit, and reducing the influence of the interference signal.
Referring to fig. 3, fig. 3 is a schematic structural diagram of another embodiment of the immunity circuit shown in fig. 1. The interference rejection circuit 30 includes a receiving circuit 31, a detecting circuit 32, a clipping circuit 33, and a selecting circuit 34.
In one embodiment, the receiving circuit 31 includes some devices of the rf front end, for example, the receiving circuit 31 includes a band-pass filter 311 and a low noise amplifier 313, the band-pass filter 311 is used to pass the signal of the useful frequency in the received rf signal, and simultaneously suppress the signal of the non-useful frequency, i.e. set a desired frequency band, allow the signal in the frequency band to pass, and filter the signal out of the frequency band to eliminate part of the interference signal; the low noise amplifier 313 is connected to the band pass filter 311, and is configured to amplify the signal output by the band pass filter 311, so that the amplitude of the waveform of the output interference signal can be increased, which is advantageous for the detection circuit 32 to detect the intensity of the interference signal in the radio frequency signal. A small part of the radio frequency signal after the low noise amplification is coupled into the detection circuit 32 to detect the interference signal. It is understood that, in other embodiments, the receiving circuit 31 may further include other devices such as a low-pass filter, which may be specifically configured according to actual use requirements and is not specifically limited herein.
The selection circuit 34 includes at least a comparison circuit 341 and a first switch circuit 343. The comparison circuit 341 is connected to the detection circuit 32, and may compare the amplitude of the first signal generated based on the strength of the interference signal with the amplitude of the preset signal, and output a second signal indicating the magnitude relationship between the amplitude of the first signal and the amplitude of the preset signal, that is, the comparison circuit 341 may output a control signal whether to turn on the path between the receiving circuit 31 and the amplitude limiting circuit 33 based on the magnitude relationship between the amplitude of the first signal and the amplitude of the preset signal. The size of the preset signal may be specifically set according to an actual usage scenario, and the form of the preset signal may be specifically set according to the form of the first signal, which is not specifically limited herein, for example, if the first signal is a voltage signal, the preset signal is set to be in the form of a voltage signal. The signal form output by the comparison circuit 341 may be specifically set according to a device for receiving the output signal of the comparison circuit 341, for example, the comparison circuit 341 may output in a level form to control the first switch circuit 343.
The first switch circuit 343 is connected to the comparison circuit 341, and is configured to, when the second signal indicates that the amplitude of the first signal is greater than the amplitude of the preset signal, turn on the path between the receiving circuit 31 and the amplitude limiting circuit 33, that is, when the amplitude of the first signal is greater than the amplitude of the preset signal, indicate that the strength of the interference signal in the radio frequency signal is greater, at this time, the comparison circuit 341 outputs the second signal that controls the first switch circuit 343 to turn on the path between the receiving circuit 31 and the amplitude limiting circuit 33, so that the radio frequency signal is passed through the amplitude limiting circuit 33, the strength of the interference signal in the radio frequency signal is reduced, and the influence of the interference signal is reduced.
With continued reference to fig. 3, the present application provides a second embodiment, which differs from the above embodiments in that: the anti-jamming circuit 30 further includes a coupling circuit 35, the coupling circuit 35 is connected to the receiving circuit 31, and when the amplitude of the first signal is smaller than or equal to the amplitude of the preset signal, the first switching circuit 343 outputs a second signal indicating that the amplitude of the first signal is smaller than or equal to the amplitude of the preset signal, so as to control the conduction of the path between the coupling circuit 35 and the receiving circuit 31. That is to say, the first switch circuit 343 actually functions to switch the path, when the amplitude of the first signal is greater than the amplitude of the preset signal, that is, the intensity of the interference signal is high, the first switch circuit 343 is switched to the amplitude limiting circuit 33, the path between the receiving circuit 31 and the amplitude limiting circuit 33 is turned on, so as to process the interference signal in time, so that the interference signal is reduced or reduced after being processed by the amplitude limiting circuit 33, thereby reducing the intensity of the interference signal in the path, and when the amplitude of the first signal is less than or equal to the amplitude of the preset signal, that is, the intensity of the interference signal is low, the interference signal has substantially no influence or little influence on the path, at this time, the interference signal does not need to be processed, the first switch circuit 343 is switched to the coupling circuit 35, the path between the receiving circuit 31 and the coupling circuit 35 is turned on, because no signal is processed, it is ensured that the useful signal is not attenuated when the interfering signal is small. Further, when the jammer rejection circuit 30 is applied to the receiver 100, the reception sensitivity of the receiver 100 under weak jammer signals is improved.
Referring to fig. 3, in an embodiment, the anti-jamming circuit 30 further includes a filter circuit 36, the filter circuit 36 may be disposed between the detection circuit 32 and the selection circuit 34, and the filter circuit 36 may filter the radio frequency signal processed by the detection circuit 32 to filter a part of the jamming signals in the radio frequency signal, so that the waveform of the jamming signal detected by the detection circuit 32 is smooth.
Referring to fig. 3, in an embodiment, the anti-jamming circuit 30 further includes a second switch circuit 37 and a radio frequency signal processor 38, the second switch circuit 37 is connected to the comparison circuit 341, when the amplitude of the first signal is greater than the amplitude of the preset signal, the comparison circuit 341 outputs a second signal, and controls the second switch circuit 37 to turn on a path between the amplitude limiting circuit 33 and the radio frequency signal processor 38, so that the radio frequency signal processed by the amplitude limiting circuit 33 generates a baseband signal through the radio frequency signal processor 38; when the amplitude of the first signal is smaller than or equal to the amplitude of the preset signal, the comparing circuit 341 outputs the second signal without any processing on the interference signal, and controls the second switch circuit 37 to turn on the path between the coupling circuit 35 and the rf signal processor 38, so that the rf signal passes through the rf signal processor 38 to generate the baseband signal. In other embodiments, the rf signal processor 38 may further be provided with a low-pass filter 39, and the low-pass filter 39 can filter out a part of the interference signals in the rf signal.
Referring to fig. 4, fig. 4 is a schematic diagram of a specific structure of the detection circuit, the filter circuit, the selection circuit, the coupling circuit, the amplitude limiting circuit and the second switch circuit shown in fig. 3. In this embodiment, the detection circuit 32 includes a diode D1, a fourth capacitor C4, and a second resistor R2, the filter circuit 36 includes a fifth capacitor C5 and a third resistor R3, and the selection circuit 34 includes an operational amplifier U1, a first resistor R1, a first capacitor C1, a first switch chip 3431, and a seventh capacitor C7; the limiter circuit 33 includes a second capacitor C2, a limiter transistor Q1, and a third capacitor C3; the coupling circuit 35 includes a sixth capacitance C6; the second switching circuit 36 includes a second switching chip 361 and an eighth capacitor C8.
Specifically, the detection circuit 32 includes a diode D1, a fourth capacitor C4, and a second resistor R2, a first terminal of the diode D1 is connected to the receiving circuit 31, a second terminal of the diode D1 is connected to a first terminal of the fourth capacitor C4, a first terminal of the fourth capacitor C4 is connected to the selection circuit 34, a second terminal of the fourth capacitor C4 is grounded, a first terminal of the second resistor R2 is connected to the filter circuit 36, and a second terminal of the second resistor R2 is grounded. The capacitance of the fourth capacitor C4 can be set to 220pF, and the resistance of the second resistor R2 can be set to 110K Ω, which is not limited herein.
The filter circuit 36 includes a third resistor R3 and a fifth capacitor C5, a first terminal of the third resistor R3 is connected to a first terminal of the second resistor R2, a second terminal of the third resistor R3 is connected to a first terminal of the fifth capacitor C5, and a second terminal of the fifth capacitor C5 is grounded. The capacitance of the fifth capacitor C5 can be 680pF, and the resistance of the third resistor R3 can be 1000K Ω, which is not limited herein.
The selection circuit 34 includes a comparison circuit 341 and a first switch circuit 343, the comparison circuit 341 includes an operational amplifier U1 and a first resistor R1, a first input terminal of the operational amplifier U1 is connected to a first terminal of a fifth capacitor C5, a second input terminal of the operational amplifier U1 is grounded, an output terminal of the operational amplifier U1 is connected to a first terminal of a first resistor R1, the operational amplifier U1 further includes a terminal connected to a power supply VDD, and a second terminal of the first resistor R1 as an output terminal of the comparison circuit 341 is grounded through a first capacitor C1. The voltage of the power source VDD may be 3V, the resistance of the first resistor R1 may be 680 Ω, and the capacitance of the first capacitor C1 may be 330pF, which is not limited herein.
The first switch circuit 343 includes a first switch chip 3431 and a seventh capacitor C7, the INPUT pin of the first switch chip 3431 is connected to the second terminal of the seventh capacitor C7, the VCTL1 pin of the first switch chip 3431 is connected to the comparator circuit 341, the VCTL2 pin of the first switch chip 3431 is connected to the power supply terminal, the OUT1 pin of the first switch chip 3431 is connected to the coupler circuit 35, the OUT2 terminal of the first switch chip 3431 is connected to the limiter circuit 33, the GND pin of the first switch chip 3431 is connected to ground, and the first terminal of the first capacitor C7 is connected to the receiver circuit 31. The capacitance of the first capacitor C1 may be 330pF, which is not limited herein.
The clipping circuit 33 comprises a second capacitor C2, a clipping transistor Q1 and a third capacitor C3, wherein the first end of the clipping transistor Q1 is connected to the second end of the second capacitor C2, the second end of the clipping transistor Q1 is connected to the first end of the third capacitor C3, the first end of the second capacitor C2 is connected to the first switch circuit 343, and the second end of the third capacitor C3 is connected to the second switch circuit 36. The capacitance of the second capacitor C2 can be set to 330pF, and the capacitance of the third capacitor C3 can be set to 330pF, which is not limited herein.
The coupling circuit 35 includes a sixth capacitor C6, a first terminal of the sixth capacitor C6 is connected to the first switch circuit 343, and a second terminal of the sixth capacitor C6 is connected to the second switch circuit 36. The capacitance of the sixth capacitor C6 may be 330pF, which is not limited herein.
The second switch circuit 36 includes a second switch chip 361 and an eighth capacitor C8, an INPUT pin of the second switch chip 361 is connected to a first end of the eighth capacitor C8, an OUT2 pin of the second switch chip 361 is connected to the coupling circuit 35, an OUT1 pin of the second switch chip 361 is connected to the limiter circuit 33, a VCTL1 pin of the second switch chip 361 is connected to a power supply terminal, a VCTL2 pin of the second switch chip 361 is connected to the selection circuit 34, and a second end of the eighth capacitor C8 is an output end of the second switch circuit 36. The capacitance of the eighth capacitor C8 may be 330pF, which is not limited herein.
The following illustrates the implementation process and effect of the anti-jamming circuit in this embodiment.
Example 1:
table 1 interference signal strength, operational amplifier output and switch path switching corresponding relation table
As shown in table 1, in embodiment 1, when the strength of the interference signal is equal to or greater than-23 dBm, it can be regarded that the strength of the interference signal is too large, at this time, the limiter circuit 33 is turned on, the limiter circuit 33 utilizes the saturation compression characteristic of the limiter transistor Q1 to realize the function of limiting, the amplitude of the interference signal voltage can be reduced according to the limited range, the strength of the interference signal is reduced, the power of the interference signal entering the rear end circuit is reduced, and the influence of the interference signal is reduced; when the strength of the interference signal is smaller than-23 dBm, the strength of the interference signal can be regarded as smaller, at this time, the amplitude limiting circuit 33 is closed, the coupling circuit 35 is opened, the interference signal is not required to be processed, the useful signal is not attenuated when the interference signal is smaller, and the receiving sensitivity of the receiver 100 under the weak interference signal is improved.
Table 2 interference signal strength and characteristic test data of limiter circuit
As shown in table 2, when the clipping output set by the clipping circuit 33 is-17, no matter how strong the interference signal is, the output is about-17 after passing through the clipping circuit 33, which reduces the strength of the interference signal, reduces the power of the interference signal entering the back-end circuit, and thus reduces the influence of the interference signal.
Example 2:
TABLE 3 receiver antijamming capability test
TABLE 4 receiver sensitivity test
As shown in table 3 and table 4, the strength of the interference signal and the sensitivity of the receiver 100 are tested by the receiver 100 using the method of the present embodiment and the conventional method, respectively.
As can be seen from table 3, when the useful signal is weak, the receiver 100 adopting the scheme can resist the interference signal with the strength of-9, while the receiver 100 adopting the existing scheme can only resist the interference signal with the strength of-13; when the useful signal is strong, the receiver 100 adopting the scheme can resist the interference signal with the strength of 10, while the receiver 100 adopting the existing scheme can resist only the interference signal with the strength of 1. Therefore, when the useful signal of the receiver using the scheme is stronger or weaker, the anti-interference performance is obviously improved.
As can be seen from table 4, the receiver 100 adopting the present scheme can receive a weaker signal strength than the receiver 100 adopting the conventional scheme, so that the receiving sensitivity of the receiver 100 using the present scheme is improved.
The anti-interference circuit comprises a receiving circuit, a detection circuit, an amplitude limiting circuit and a selection circuit; the receiving circuit is used for receiving radio frequency signals; the detection circuit is connected with the receiving circuit and used for detecting the strength of an interference signal in the radio frequency signal and generating a first signal corresponding to the strength of the interference signal; the amplitude limiting circuit is used for reducing the strength of an interference signal in the radio frequency signal; the selection circuit is connected with the detection circuit, and when the amplitude of the first signal is larger than that of the preset signal, the selection circuit selects and conducts a channel between the receiving circuit and the amplitude limiting circuit, so that the interference signal is reduced or reduced after being processed by the amplitude limiting circuit, and the intensity of the interference signal in the channel is reduced; the anti-interference circuit further comprises a coupling circuit, when the amplitude of the first signal is smaller than or equal to the amplitude of the preset signal, the selection circuit selects and conducts a path between the receiving circuit and the coupling circuit, and due to the fact that no processing is conducted on the signal, the fact that a useful signal is not attenuated when the interference signal is small is guaranteed, and receiving sensitivity of the receiver under the weak interference signal is improved. The interference signal strength is detected through pure hardware, and whether a channel between the amplitude limiting circuit and the receiving circuit is switched on or not is selected based on the interference signal strength, so that the switching-on between the amplitude limiting circuit and the receiving circuit can be realized in time, interference reduction processing can be performed on the interference signal in time, and the stability of the anti-interference capability is improved. When the anti-interference circuit is applied to a receiver, the influence of interference signals on the performance of the receiver can be reduced, and the use stability and the receiving sensitivity of the receiver are improved.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (10)
1. A immunity circuit, the immunity circuit comprising:
a receiving circuit for receiving a radio frequency signal;
the detection circuit is connected with the receiving circuit and is used for detecting the strength of an interference signal in the radio frequency signal and generating a first signal corresponding to the strength of the interference signal;
the amplitude limiting circuit is used for reducing the strength of an interference signal in the radio frequency signal;
and the selection circuit is connected with the detection circuit and used for responding to the first signal to select whether to conduct a path between the receiving circuit and the amplitude limiting circuit.
2. The immunity circuit of claim 1, wherein the selection circuit comprises:
the comparison circuit is connected with the detection circuit and used for comparing the amplitude of the first signal with the amplitude of a preset signal and outputting a second signal representing the magnitude relation between the amplitude of the first signal and the amplitude of the preset signal;
and the first switch circuit is connected with the comparison circuit and used for switching on a path between the receiving circuit and the amplitude limiting circuit when the second signal indicates that the amplitude of the first signal is greater than the amplitude of the preset signal.
3. The immunity circuit of claim 2,
the comparison circuit comprises an operational amplifier and a first resistor, wherein a first input end of the operational amplifier is connected with the detection circuit, a second input end of the operational amplifier is grounded, an output end of the operational amplifier is connected with a first end of the first resistor, and a second end of the first resistor is used as an output end of the comparison circuit and is connected with the first switch circuit;
and/or the comparison circuit further comprises a first capacitor, and the output end of the comparison circuit is grounded through the first capacitor.
4. The immunity circuit of claim 2,
the anti-jamming circuit further comprises a second switch circuit, the second switch circuit is connected with the comparison circuit and used for conducting a path between the output end of the amplitude limiting circuit and the radio frequency signal processor when the second signal indicates that the amplitude of the first signal is larger than the amplitude of the preset signal.
5. The immunity circuit of claim 1,
the amplitude limiting circuit comprises a second capacitor, an amplitude limiting transistor and a third capacitor which are sequentially connected in series.
6. The immunity circuit of claim 1,
the detection circuit comprises a diode, a fourth capacitor and a second resistor, wherein the first end of the diode is connected with the receiving circuit, the second end of the diode is connected with the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, the first end of the fourth capacitor is connected with the selection circuit, the first end of the second resistor is connected with the first end of the fourth capacitor, and the second end of the second resistor is grounded.
7. The immunity circuit of claim 6,
the anti-jamming circuit further comprises a filter circuit, the first end of the fourth capacitor is connected with the selection circuit through the filter circuit, the filter circuit comprises a third resistor and a fifth capacitor, the first end of the third resistor is connected with the ground through the second resistor, the second end of the third resistor is connected with the ground through the fifth capacitor, the first end of the fifth capacitor is connected with the selection circuit, and the second end of the fifth capacitor is connected with the ground.
8. The immunity circuit of claim 2,
the anti-interference circuit further comprises a coupling circuit, and the coupling circuit is connected with the receiving circuit;
the selection circuit is used for conducting a path between the receiving circuit and the amplitude limiting circuit when the amplitude of the first signal is larger than the amplitude of the preset signal, and conducting a path between the coupling circuit and the receiving circuit when the amplitude of the first signal is smaller than or equal to the amplitude of the preset signal.
9. The immunity circuit of claim 8,
the coupling circuit includes a sixth capacitance.
10. A receiver comprising an interconnected antenna and an anti-jamming circuit according to any of claims 1 to 8.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202120665512.5U CN215871381U (en) | 2021-03-31 | 2021-03-31 | Anti-interference circuit and receiver |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120665512.5U CN215871381U (en) | 2021-03-31 | 2021-03-31 | Anti-interference circuit and receiver |
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| CN215871381U true CN215871381U (en) | 2022-02-18 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114785436A (en) * | 2022-05-14 | 2022-07-22 | 上海云表信息科技有限公司 | Radio frequency interference intensity detection system and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114785436A (en) * | 2022-05-14 | 2022-07-22 | 上海云表信息科技有限公司 | Radio frequency interference intensity detection system and method |
| CN114785436B (en) * | 2022-05-14 | 2024-01-30 | 上海云表信息科技有限公司 | Radio frequency interference intensity detection system and method |
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