CN215870750U - Steering engine power strip circuit - Google Patents
Steering engine power strip circuit Download PDFInfo
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- CN215870750U CN215870750U CN202023195739.2U CN202023195739U CN215870750U CN 215870750 U CN215870750 U CN 215870750U CN 202023195739 U CN202023195739 U CN 202023195739U CN 215870750 U CN215870750 U CN 215870750U
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Abstract
The utility model discloses a steering engine power panel circuit which comprises a spike voltage prevention circuit, an input filter circuit, an anti-reverse connection circuit, a surge suppression circuit and an output filter circuit, wherein the spike voltage prevention circuit, the input filter circuit, the anti-reverse connection circuit, the surge suppression circuit and the output filter circuit are sequentially connected, under the condition that the spike voltage prevention circuit, the input filter circuit, the anti-reverse connection circuit, the surge suppression circuit and the output filter circuit are met, the steering engine power panel circuit is simple in structure, all devices adopt separation devices, the circuit board can be flexibly designed according to the appearance of a steering engine provided by a host factory, the devices are arranged, and compared with a filter surge prevention module of a selected goods shelf product, the steering engine power panel circuit is small in size, light in weight and low in price.
Description
Technical Field
The utility model belongs to the technical field of steering engine control, and relates to a steering engine power panel circuit.
Background
Along with the wide application of unmanned aerial vehicles, the unmanned aerial vehicle industry is competitive more and more, unmanned aerial vehicle manufacturers pay more and more attention to price, volume, weight, price and the like of steering engine products, shelf products such as anti-surge modules, filters and the like are strong in universality and can meet technical performance, but the size and the weight are often too large and the price is high, and the requirements on size and weight and the requirements on more sensitive environments of price cannot be met, so that a steering engine power panel circuit needs to be developed, and the steering engine power panel circuit is very necessary to be applied to special occasions.
SUMMERY OF THE UTILITY MODEL
The purpose of the utility model is: the steering engine power panel circuit can work when an airborne power supply with a complex electromagnetic environment is electrified, outputs the power supply meeting electromagnetic compatibility requirements, and is used for a steering engine controller.
The technical scheme of the utility model is as follows:
a steering engine power panel circuit comprises a spike voltage prevention circuit, an input filter circuit, an anti-reverse connection circuit, a surge suppression circuit and an output filter circuit, wherein the spike voltage prevention circuit, the input filter circuit, the anti-reverse connection circuit, the surge suppression circuit and the output filter circuit are sequentially connected.
Further, the anti-spike voltage circuit is a transient suppression diode D1, and the two ends of the transient suppression diode D1 are connected to the dc 28V input voltage.
The input filter circuit further includes capacitors C1-C1, common mode inductors L1 1, L2 1, L1 1 and L2 1, the capacitors C1 are connected in series with the capacitors C1 and then connected in parallel with the capacitors C1, a connection point between the capacitors C1 and the capacitors C1 is grounded, one end of each capacitor C1 is connected to one end of each common mode inductor L1 1, the other end of each common mode inductor L1 1 is connected to one end of each capacitor C1 and one end of each common mode inductor L2 1, the other end of each common mode inductor L1 1 is connected to the other end of each capacitor C1 and one end of each common mode inductor L2 1, the capacitors C1 are connected in parallel with the capacitors C1, the capacitors C1 are connected in series with the capacitors C1 and then connected in parallel with the capacitors C1, a connection point between the capacitors C1 and the capacitors C1 is grounded, the other end of each common mode inductor L2 1 is connected in parallel with the capacitors C1.
Further, the anti-reverse connection circuit comprises field effect transistors Q1 and Q2, capacitors C10, a voltage stabilizing diode Z2 and resistors R1 and R2, gates of the field effect transistors Q1 and Q2 are connected with one end of a resistor R1, one end of a capacitor C10, a cathode of the voltage stabilizing diode Z2 and one end of a resistor R2, the other end of the resistor R1 is connected with a common mode inductor L2A, the other end of the capacitor C10, an anode of the voltage stabilizing diode Z2 and the other end of the resistor R2 are connected with sources of the field effect transistors Q1 and Q2, and drains of the field effect transistors Q1 and Q2 are connected with the common mode inductor L2B.
Further, the surge suppression circuit includes capacitors C12, C13, C14, C19, C20, C21, C22, resistors R3 to R9, a surge suppression module U1, a field effect transistor Q3, a capacitor C12 having one end connected to an anti-reverse-connection circuit resistor R1 and the other end connected to the sources of anti-reverse-connection circuit field effect transistors Q1 and Q2, a resistor R3 having one end connected to one end of the capacitor C12 and the other end connected to the resistor R4, a resistor R4 connected to the pin 1 of the surge suppression module U1, a capacitor C19 having two ends connected to the pins 3 and 4 of the surge suppression module U1, a resistor R3 connected to the source of the field effect transistor Q3, a gate connected to one end of the capacitor C13 and one end of the resistor R5, a drain connected to the other end of the capacitor C13 and one end of the capacitor C14, a resistor R5 having the other end connected to the pin 8 of the suppression module U1 and the other end of the capacitor C1, and the other end 1 connected to the surge suppression module 1, the two ends of a capacitor C21 are connected with a pin 7 and a pin 5 of a surge suppression module U1 respectively, one end of a capacitor C22 is connected with a pin 6 of the surge suppression module U1, the other end of the capacitor C22 is connected with one end of a resistor R9, the other end of a resistor R9 is connected with a pin 4 of the surge suppression module U1, a resistor R8 is connected with the capacitor C22 in parallel, the two ends of a resistor R6 are connected with the pin 7 and the pin 6 of the surge suppression module U1 respectively, and a resistor R7 is connected with the resistor R6 in parallel.
Further, the output filter circuit comprises capacitors C15-C18, a capacitor C15 is connected in parallel to two ends of a capacitor C14 of the surge suppression circuit, the capacitor C16 is connected in parallel with a capacitor C15, the capacitor C17 is connected in series with the capacitor C18 and then connected in parallel with the capacitor C16, and a connection point of the capacitor C17 and the capacitor C18 is grounded.
The utility model has the beneficial effects that:
under the performance conditions of peak voltage resistance, filtering, reverse connection prevention, surge resistance and the like, the filter has a simple structure, all devices adopt separation devices, a circuit board can be flexibly designed and components and parts can be flexibly arranged according to the appearance of the steering engine provided by a host factory, and the filter has small volume, light weight and low price compared with a filter anti-surge module of a selected goods shelf product.
Drawings
FIG. 1 is a schematic block diagram of the circuit of the present invention;
fig. 2 is a schematic diagram of the circuit of the present invention.
Detailed Description
The following detailed description of the embodiments of the present invention, such as the shapes, configurations, mutual positions and connection relationships of the components, the functions and operating principles of the components, the manufacturing processes and the operation and use methods thereof, will be further described in detail with reference to the accompanying drawings, so as to help those skilled in the art to more completely, accurately and deeply understand the concept and technical solutions of the present invention:
as shown in figure 1, the steering engine power panel circuit comprises a spike voltage prevention circuit, an input filter circuit, an anti-reverse connection circuit, a surge suppression circuit and an output filter circuit, wherein the spike voltage prevention circuit, the input filter circuit, the anti-reverse connection circuit, the surge suppression circuit and the output filter circuit are sequentially connected.
As shown in fig. 2, the anti-spike voltage circuit is a transient suppression diode D1, and a dc 28V input voltage is connected across the transient suppression diode D1.
As shown in fig. 2, the input filter circuit includes capacitors C1 to C1, common mode inductors L1 1, L2 1, L1 1, and L2 1, the capacitor C1 is connected in series with the capacitor C1 and then connected in parallel with the capacitor C1, a connection point between the capacitor C1 and the capacitor C1 is grounded, one end of the capacitor C1 is connected to one end of the common mode inductor L1 1, the other end of the common mode inductor L1 1 is connected to one end of the capacitor C1 and one end of the common mode inductor L2 1, the capacitor C1 is connected in parallel with the capacitor C1, the connection point between the capacitor C1 and the capacitor C1 is grounded, the other end of the common mode inductor L2 1 and the other end of the common mode inductor L2 1 are connected in parallel with the capacitor C1, and the other ends of the capacitor C1 are connected in parallel with the capacitor C1, and the capacitor C1.
As shown in fig. 2, the anti-reverse connection circuit includes field effect transistors Q1, Q2, capacitors C10, a zener diode Z2, and resistors R1, R2, gates of the field effect transistors Q1, Q2 are connected to one end of a resistor R1, one end of a capacitor C10, a cathode of the zener diode Z2, and one end of a resistor R2, the other end of the resistor R1 is connected to a common mode inductor L2A, the other end of the capacitor C10, an anode of the zener diode Z2, and the other end of the resistor R2 are connected to sources of the field effect transistors Q1, Q2, and drains of the field effect transistors Q1, Q2 are connected to the common mode inductor L2B.
As shown in fig. 2, the surge suppression circuit includes capacitors C12, C13, C14, C19, C20, C21, and C22, resistors R3 to R9, a surge suppression module U1, a fet Q3, a capacitor C12 having one end connected to an anti-reverse-connection circuit resistor R1 and the other end connected to the sources of anti-reverse-connection circuit fets Q1 and Q2, a resistor R3 having one end connected to one end of the capacitor C12 and the other end connected to the resistor R4, a resistor R4 connected to pin 1 of the surge suppression module U1, a capacitor C19 having two ends connected to pin 3 and pin 4 of the surge suppression module U1, a resistor R3 connected to the source of the fet Q3, a gate connected to one end of the capacitor C13 and one end of the resistor R5, a drain connected to the other end of the capacitor C13 and one end of the capacitor C14, a resistor R5 having the other end connected to pin 8 of the suppression module 1 and one end of the capacitor C1, and the other end of the capacitor C1 connected to the surge suppression module 1, the two ends of a capacitor C21 are connected with a pin 7 and a pin 5 of a surge suppression module U1 respectively, one end of a capacitor C22 is connected with a pin 6 of the surge suppression module U1, the other end of the capacitor C22 is connected with one end of a resistor R9, the other end of a resistor R9 is connected with a pin 4 of the surge suppression module U1, a resistor R8 is connected with the capacitor C22 in parallel, the two ends of a resistor R6 are connected with the pin 7 and the pin 6 of the surge suppression module U1 respectively, and a resistor R7 is connected with the resistor R6 in parallel.
As shown in fig. 2, the output filter circuit includes capacitors C15-C18, a capacitor C15 is connected in parallel to two ends of a capacitor C14 of the surge suppression circuit, the capacitor C16 is connected in parallel with a capacitor C15, the capacitor C17 is connected in series with the capacitor C18 and then connected in parallel with the capacitor C16, and a connection point between the capacitor C17 and the capacitor C18 is grounded.
Second embodiment:
the steering engine power panel circuit comprises functions of a spike voltage prevention circuit, an input filter circuit, an anti-reverse connection circuit, a surge suppression circuit and the like in some embodiments.
The anti-spike voltage circuit: the 28VIN + end and the 28 VIN-end of the airborne power supply are respectively connected to two ends of a 15P85CA bidirectional transient suppression diode D1, when the airborne power supply normally works, the bidirectional transient suppression diode D1 is in a cut-off state (high-resistance state), when the airborne power supply generates instantaneous peak overvoltage and reaches the breakdown voltage of the bidirectional transient suppression diode D1, the bidirectional transient suppression diode D1 is instantly converted into low-resistance characteristic from high-resistance characteristic to absorb large current, and simultaneously, the voltage at two ends of the bidirectional transient suppression diode D1 is clamped on a determined value (the voltage resistance value of a D1 tube), so that a rear-stage circuit is protected; when the abnormal overvoltage of the onboard power supply disappears, the bidirectional transient suppression diode D1 is restored to a high-resistance state, and the circuit works normally.
An input filter circuit: the filter circuit adopts two-stage composite filtering, a first-stage filter circuit consisting of C1, C2, C3, C4 and L1 and a second-stage filter circuit consisting of C5, C6, C7, C8, C9 and L2, wherein capacitors C3, C4, C5, C8 and C9 adopt film capacitors, the capacitance range is approximately 0.01 mF-0.47 muF and is mainly used for filtering series mode interference, C1, C2, C6 and C7 are bridged at the input end and the output end of the first-stage filter circuit, C1, C2, C6 and C7 adopt ceramic capacitors, and the capacitance range is 2200 Pf-0.1 muF. In order to reduce the leakage current, the capacitance should not exceed 0.1 muF, and the midpoint of the capacitor should be connected to the ground, so as to effectively suppress the common mode interference. The filter circuit is mainly used for suppressing electromagnetic noise and clutter signals of the onboard 28VIN input power supply, preventing power supply interference of the steering engine controller, and simultaneously preventing high-frequency clutter generated by frequent commutation of the direct-current brushless motor of the power supply of the steering engine controller from interfering an onboard 28VIN power supply grid. The withstand voltage values of C1-C9 are determined according to the technical requirements proposed by a host, generally, the withstand voltage values of front-end and shell-grounded capacitors C1, C2, C6 and C7 are 1200VDC, and the withstand voltage values of rear-end capacitors are gradually reduced, for example, C3 and C4 are 0.047 muF withstand voltage value 630VDC, and C8 and C9 are 4.7 muF withstand voltage value 100 VDC.
The reverse connection prevention circuit comprises: q1, Q2 are enhancement mode N channel field effect transistor (MOSFET) with low on-resistance, its model number is BSC093N15NS5, pin 1, 2, 3 are source (S), pin 5, 6, 7, 8 are drain (D), pin 4 is grid (G), connect in series in the power through the source (S) pin and the drain (D) pin of Q1, Q2, when the load power is turned on forward, by resistance R1, R2 series connection, resistance R1 is the voltage division and current limiting function, resistance R1, R2 divide voltage to provide voltage bias for MOSFET Q1, Q2, establish VGS quiescent operating point, zener diode Z8 is the steady VGS voltage, prevent VGS voltage from breaking down MOSFET Q1, Q2, parallel connection has the effect of soft start on at zener diode Z1 and resistance R2 on the electric capacity C10, have soft start function, in the moment that the electric current begins, electric capacity C4642 charges, Q2, the gradual voltage of Q is established. When the onboard power supply is connected positively, the R1 provides VGS voltage, the grid is high level, and the MOSFET field effect transistors Q1 and Q2 are in saturated conduction. When the reverse connection is carried out, the grid is in a low level, and the MOSFET field effect transistors Q1 and Q2 cannot be conducted, so that the reverse connection prevention effect is achieved. The Rds (on) of the power MOSFET field effect transistors Q1 and Q2 has only 9.3m omega actual loss, and the problems of voltage drop and overlarge power consumption existing in the existing scheme of preventing reverse connection of the diode power supply are solved.
An anti-surge circuit: the surge suppressor LTC4366 and Q3 power MOSFET field effect transistor IPT059N15N3 mainly comprise a U1 surge suppressor LTC4366HTS8 and other peripheral circuits. The FB pin of the surge suppressor LTC4366HTS8U1 collects the voltage signal at pin 3 of the Q3 power MOSFET fet IPT059N15N3, and compares the collected feedback signal with a 1.25V reference voltage to control the gate output of the Q3 power MOSFET fet IPT059N15N3, so as to achieve the control surge voltage protection function.
The utility model has been described above with reference to the accompanying drawings, it is obvious that the utility model is not limited to the specific implementation in the above-described manner, and it is within the scope of the utility model to apply the inventive concept and solution to other applications without substantial modification.
Claims (6)
1. The utility model provides a steering wheel power strip circuit which characterized in that: the anti-peak voltage circuit, the input filter circuit, the anti-reverse-connection circuit, the surge suppression circuit and the output filter circuit are sequentially connected in sequence, the anti-peak voltage circuit is connected with 28V input voltage, and the output filter circuit outputs 28V voltage.
2. The steering engine power panel circuit of claim 1, wherein: the anti-spike voltage circuit is a transient suppression diode D1, and two ends of the transient suppression diode D1 are connected with a direct current 28V input voltage.
3. The steering engine power panel circuit of claim 1, wherein: the input filter circuit comprises capacitors C1-C1, common mode inductors L1 1, L2 1, L1 1 and L2 1, wherein the capacitors C1 are connected in series with the capacitors C1 and then connected in parallel with the capacitors C1, a connection point of the capacitors C1 and the capacitors C1 is grounded, one end of each capacitor C1 is connected with one end of each common mode inductor L1 1, the other end of each common mode inductor L1 1 is connected with one end of each capacitor C1 and one end of each common mode inductor L2 1, the other end of each common mode inductor L1 1 is connected with the other end of each capacitor C1 and one end of each common mode inductor L2 1, the capacitors C1 are connected in parallel with the capacitors C1, the connection point of the capacitors C1 and the capacitors C1 is grounded, the other end of each common mode inductor L2 1 and the other ends of the capacitors C1 are connected in parallel with the capacitors C1.
4. The steering engine power panel circuit of claim 1, wherein: the anti-reverse connection circuit comprises field effect transistors Q1 and Q2, a capacitor C10, a voltage stabilizing diode Z2 and resistors R1 and R2, the grids of the field effect transistors Q1 and Q2 are connected with one end of a resistor R1, one end of a capacitor C10, the negative electrode of the voltage stabilizing diode Z2 and one end of a resistor R2, the other end of the resistor R1 is connected with a common mode inductor L2A, the other end of the capacitor C10, the positive electrode of the voltage stabilizing diode Z2 and the other end of the resistor R2 are connected with the sources of the field effect transistors Q1 and Q2, and the drains of the field effect transistors Q1 and Q2 are connected with the common mode inductor L2B.
5. The steering engine power panel circuit of claim 1, wherein: the surge suppression circuit comprises capacitors C12, C13, C14, C19, C20, C21 and C22, resistors R3-R9, a surge suppression module U1, a field effect transistor Q3, an anti-reverse-connection circuit resistor R1 connected to one end of a capacitor C12, the other end of the capacitor C1 connected to the sources of anti-reverse-connection circuit field effect transistors Q1 and Q2, a resistor R3 connected to one end of the capacitor C12 and the other end of the capacitor C4, a resistor R4 connected to pin 1 of the surge suppression module U1, a capacitor C19 connected to pin 3 and pin 4 of the surge suppression module U1, a resistor R3 connected to the source of the field effect transistor Q3, a gate connected to one end of a capacitor C13 and one end of the resistor R5, a drain connected to the other end of the capacitor C13 and one end of the capacitor C14, a resistor R5 connected to pin 8 of the suppression module U1 and the other end of the capacitor C1, and a surge suppression module 1 connected to the other end of the capacitor C1, the two ends of a capacitor C21 are connected with a pin 7 and a pin 5 of a surge suppression module U1 respectively, one end of a capacitor C22 is connected with a pin 6 of the surge suppression module U1, the other end of the capacitor C22 is connected with one end of a resistor R9, the other end of a resistor R9 is connected with a pin 4 of the surge suppression module U1, a resistor R8 is connected with the capacitor C22 in parallel, the two ends of a resistor R6 are connected with the pin 7 and the pin 6 of the surge suppression module U1 respectively, and a resistor R7 is connected with the resistor R6 in parallel.
6. The steering engine power panel circuit of claim 1, wherein: the output filter circuit comprises capacitors C15-C18, a capacitor C15 is connected in parallel with two ends of a capacitor C14 of the surge suppression circuit, the capacitor C16 is connected in parallel with a capacitor C15, the capacitor C17 is connected in series with the capacitor C18 and then connected in parallel with the capacitor C16, and a connection point of the capacitor C17 and the capacitor C18 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023195739.2U CN215870750U (en) | 2020-12-25 | 2020-12-25 | Steering engine power strip circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023195739.2U CN215870750U (en) | 2020-12-25 | 2020-12-25 | Steering engine power strip circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215870750U true CN215870750U (en) | 2022-02-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202023195739.2U Active CN215870750U (en) | 2020-12-25 | 2020-12-25 | Steering engine power strip circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215870750U (en) |
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2020
- 2020-12-25 CN CN202023195739.2U patent/CN215870750U/en active Active
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