CN219458658U - Surge voltage suppression circuit - Google Patents
Surge voltage suppression circuit Download PDFInfo
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- CN219458658U CN219458658U CN202223546635.0U CN202223546635U CN219458658U CN 219458658 U CN219458658 U CN 219458658U CN 202223546635 U CN202223546635 U CN 202223546635U CN 219458658 U CN219458658 U CN 219458658U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The utility model relates to the field of circuits, in particular to a surge voltage suppression circuit which comprises a transient diode TVS1, capacitors C1, C2, C3, C4, resistors R1, R2, R3, R4, R5, R6, R7, a photoelectric coupler U1, voltage stabilizing diodes D1, D2, D3, D4 and field effect transistors Q1 and Q2, wherein when the input voltage of the circuit is higher than a preset value, the field effect transistors Q1 and Q2 are turned off, the whole circuit is cut off to protect a post-stage circuit from being influenced by surge voltage, the circuit realizes surge voltage suppression based on devices which can be independently produced in China, and the production cost and the period uncontrollable risk can be reduced.
Description
Technical Field
The utility model relates to the field of circuits, in particular to a surge voltage suppression circuit.
Background
In on-board and on-board electronic equipment, transient characteristic changes occur due to switching of working tasks of a power supply system, such as switching of electric equipment, load changes or synchronization and parallel connection of a power supply, and transient voltages such as spike voltage and surge voltage can occur in power supply voltage. The transient voltage exceeds the maximum working voltage of the rear-stage power conversion unit, and the rear-stage power conversion unit can be subjected to overvoltage protection to be powered down or even damaged. The front end of the power module for both on-board and on-board products must therefore be augmented with surge and spike suppression circuitry.
The surge voltage suppression circuit in the current domestic voltage suppression products adopts foreign chips such as LTC4359, LTC4364, LTC4366 and the like, so that the cost of the products is increased and the period is uncontrollable.
In view of the foregoing, there is a need for a surge suppression circuit based on devices that can be autonomously produced in the country to reduce the production costs and the risk of period uncontrollable.
Disclosure of Invention
The utility model aims to provide a surge voltage suppression circuit based on devices capable of being autonomously produced in China, so as to reduce production cost and the risk of uncontrollable period.
In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:
a surge voltage suppression circuit comprises a transient diode TVS1, capacitors C1, C2, C3 and C4, resistors R1, R2, R3, R4, R5, R6 and R7, a photoelectric coupler U1, voltage stabilizing diodes D1, D2, D3 and D4, and field effect transistors Q1 and Q2;
the cathode of the transient diode TVS1, one end of the capacitor C2 and one end of the resistor R1 and the resistor R2 which are connected in parallel are connected with the positive electrode VIN+ of the input end;
the positive electrode of the transient diode TVS1, the other end of the capacitor C2, the 3 pin of the photoelectric coupler U1, one end of the resistor R7, the positive electrode of the zener diode D1, the source S electrodes of the field effect transistor Q1 and the field effect transistor Q2 are connected with the negative electrode VIN of the input end;
one end of the capacitor C4, one end of the capacitor C3, one end of the resistor R4 and one end of the resistor R3 are connected with the positive electrode VO+ of the output end;
the other end of the capacitor C4, the other end of the capacitor C3, the anode of the zener diode D4, the drain electrodes D of the field effect transistor Q1 and the field effect transistor Q2 are connected with the cathode VO of the output end;
the voltage stabilizing diodes D2, D3 and D4 are sequentially connected in series;
the pin 1 of the photoelectric coupler U1 is connected with the other end of the resistor R1 and the resistor R2 which are connected in parallel; the pin 2 of the photoelectric coupler U1 is connected with the cathode of the voltage stabilizing diode D2; the pin 4 of the photoelectric coupler U1 is connected with the other end of the resistor R7, the negative electrode of the zener diode D1, the other end of the resistor R3 and the other end of the resistor R4;
the other end of the resistor R3 is further connected with one end of a resistor R5, the other end of the resistor R4 is further connected with one end of a resistor R6, the other end of the resistor R5 is connected with the gate G electrode of the field effect transistor Q1, and the other end of the resistor R6 is connected with the gate G electrode of the field effect transistor Q2.
Optionally, the regulated voltages of the zener diodes D1, D2, D3 and D4 are 12V.
Optionally, the input threshold voltage of the circuit is 38V.
Optionally, the field effect transistor Q1 and the field effect transistor Q2 are the same.
When the input voltage of the circuit is higher than a preset value, the field effect transistors Q1 and Q2 are turned off, the whole circuit is cut off, the later-stage circuit is protected from being influenced by the surge voltage, the circuit realizes surge voltage inhibition based on devices capable of being independently produced in China, and the production cost and the risk of uncontrollable period can be reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a surge suppression circuit according to a first embodiment of the present utility model.
Detailed Description
The present utility model will be described in further detail with reference to the accompanying drawings and examples of implementation in order to make the objects, technical solutions and advantages of the present utility model more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the utility model.
Referring to fig. 1, the surge suppression circuit includes transient diodes TVS1, capacitors C1, C2, C3 and C4, resistors R1, R2, R3, R4, R5, R6 and R7, a photo coupler U1, zener diodes D1, D2, D3 and D4, and field effect transistors Q1 and Q2;
the cathode of the transient diode TVS1, one end of the capacitor C2 and one end of the resistor R1 and the resistor R2 which are connected in parallel are connected with the positive electrode VIN+ of the input end;
the positive electrode of the transient diode TVS1, the other end of the capacitor C2, the 3 pin of the photoelectric coupler U1, one end of the resistor R7, the positive electrode of the zener diode D1, the source S electrodes of the field effect transistor Q1 and the field effect transistor Q2 are connected with the negative electrode VIN of the input end;
one end of the capacitor C4, one end of the capacitor C3, one end of the resistor R4 and one end of the resistor R3 are connected with the positive electrode VO+ of the output end;
the other end of the capacitor C4, the other end of the capacitor C3, the anode of the zener diode D4, the drain electrodes D of the field effect transistor Q1 and the field effect transistor Q2 are connected with the cathode VO of the output end;
the voltage stabilizing diodes D2, D3 and D4 are sequentially connected in series;
the pin 1 of the photoelectric coupler U1 is connected with the other end of the resistor R1 and the resistor R2 which are connected in parallel; the pin 2 of the photoelectric coupler U1 is connected with the cathode of the voltage stabilizing diode D2; the pin 4 of the photoelectric coupler U1 is connected with the other end of the resistor R7, the negative electrode of the zener diode D1, the other end of the resistor R3 and the other end of the resistor R4;
the other end of the resistor R3 is further connected with one end of a resistor R5, the other end of the resistor R4 is further connected with one end of a resistor R6, the other end of the resistor R5 is connected with the gate G electrode of the field effect transistor Q1, and the other end of the resistor R6 is connected with the gate G electrode of the field effect transistor Q2.
Further, the regulated voltages of the zener diodes D1, D2, D3, and D4 are 12V.
Further, the input threshold voltage of the circuit is 38V.
Further, the field effect transistor Q1 and the field effect transistor Q2 are the same.
Specifically, the transient diode TVS1 is used to absorb the 600V/10us voltage spike generated by the pre-stage power supply, and the capacitors C1 and C2 filter the input voltage. The on voltage of pins 1 and 2 of the photocoupler U1 is about 1V, and the voltage stabilizing diodes D1, D2, D3 and D4 are all 12V voltage stabilizing tubes. The resistor R1 and the resistor R2 are used for conducting current limitation of the photoelectric coupler U1, and the voltage at two ends of the resistor R1 and the resistor R2 is selected to be 1V according to parameters.
The input critical voltage of the surge voltage suppression circuit is 38V, namely, when the input voltage of the circuit is lower than 38V, the circuit works normally, and when the input voltage of the circuit is higher than 38V, the circuit is cut off.
Specifically, when the input voltage of the circuit is lower than 38V, the optocoupler U1 is cut off, the field effect transistors Q1 and Q2 are in a conducting state, the input voltage is normally output, the output voltage is output after being filtered by the capacitor C3 and the capacitor C4, and the circuit works normally.
When the input voltage of the circuit is higher than 38V, the voltage stabilizing diodes D2, D3 and D4 are broken down, when the Vgs voltage of the field effect transistors Q1 and Q2 is 12V of the breakdown voltage of the voltage stabilizing diode D4, the 3 pin and the 4 pin of the optocoupler U1 are equivalent to short circuits, the Vgs voltage of the field effect transistors Q1 and Q2 are shorted to 0V, the field effect transistors Q1 and Q2 are turned off, the whole circuit is cut off, the later-stage circuit is protected from being influenced by surge voltage, the circuit realizes surge voltage inhibition based on devices capable of being independently produced in China, and the production cost and the period uncontrollable risk can be reduced.
The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the utility model.
Claims (4)
1. A surge voltage suppression circuit, which is characterized by comprising a transient diode TVS1, capacitors C1, C2, C3 and C4, resistors R1, R2, R3, R4, R5, R6 and R7, a photo coupler U1, voltage stabilizing diodes D1, D2, D3 and D4, and field effect transistors Q1 and Q2;
the cathode of the transient diode TVS1, one end of the capacitor C2 and one end of the resistor R1 and the resistor R2 which are connected in parallel are connected with the positive electrode VIN+ of the input end;
the positive electrode of the transient diode TVS1, the other end of the capacitor C2, the 3 pin of the photoelectric coupler U1, one end of the resistor R7, the positive electrode of the zener diode D1, the source S electrodes of the field effect transistor Q1 and the field effect transistor Q2 are connected with the negative electrode VIN of the input end;
one end of the capacitor C4, one end of the capacitor C3, one end of the resistor R4 and one end of the resistor R3 are connected with the positive electrode VO+ of the output end;
the other end of the capacitor C4, the other end of the capacitor C3, the anode of the zener diode D4, the drain electrodes D of the field effect transistor Q1 and the field effect transistor Q2 are connected with the cathode VO of the output end;
the voltage stabilizing diodes D2, D3 and D4 are sequentially connected in series;
the pin 1 of the photoelectric coupler U1 is connected with the other end of the resistor R1 and the resistor R2 which are connected in parallel; the pin 2 of the photoelectric coupler U1 is connected with the cathode of the voltage stabilizing diode D2; the pin 4 of the photoelectric coupler U1 is connected with the other end of the resistor R7, the negative electrode of the zener diode D1, the other end of the resistor R3 and the other end of the resistor R4;
the other end of the resistor R3 is further connected with one end of a resistor R5, the other end of the resistor R4 is further connected with one end of a resistor R6, the other end of the resistor R5 is connected with the gate G electrode of the field effect transistor Q1, and the other end of the resistor R6 is connected with the gate G electrode of the field effect transistor Q2.
2. The surge suppression circuit according to claim 1, wherein the regulated voltages of the zener diodes D1, D2, D3, and D4 are 12V.
3. The surge suppression circuit of claim 2, wherein the input threshold voltage of the circuit is 38V.
4. A surge suppression circuit according to claim 3, wherein said field effect transistor Q1 and said field effect transistor Q2 are identical.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202223546635.0U CN219458658U (en) | 2022-12-29 | 2022-12-29 | Surge voltage suppression circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202223546635.0U CN219458658U (en) | 2022-12-29 | 2022-12-29 | Surge voltage suppression circuit |
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CN219458658U true CN219458658U (en) | 2023-08-01 |
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CN202223546635.0U Active CN219458658U (en) | 2022-12-29 | 2022-12-29 | Surge voltage suppression circuit |
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CN (1) | CN219458658U (en) |
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2022
- 2022-12-29 CN CN202223546635.0U patent/CN219458658U/en active Active
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